summaryrefslogtreecommitdiff
path: root/arch/arm/mach-ux500/clock.h
diff options
context:
space:
mode:
authorMattias Nilsson <mattias.i.nilsson@stericsson.com>2011-06-15 18:14:51 +0200
committerPhilippe Langlais <philippe.langlais@linaro.org>2011-07-22 15:51:36 +0200
commit1e676a6986541562f75d29d026c277a561211ee4 (patch)
tree10e2571c49f26b84ac3dabc95eaced0bc606bee8 /arch/arm/mach-ux500/clock.h
parent65100c34b8485e38a26d29af18b5dea5ff5f27dc (diff)
arm: ux500: correct the prcc kclk operations
Accessing the PRCC registers requires the corresponding PERnCLK to be on. This patch fixes the PRCC kclk operations to ensure that this is done. (The pclk:s already have the PERnCLKs as parents, so they are OK.) ST Ericsson ID: 339699 ST Ericsson FOSS-OUT ID: trivial Change-Id: I1669ef238ea561ed90e2e7e23799599fd7a4eb44 Signed-off-by: Mattias Nilsson <mattias.i.nilsson@stericsson.com> Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/25184 Reviewed-by: QATEST Reviewed-by: Jonas ABERG <jonas.aberg@stericsson.com>
Diffstat (limited to 'arch/arm/mach-ux500/clock.h')
-rw-r--r--arch/arm/mach-ux500/clock.h5
1 files changed, 4 insertions, 1 deletions
diff --git a/arch/arm/mach-ux500/clock.h b/arch/arm/mach-ux500/clock.h
index 0d8ca4ee8b0..f9daba62a9a 100644
--- a/arch/arm/mach-ux500/clock.h
+++ b/arch/arm/mach-ux500/clock.h
@@ -32,6 +32,7 @@
* be a %NULL-terminated &struct_clk array. Present if and only
* if clk_set_parent() is implemented for the clock.
* @regulator: The regulator needed to have the clock functional, if any.
+ * @clock: The clock needed to control the clock, if any.
*/
struct clk {
const struct clkops *ops;
@@ -46,6 +47,7 @@ struct clk {
struct clk *bus_parent;
struct clk **parents;
struct regulator *regulator;
+ struct clk *clock;
struct list_head list;
#if defined(CONFIG_DEBUG_FS)
struct dentry *dent; /* For visible tree hierarchy */
@@ -108,13 +110,14 @@ extern struct clkops sga_clk_ops;
.parent = _parent, \
}
-#define DEF_PRCC_KCLK(_name, _io_base, _cg_bit, _parent) \
+#define DEF_PRCC_KCLK(_name, _io_base, _cg_bit, _parent, _clock) \
struct clk _name = { \
.name = #_name, \
.ops = &prcc_kclk_ops, \
.io_base = _io_base, \
.cg_sel = BIT(_cg_bit), \
.parent = _parent, \
+ .clock = _clock, \
}
#define DEF_PER_CLK(_name, _bus_parent, _parent) \