ux500: align u5500 PRCMU & CPUFREQ management with u8500 (multiple commits in one)

Signed-off-by: Philippe Langlais <philippe.langlais@linaro.org>

Merge of following commits too:

u5500: add support for sysclk

basic sysclk support added in PRCMU driver and
clock framework driver updated.

Signed-off-by: Shreshtha Kumar Sahu <shreshthakumar.sahu@stericsson.com>

U5500: Support for ESRAM12 EPOD in PRCMU driver

Signed-off-by: Vijaya Kumar Kilari <vijay.kilari@stericsson.com>

ux500: regulator: handle different base offset of ePOD ID

5500 ePOD ids are offseted for some reason in the PRCMU driver.  Adjust the ids
to index the local arrays to avoid memory corruption.

Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com>

ux500: pm: support PRCMU status check on 5500

This also removes unused 8500v1 code.

Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com>

arm: ux500: prcmu_ac_wake_req workaround

This patch adds a check in prcmu_ac_wake_req that the modem is
awake (in terms of the value in the PRCM_MOD_AWAKE_STATUS
register) after the AC_WAKE_ACK has been received from the PRCMU
FW. If the check fails, a retry is made.

This seems to be necessary, since the modem can generate an
AC_WAKE_ACK, and then still go to sleep.

Signed-off-by: Mattias Nilsson <mattias.i.nilsson@stericsson.com>

U5500: Add support for PRCMU Mailbox0

Add PRCMU mailbox 0 support for irq wakeup
enable and disable

Signed-off-by: Vijaya Kumar K <vijay.kilari@stericsson.com>

U5500: Add support for power state transition

PRCMU driver is updated to provide API for
system power state transition

Signed-off-by: Vijaya Kumar K <vijay.kilari@stericsson.com>

ARM: ux500: prcmu: Add A9 watchdog interface

Signed-off-by: Jonas Aaberg <jonas.aberg@stericsson.com>

U5500 : ab5500 core interrupt hander update

AB5500 interrupts will be now handled by PRCMU and then
routed to AB5500 core driver.AB5500 irq handler will
no more read the latch registers to find the interrupt
reason.Instead PRCMU will read the latch registers and
provide the values to core driver.

Signed-off-by: Bibek Basu <bibek.basu@stericsson.com>

ARM: ux500: prcmu-dbg: Tiny code clean-up

Signed-off-by: Jonas Aaberg <jonas.aberg@stericsson.com>

u5500: add mailbox1 and related function support

Add cpufreq-db5500.c file for db5500 CPUfreq support.

PRCMU mailbox1 and related functions' support is added.
List of functions implemented:
- prcmu_get/set_arm_opp
- read_mailbox_1

Signed-off-by: Shreshtha Kumar Sahu <shreshthakumar.sahu@stericsson.com>

Fix for PRCMU

u5500: PRCMU IRQ should be NO_SUSPEND

As on 8500.

Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com>

ARM: u5500: PRCMU reset API

Added API for rebooting the board and for getting the last reboot code.

Signed-off-by: Pawel Szyszuk <pawel.szyszuk@stericsson.com>

1 files changed, 29 insertions, 0 deletions

diff --git a/arch/arm/mach-ux500/include/mach/irqs-db5500.h b/arch/arm/mach-ux500/include/mach/irqs-db5500.h
index 77239776a6f..d8d00b6c2ba 100644
--- a/arch/arm/mach-ux500/include/mach/irqs-db5500.h
+++ b/arch/arm/mach-ux500/include/mach/irqs-db5500.h
@@ -85,6 +85,35 @@
 
 #ifdef CONFIG_UX500_SOC_DB5500
 
+/* Virtual interrupts corresponding to the PRCMU wakeups.  */
+#define IRQ_DB5500_PRCMU_BASE IRQ_SOC_START
+
+#define IRQ_DB5500_PRCMU_RTC (IRQ_DB5500_PRCMU_BASE)
+#define IRQ_DB5500_PRCMU_RTT0 (IRQ_DB5500_PRCMU_BASE + 1)
+#define IRQ_DB5500_PRCMU_RTT1 (IRQ_DB5500_PRCMU_BASE + 2)
+#define IRQ_DB5500_PRCMU_CD_IRQ (IRQ_DB5500_PRCMU_BASE + 3)
+#define IRQ_DB5500_PRCMU_SRP_TIM (IRQ_DB5500_PRCMU_BASE + 4)
+#define IRQ_DB5500_PRCMU_APE_REQ (IRQ_DB5500_PRCMU_BASE + 5)
+#define IRQ_DB5500_PRCMU_USB (IRQ_DB5500_PRCMU_BASE + 6)
+#define IRQ_DB5500_PRCMU_ABB (IRQ_DB5500_PRCMU_BASE + 7)
+#define IRQ_DB5500_PRCMU_ARM (IRQ_DB5500_PRCMU_BASE + 8)
+#define IRQ_DB5500_PRCMU_MODEM_SW_RESET_REQ (IRQ_DB5500_PRCMU_BASE + 9)
+#define IRQ_DB5500_PRCMU_AC_WAKE_ACK (IRQ_DB5500_PRCMU_BASE + 10)
+#define IRQ_DB5500_PRCMU_GPIO0 (IRQ_DB5500_PRCMU_BASE + 11)
+#define IRQ_DB5500_PRCMU_GPIO1 (IRQ_DB5500_PRCMU_BASE + 12)
+#define IRQ_DB5500_PRCMU_GPIO2 (IRQ_DB5500_PRCMU_BASE + 13)
+#define IRQ_DB5500_PRCMU_GPIO3 (IRQ_DB5500_PRCMU_BASE + 14)
+#define IRQ_DB5500_PRCMU_GPIO4 (IRQ_DB5500_PRCMU_BASE + 15)
+#define IRQ_DB5500_PRCMU_GPIO5 (IRQ_DB5500_PRCMU_BASE + 16)
+#define IRQ_DB5500_PRCMU_GPIO6 (IRQ_DB5500_PRCMU_BASE + 17)
+#define IRQ_DB5500_PRCMU_GPIO7 (IRQ_DB5500_PRCMU_BASE + 18)
+#define IRQ_DB5500_PRCMU_AC_REL_ACK (IRQ_DB5500_PRCMU_BASE + 19)
+#define IRQ_DB5500_PRCMU_LOW_POWER_AUDIO (IRQ_DB5500_PRCMU_BASE + 20)
+#define IRQ_DB5500_PRCMU_TEMP_SENSOR (IRQ_DB5500_PRCMU_BASE + 21)
+#define IRQ_DB5500_PRCMU_END (IRQ_DB5500_PRCMU_BASE + 22)
+
+#define NUM_DB5500_PRCMU_WAKEUPS (IRQ_DB5500_PRCMU_END - IRQ_DB5500_PRCMU_BASE)
+
 /*
  * After the GPIO ones we reserve a range of IRQ:s in which virtual
  * IRQ:s representing modem IRQ:s can be allocated