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| author | Russell King <rmk@dyn-67.arm.linux.org.uk> | 2009-09-12 12:04:37 +0100 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2009-09-12 12:04:37 +0100 |
| commit | 87d721ad7a37b7650dd710c88dd5c6a5bf9fe996 (patch) | |
| tree | 869d633803eb7c429624d3bd16a6117816849763 /arch/arm/plat-omap/include/mach/sdrc.h | |
| parent | ddd559b13f6d2fe3ad68c4b3f5235fd3c2eae4e3 (diff) | |
| parent | b7cfda9fc3d7aa60cffab5367f2a72a4a70060cd (diff) | |
Merge branch 'master' into devel
Diffstat (limited to 'arch/arm/plat-omap/include/mach/sdrc.h')
| -rw-r--r-- | arch/arm/plat-omap/include/mach/sdrc.h | 11 |
1 files changed, 9 insertions, 2 deletions
diff --git a/arch/arm/plat-omap/include/mach/sdrc.h b/arch/arm/plat-omap/include/mach/sdrc.h index adc73522491..0be18e4ff18 100644 --- a/arch/arm/plat-omap/include/mach/sdrc.h +++ b/arch/arm/plat-omap/include/mach/sdrc.h @@ -30,6 +30,10 @@ #define SDRC_ACTIM_CTRL_A_0 0x09c #define SDRC_ACTIM_CTRL_B_0 0x0a0 #define SDRC_RFR_CTRL_0 0x0a4 +#define SDRC_MR_1 0x0B4 +#define SDRC_ACTIM_CTRL_A_1 0x0C4 +#define SDRC_ACTIM_CTRL_B_1 0x0C8 +#define SDRC_RFR_CTRL_1 0x0D4 /* * These values represent the number of memory clock cycles between @@ -102,8 +106,11 @@ struct omap_sdrc_params { u32 mr; }; -void __init omap2_sdrc_init(struct omap_sdrc_params *sp); -struct omap_sdrc_params *omap2_sdrc_get_params(unsigned long r); +void __init omap2_sdrc_init(struct omap_sdrc_params *sdrc_cs0, + struct omap_sdrc_params *sdrc_cs1); +int omap2_sdrc_get_params(unsigned long r, + struct omap_sdrc_params **sdrc_cs0, + struct omap_sdrc_params **sdrc_cs1); #ifdef CONFIG_ARCH_OMAP2 |