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authorManuel Lauss <manuel.lauss@googlemail.com>2009-10-07 20:15:15 +0200
committerRalf Baechle <ralf@linux-mips.org>2010-02-27 12:52:53 +0100
commit788144656b8a862e724a1296e64ab6375eb541ed (patch)
tree96208eed56da25acdf9d923b9d9986e82dcd8944 /arch/mips/alchemy/devboards/pb1550/platform.c
parent93e9cd8485b31e5a33f1040bff4d15e65c0b2d19 (diff)
MIPS: Alchemy: Stop IRQ name sharing
Eliminate the sharing of IRQ names among the differenct Alchemy variants. IRQ numbers need no longer be hidden behind a CONFIG_SOC_AU1XXX symbol: step 1 in my quest to make the Alchemy code less reliant on a hardcoded subtype. This patch also renames the GPIO irq number constants. It's really an interrupt line, NOT a GPIO number! Code which relied on certain irq numbers to have the same name across all supported cpu subtypes is changed to determine current cpu subtype at runtime; in some places this isn't possible so a "compat" symbol is used. Run-tested on DB1200. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/alchemy/devboards/pb1550/platform.c')
-rw-r--r--arch/mips/alchemy/devboards/pb1550/platform.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/mips/alchemy/devboards/pb1550/platform.c b/arch/mips/alchemy/devboards/pb1550/platform.c
index aa5016c2e86..b496fb6de23 100644
--- a/arch/mips/alchemy/devboards/pb1550/platform.c
+++ b/arch/mips/alchemy/devboards/pb1550/platform.c
@@ -40,8 +40,8 @@ static int __init pb1550_dev_init(void)
PCMCIA_MEM_PSEUDO_PHYS + 0x00040000 - 1,
PCMCIA_IO_PSEUDO_PHYS,
PCMCIA_IO_PSEUDO_PHYS + 0x00001000 - 1,
- AU1500_GPIO_201_205,
- AU1000_GPIO_0,
+ AU1550_GPIO201_205_INT,
+ AU1550_GPIO0_INT,
0,
0,
0);
@@ -52,8 +52,8 @@ static int __init pb1550_dev_init(void)
PCMCIA_MEM_PSEUDO_PHYS + 0x00840000 - 1,
PCMCIA_IO_PSEUDO_PHYS + 0x00800000,
PCMCIA_IO_PSEUDO_PHYS + 0x00801000 - 1,
- AU1500_GPIO_201_205,
- AU1000_GPIO_1,
+ AU1550_GPIO201_205_INT,
+ AU1550_GPIO1_INT,
0,
0,
1);