diff options
| author | Jonas Aaberg <jonas.aberg@stericsson.com> | 2011-06-01 08:19:14 +0200 |
|---|---|---|
| committer | said m bagheri <ebgheri@steludxu2848.(none)> | 2011-06-17 13:42:13 +0200 |
| commit | b28bb9202553a4ed00a79fb447ec808b781ea92c (patch) | |
| tree | 1a9ebccbd477cf01d4ad747806f4403e1e9e6d07 /arch | |
| parent | 56e6ab9ffeda13d510221e012001d61b74e14238 (diff) | |
ARM: u8500: prcmu: Remove V1 support
ST-Ericsson Linux next: Not tested, ask SSM for ER
ST-Ericsson ID: 342987
ST-Ericsson FOSS-OUT ID: Trivial
Change-Id: I1c6932c03f5dfa9dec48209985ba8d76fbc7f1b0
Signed-off-by: Jonas Aaberg <jonas.aberg@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/24277
Reviewed-by: QATEST
Reviewed-by: Mattias NILSSON <mattias.i.nilsson@stericsson.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/mach-ux500/prcmu-db8500.c | 46 |
1 files changed, 18 insertions, 28 deletions
diff --git a/arch/arm/mach-ux500/prcmu-db8500.c b/arch/arm/mach-ux500/prcmu-db8500.c index 2f284e1ff4f..7de5f73f914 100644 --- a/arch/arm/mach-ux500/prcmu-db8500.c +++ b/arch/arm/mach-ux500/prcmu-db8500.c @@ -211,10 +211,8 @@ #define PRCM_REQ_MB5_I2C_HW_BITS (PRCM_REQ_MB5 + 0x1) #define PRCM_REQ_MB5_I2C_REG (PRCM_REQ_MB5 + 0x2) #define PRCM_REQ_MB5_I2C_VAL (PRCM_REQ_MB5 + 0x3) -#define PRCMU_I2C_WRITE(slave) \ - (((slave) << 1) | (cpu_is_u8500v2() ? BIT(6) : 0)) -#define PRCMU_I2C_READ(slave) \ - (((slave) << 1) | BIT(0) | (cpu_is_u8500v2() ? BIT(6) : 0)) +#define PRCMU_I2C_WRITE(slave) (((slave) << 1) | BIT(6)) +#define PRCMU_I2C_READ(slave) (((slave) << 1) | BIT(0) | BIT(6)) #define PRCMU_I2C_STOP_EN BIT(3) /* Mailbox 5 ACKs */ @@ -1411,7 +1409,7 @@ static int request_sga_clock(u8 clock, bool enable) u32 val; int ret; - if (enable && cpu_is_u8500v20()) { + if (enable) { val = readl(_PRCMU_BASE + PRCM_CGATING_BYPASS); writel(val | PRCM_CGATING_BYPASS_ICN2, _PRCMU_BASE + PRCM_CGATING_BYPASS); @@ -1419,7 +1417,7 @@ static int request_sga_clock(u8 clock, bool enable) ret = request_reg_clock(clock, enable); - if (!ret && !enable && cpu_is_u8500v20()) { + if (!ret && !enable) { val = readl(_PRCMU_BASE + PRCM_CGATING_BYPASS); writel(val & ~PRCM_CGATING_BYPASS_ICN2, _PRCMU_BASE + PRCM_CGATING_BYPASS); @@ -2005,29 +2003,21 @@ void __init prcmu_early_init(void) { unsigned int i; - if (cpu_is_u8500v1()) { - tcdm_base = __io_address(U8500_PRCMU_TCDM_BASE_V1); - } else if (cpu_is_u8500v2()) { - void *tcpm_base = ioremap_nocache(U8500_PRCMU_TCPM_BASE, SZ_4K); - - if (tcpm_base != NULL) { - int version; - version = readl(tcpm_base + PRCMU_FW_VERSION_OFFSET); - prcmu_version.project_number = version & 0xFF; - prcmu_version.api_version = (version >> 8) & 0xFF; - prcmu_version.func_version = (version >> 16) & 0xFF; - prcmu_version.errata = (version >> 24) & 0xFF; - pr_info("PRCMU firmware version %d.%d.%d\n", - (version >> 8) & 0xFF, (version >> 16) & 0xFF, - (version >> 24) & 0xFF); - iounmap(tcpm_base); - } - - tcdm_base = __io_address(U8500_PRCMU_TCDM_BASE); - } else { - pr_err("prcmu: Unsupported chip version\n"); - BUG(); + void *tcpm_base = ioremap_nocache(U8500_PRCMU_TCPM_BASE, SZ_4K); + + if (tcpm_base != NULL) { + int version; + version = readl(tcpm_base + PRCMU_FW_VERSION_OFFSET); + prcmu_version.project_number = version & 0xFF; + prcmu_version.api_version = (version >> 8) & 0xFF; + prcmu_version.func_version = (version >> 16) & 0xFF; + prcmu_version.errata = (version >> 24) & 0xFF; + pr_info("PRCMU firmware version %d.%d.%d\n", + (version >> 8) & 0xFF, (version >> 16) & 0xFF, + (version >> 24) & 0xFF); + iounmap(tcpm_base); } + tcdm_base = __io_address(U8500_PRCMU_TCDM_BASE); spin_lock_init(&mb0_transfer.lock); spin_lock_init(&mb0_transfer.dbb_irqs_lock); |