diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2009-08-04 15:49:11 -0700 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2009-08-04 15:49:11 -0700 |
commit | 90bc1a658a53f8832ee799685703977a450e5af9 (patch) | |
tree | 98c5ceb22d634508614e42330ed1e27e6930a983 /arch | |
parent | 6ce90c430baef6e411dcf32e872913888bb3ef54 (diff) | |
parent | 54822de7793bf9aa56d79cc173281cdb23b37f9f (diff) |
Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: (32 commits)
MIPS: Wire up accept4 syscall.
MIPS: VPE: Delete unused function get_tc_unused().
MIPS: VPE: Fix bogus indentation.
MIPS: VPE: Make various functions static.
MIPS: VPE: Free relocation chain on error.
MIPS: VPE: Fix compiler warning.
MIPS: Module: Make error messages unique.
MIPS: Octeon: Run IPI code with interrupts disabled.
MIPS: Jazz: Fix read buffer overflow
MIPS: Use DIV_ROUND_CLOSEST
MIPS: MTX-1: Request button GPIO before setting its direction
MIPS: AR7: Override CFLAGS with -Werror
MIPS: AR7: Remove unused tnetd7200_get_clock function
MIPS: AR7: Use DMA_BIT_MASK(nn) instead of deprecated DMA_nnBIT_MASK
MIPS: AR7: Fix build failures when CONFIG_SERIAL_8250 is not enabled
MIPS: Fix read buffer overflow
MIPS: AR7: Fix build warning on memory.c
MIPS: Octeon PCIe: Make hardware and software bus numbers match.
MIPS: RBTX4939: Fix IOC pin-enable register updating
MIPS: Simplify and correct interrupt handling for MSP4200
...
Diffstat (limited to 'arch')
66 files changed, 121 insertions, 191 deletions
diff --git a/arch/mips/alchemy/mtx-1/platform.c b/arch/mips/alchemy/mtx-1/platform.c index 8b5914d1241..e30e42add69 100644 --- a/arch/mips/alchemy/mtx-1/platform.c +++ b/arch/mips/alchemy/mtx-1/platform.c @@ -1,7 +1,7 @@ /* * MTX-1 platform devices registration * - * Copyright (C) 2007, Florian Fainelli <florian@openwrt.org> + * Copyright (C) 2007-2009, Florian Fainelli <florian@openwrt.org> * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -142,7 +142,17 @@ static struct __initdata platform_device * mtx1_devs[] = { static int __init mtx1_register_devices(void) { - gpio_direction_input(207); + int rc; + + rc = gpio_request(mtx1_gpio_button[0].gpio, + mtx1_gpio_button[0].desc); + if (rc < 0) { + printk(KERN_INFO "mtx1: failed to request %d\n", + mtx1_gpio_button[0].gpio); + goto out; + } + gpio_direction_input(mtx1_gpio_button[0].gpio); +out: return platform_add_devices(mtx1_devs, ARRAY_SIZE(mtx1_devs)); } diff --git a/arch/mips/ar7/Makefile b/arch/mips/ar7/Makefile index 7435e44b396..26bc5da1899 100644 --- a/arch/mips/ar7/Makefile +++ b/arch/mips/ar7/Makefile @@ -8,3 +8,4 @@ obj-y := \ platform.o \ gpio.o \ clock.o +EXTRA_CFLAGS += -Werror diff --git a/arch/mips/ar7/clock.c b/arch/mips/ar7/clock.c index 27dc6663f2f..cc65c8eb391 100644 --- a/arch/mips/ar7/clock.c +++ b/arch/mips/ar7/clock.c @@ -264,19 +264,6 @@ static void __init tnetd7300_init_clocks(void) iounmap(bootcr); } -static int tnetd7200_get_clock(int base, struct tnetd7200_clock *clock, - u32 *bootcr, u32 bus_clock) -{ - int divisor = ((readl(&clock->prediv) & 0x1f) + 1) * - ((readl(&clock->postdiv) & 0x1f) + 1); - - if (*bootcr & BOOT_PLL_BYPASS) - return base / divisor; - - return base * ((readl(&clock->mul) & 0xf) + 1) / divisor; -} - - static void tnetd7200_set_clock(int base, struct tnetd7200_clock *clock, int prediv, int postdiv, int postdiv2, int mul, u32 frequency) { diff --git a/arch/mips/ar7/memory.c b/arch/mips/ar7/memory.c index 46fed44825a..696c723dc6d 100644 --- a/arch/mips/ar7/memory.c +++ b/arch/mips/ar7/memory.c @@ -52,7 +52,7 @@ static int __init memsize(void) size <<= 1; } while (size < (64 << 20)); - writel(tmpaddr, &addr); + writel((u32)tmpaddr, &addr); return size; } diff --git a/arch/mips/ar7/platform.c b/arch/mips/ar7/platform.c index 54224496178..2ecab615593 100644 --- a/arch/mips/ar7/platform.c +++ b/arch/mips/ar7/platform.c @@ -28,7 +28,6 @@ #include <linux/serial_8250.h> #include <linux/ioport.h> #include <linux/io.h> -#include <linux/version.h> #include <linux/vlynq.h> #include <linux/leds.h> #include <linux/string.h> @@ -243,13 +242,13 @@ static struct platform_device physmap_flash = { .num_resources = 1, }; -static u64 cpmac_dma_mask = DMA_32BIT_MASK; +static u64 cpmac_dma_mask = DMA_BIT_MASK(32); static struct platform_device cpmac_low = { .id = 0, .name = "cpmac", .dev = { .dma_mask = &cpmac_dma_mask, - .coherent_dma_mask = DMA_32BIT_MASK, + .coherent_dma_mask = DMA_BIT_MASK(32), .platform_data = &cpmac_low_data, }, .resource = cpmac_low_res, @@ -261,7 +260,7 @@ static struct platform_device cpmac_high = { .name = "cpmac", .dev = { .dma_mask = &cpmac_dma_mask, - .coherent_dma_mask = DMA_32BIT_MASK, + .coherent_dma_mask = DMA_BIT_MASK(32), .platform_data = &cpmac_high_data, }, .resource = cpmac_high_res, @@ -481,6 +480,7 @@ static void __init detect_leds(void) static int __init ar7_register_devices(void) { int res; +#ifdef CONFIG_SERIAL_8250 static struct uart_port uart_port[2]; memset(uart_port, 0, sizeof(struct uart_port) * 2); @@ -512,7 +512,7 @@ static int __init ar7_register_devices(void) if (res) return res; } - +#endif /* CONFIG_SERIAL_8250 */ res = platform_device_register(&physmap_flash); if (res) return res; diff --git a/arch/mips/ar7/prom.c b/arch/mips/ar7/prom.c index a320bceb2f9..5ad6f1db656 100644 --- a/arch/mips/ar7/prom.c +++ b/arch/mips/ar7/prom.c @@ -144,7 +144,7 @@ static char * __init lookup_psp_var_map(u8 num) { int i; - for (i = 0; i < sizeof(psp_var_map); i++) + for (i = 0; i < ARRAY_SIZE(psp_var_map); i++) if (psp_var_map[i].num == num) return psp_var_map[i].value; diff --git a/arch/mips/ar7/setup.c b/arch/mips/ar7/setup.c index 6ebb5f16d96..39f6b5b9646 100644 --- a/arch/mips/ar7/setup.c +++ b/arch/mips/ar7/setup.c @@ -15,7 +15,6 @@ * with this program; if not, write to the Free Software Foundation, Inc., * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. */ -#include <linux/version.h> #include <linux/init.h> #include <linux/ioport.h> #include <linux/pm.h> diff --git a/arch/mips/cavium-octeon/smp.c b/arch/mips/cavium-octeon/smp.c index 0b891a9c625..32d51a31dc4 100644 --- a/arch/mips/cavium-octeon/smp.c +++ b/arch/mips/cavium-octeon/smp.c @@ -194,11 +194,11 @@ static void octeon_init_secondary(void) void octeon_prepare_cpus(unsigned int max_cpus) { cvmx_write_csr(CVMX_CIU_MBOX_CLRX(cvmx_get_core_num()), 0xffffffff); - if (request_irq(OCTEON_IRQ_MBOX0, mailbox_interrupt, IRQF_SHARED, + if (request_irq(OCTEON_IRQ_MBOX0, mailbox_interrupt, IRQF_DISABLED, "mailbox0", mailbox_interrupt)) { panic("Cannot request_irq(OCTEON_IRQ_MBOX0)\n"); } - if (request_irq(OCTEON_IRQ_MBOX1, mailbox_interrupt, IRQF_SHARED, + if (request_irq(OCTEON_IRQ_MBOX1, mailbox_interrupt, IRQF_DISABLED, "mailbox1", mailbox_interrupt)) { panic("Cannot request_irq(OCTEON_IRQ_MBOX1)\n"); } diff --git a/arch/mips/dec/ecc-berr.c b/arch/mips/dec/ecc-berr.c index 6a17c9b508e..7abce661b90 100644 --- a/arch/mips/dec/ecc-berr.c +++ b/arch/mips/dec/ecc-berr.c @@ -1,6 +1,4 @@ /* - * linux/arch/mips/dec/ecc-berr.c - * * Bus error event handling code for systems equipped with ECC * handling logic, i.e. DECstation/DECsystem 5000/200 (KN02), * 5000/240 (KN03), 5000/260 (KN05) and DECsystem 5900 (KN03), diff --git a/arch/mips/dec/int-handler.S b/arch/mips/dec/int-handler.S index 00cecdcc75f..82c85281878 100644 --- a/arch/mips/dec/int-handler.S +++ b/arch/mips/dec/int-handler.S @@ -1,6 +1,4 @@ /* - * arch/mips/dec/int-handler.S - * * Copyright (C) 1995, 1996, 1997 Paul M. Antoine and Harald Koerfgen * Copyright (C) 2000, 2001, 2002, 2003, 2005 Maciej W. Rozycki * diff --git a/arch/mips/dec/ioasic-irq.c b/arch/mips/dec/ioasic-irq.c index 3acb133668d..cb41954fc32 100644 --- a/arch/mips/dec/ioasic-irq.c +++ b/arch/mips/dec/ioasic-irq.c @@ -1,6 +1,4 @@ /* - * linux/arch/mips/dec/ioasic-irq.c - * * DEC I/O ASIC interrupts. * * Copyright (c) 2002, 2003 Maciej W. Rozycki diff --git a/arch/mips/dec/kn01-berr.c b/arch/mips/dec/kn01-berr.c index d3b8002bf1e..b0dc6d53edd 100644 --- a/arch/mips/dec/kn01-berr.c +++ b/arch/mips/dec/kn01-berr.c @@ -1,6 +1,4 @@ /* - * linux/arch/mips/dec/kn01-berr.c - * * Bus error event handling code for DECstation/DECsystem 3100 * and 2100 (KN01) systems equipped with parity error detection * logic. diff --git a/arch/mips/dec/kn02-irq.c b/arch/mips/dec/kn02-irq.c index 02439dc0ba8..ed90a8deabc 100644 --- a/arch/mips/dec/kn02-irq.c +++ b/arch/mips/dec/kn02-irq.c @@ -1,6 +1,4 @@ /* - * linux/arch/mips/dec/kn02-irq.c - * * DECstation 5000/200 (KN02) Control and Status Register * interrupts. * diff --git a/arch/mips/dec/kn02xa-berr.c b/arch/mips/dec/kn02xa-berr.c index 5f04545c360..07ca5405d48 100644 --- a/arch/mips/dec/kn02xa-berr.c +++ b/arch/mips/dec/kn02xa-berr.c @@ -1,6 +1,4 @@ /* - * linux/arch/mips/dec/kn02xa-berr.c - * * Bus error event handling code for 5000-series systems equipped * with parity error detection logic, i.e. DECstation/DECsystem * 5000/120, /125, /133 (KN02-BA), 5000/150 (KN04-BA) and Personal diff --git a/arch/mips/dec/prom/call_o32.S b/arch/mips/dec/prom/call_o32.S index e523454bda3..8c8498159e4 100644 --- a/arch/mips/dec/prom/call_o32.S +++ b/arch/mips/dec/prom/call_o32.S @@ -1,6 +1,4 @@ /* - * arch/mips/dec/prom/call_o32.S - * * O32 interface for the 64 (or N32) ABI. * * Copyright (C) 2002 Maciej W. Rozycki diff --git a/arch/mips/dec/prom/console.c b/arch/mips/dec/prom/console.c index 078e1a12421..caa6e047caf 100644 --- a/arch/mips/dec/prom/console.c +++ b/arch/mips/dec/prom/console.c @@ -1,6 +1,4 @@ /* - * arch/mips/dec/prom/console.c - * * DECstation PROM-based early console support. * * Copyright (C) 2004, 2007 Maciej W. Rozycki diff --git a/arch/mips/dec/time.c b/arch/mips/dec/time.c index 1359c03ded5..463136e6685 100644 --- a/arch/mips/dec/time.c +++ b/arch/mips/dec/time.c @@ -1,6 +1,4 @@ /* - * linux/arch/mips/dec/time.c - * * Copyright (C) 1991, 1992, 1995 Linus Torvalds * Copyright (C) 2000, 2003 Maciej W. Rozycki * diff --git a/arch/mips/emma/common/Makefile b/arch/mips/emma/common/Makefile index c392d28c1ef..f27d84d1904 100644 --- a/arch/mips/emma/common/Makefile +++ b/arch/mips/emma/common/Makefile @@ -1,7 +1,4 @@ # -# arch/mips/emma2rh/common/Makefile -# Makefile for the common code of NEC EMMA2RH based board. -# # Copyright (C) NEC Electronics Corporation 2005-2006 # # This program is free software; you can redistribute it and/or modify diff --git a/arch/mips/emma/common/prom.c b/arch/mips/emma/common/prom.c index 120f53fbdb4..708f0876140 100644 --- a/arch/mips/emma/common/prom.c +++ b/arch/mips/emma/common/prom.c @@ -1,7 +1,4 @@ /* - * arch/mips/emma2rh/common/prom.c - * This file is prom file. - * * Copyright (C) NEC Electronics Corporation 2004-2006 * * This file is based on the arch/mips/ddb5xxx/common/prom.c diff --git a/arch/mips/emma/markeins/Makefile b/arch/mips/emma/markeins/Makefile index 16e0017ba91..f8ba2508fa2 100644 --- a/arch/mips/emma/markeins/Makefile +++ b/arch/mips/emma/markeins/Makefile @@ -1,7 +1,4 @@ # -# arch/mips/emma2rh/markeins/Makefile -# Makefile for the common code of NEC EMMA2RH based board. -# # Copyright (C) NEC Electronics Corporation 2005-2006 # # This program is free software; you can redistribute it and/or modify diff --git a/arch/mips/emma/markeins/irq.c b/arch/mips/emma/markeins/irq.c index 43828ae796e..9504b7ee0b7 100644 --- a/arch/mips/emma/markeins/irq.c +++ b/arch/mips/emma/markeins/irq.c @@ -1,7 +1,4 @@ /* - * arch/mips/emma2rh/markeins/irq.c - * This file defines the irq handler for EMMA2RH. - * * Copyright (C) NEC Electronics Corporation 2004-2006 * * This file is based on the arch/mips/ddb5xxx/ddb5477/irq.c diff --git a/arch/mips/emma/markeins/led.c b/arch/mips/emma/markeins/led.c index 377a181b656..49755896857 100644 --- a/arch/mips/emma/markeins/led.c +++ b/arch/mips/emma/markeins/led.c @@ -1,7 +1,4 @@ /* - * arch/mips/emma2rh/markeins/led.c - * This file defines the led display for Mark-eins. - * * Copyright (C) NEC Electronics Corporation 2004-2006 * * This program is free software; you can redistribute it and/or modify diff --git a/arch/mips/emma/markeins/platform.c b/arch/mips/emma/markeins/platform.c index 80ae12ef87d..b05b08b92a3 100644 --- a/arch/mips/emma/markeins/platform.c +++ b/arch/mips/emma/markeins/platform.c @@ -1,7 +1,4 @@ /* - * arch/mips/emma2rh/markeins/platofrm.c - * This file sets up platform devices for EMMA2RH Mark-eins. - * * Copyright(C) MontaVista Software Inc, 2006 * * Author: dmitry pervushin <dpervushin@ru.mvista.com> diff --git a/arch/mips/emma/markeins/setup.c b/arch/mips/emma/markeins/setup.c index 67f45650008..335dc8c1a1b 100644 --- a/arch/mips/emma/markeins/setup.c +++ b/arch/mips/emma/markeins/setup.c @@ -1,7 +1,4 @@ /* - * arch/mips/emma2rh/markeins/setup.c - * This file is setup for EMMA2RH Mark-eins. - * * Copyright (C) NEC Electronics Corporation 2004-2006 * * This file is based on the arch/mips/ddb5xxx/ddb5477/setup.c. diff --git a/arch/mips/fw/lib/call_o32.S b/arch/mips/fw/lib/call_o32.S index bdf7d1d4081..e0a68713b3c 100644 --- a/arch/mips/fw/lib/call_o32.S +++ b/arch/mips/fw/lib/call_o32.S @@ -1,6 +1,4 @@ /* - * arch/mips/dec/prom/call_o32.S - * * O32 interface for the 64 (or N32) ABI. * * Copyright (C) 2002 Maciej W. Rozycki diff --git a/arch/mips/include/asm/emma/emma2rh.h b/arch/mips/include/asm/emma/emma2rh.h index 30aea91de62..2afb2fe11b3 100644 --- a/arch/mips/include/asm/emma/emma2rh.h +++ b/arch/mips/include/asm/emma/emma2rh.h @@ -1,7 +1,4 @@ /* - * arch/mips/include/asm/emma/emma2rh.h - * This file is EMMA2RH common header. - * * Copyright (C) NEC Electronics Corporation 2005-2006 * * This file based on include/asm-mips/ddb5xxx/ddb5xxx.h diff --git a/arch/mips/include/asm/emma/markeins.h b/arch/mips/include/asm/emma/markeins.h index 973b0628490..2618bf23024 100644 --- a/arch/mips/include/asm/emma/markeins.h +++ b/arch/mips/include/asm/emma/markeins.h @@ -1,7 +1,4 @@ /* - * include/asm-mips/emma2rh/markeins.h - * This file is EMMA2RH board depended header. - * * Copyright (C) NEC Electronics Corporation 2005-2006 * * This file based on include/asm-mips/ddb5xxx/ddb5xxx.h diff --git a/arch/mips/include/asm/gic.h b/arch/mips/include/asm/gic.h index 10292e37c1f..a8f57341f12 100644 --- a/arch/mips/include/asm/gic.h +++ b/arch/mips/include/asm/gic.h @@ -20,7 +20,7 @@ #define GIC_TRIG_EDGE 1 #define GIC_TRIG_LEVEL 0 -#if CONFIG_SMP +#ifdef CONFIG_SMP #define GIC_NUM_INTRS (24 + NR_CPUS * 2) #else #define GIC_NUM_INTRS 32 diff --git a/arch/mips/include/asm/pmc-sierra/msp71xx/war.h b/arch/mips/include/asm/pmc-sierra/msp71xx/war.h index 0bf48fc1892..9e2ee429c52 100644 --- a/arch/mips/include/asm/pmc-sierra/msp71xx/war.h +++ b/arch/mips/include/asm/pmc-sierra/msp71xx/war.h @@ -23,6 +23,8 @@ #if defined(CONFIG_PMC_MSP7120_EVAL) || defined(CONFIG_PMC_MSP7120_GW) || \ defined(CONFIG_PMC_MSP7120_FPGA) #define MIPS34K_MISSED_ITLB_WAR 1 +#else +#define MIPS34K_MISSED_ITLB_WAR 0 #endif #endif /* __ASM_MIPS_PMC_SIERRA_WAR_H */ diff --git a/arch/mips/include/asm/processor.h b/arch/mips/include/asm/processor.h index 0f926aa0cb4..087a8884ef0 100644 --- a/arch/mips/include/asm/processor.h +++ b/arch/mips/include/asm/processor.h @@ -311,8 +311,9 @@ extern void start_thread(struct pt_regs * regs, unsigned long pc, unsigned long unsigned long get_wchan(struct task_struct *p); -#define __KSTK_TOS(tsk) ((unsigned long)task_stack_page(tsk) + THREAD_SIZE - 32) -#define task_pt_regs(tsk) ((struct pt_regs *)__KSTK_TOS(tsk) - 1) +#define __KSTK_TOS(tsk) ((unsigned long)task_stack_page(tsk) + \ + THREAD_SIZE - 32 - sizeof(struct pt_regs)) +#define task_pt_regs(tsk) ((struct pt_regs *)__KSTK_TOS(tsk)) #define KSTK_EIP(tsk) (task_pt_regs(tsk)->cp0_epc) #define KSTK_ESP(tsk) (task_pt_regs(tsk)->regs[29]) #define KSTK_STATUS(tsk) (task_pt_regs(tsk)->cp0_status) diff --git a/arch/mips/include/asm/unistd.h b/arch/mips/include/asm/unistd.h index b70c49fdda2..e753a777949 100644 --- a/arch/mips/include/asm/unistd.h +++ b/arch/mips/include/asm/unistd.h @@ -354,16 +354,17 @@ #define __NR_pwritev (__NR_Linux + 331) #define __NR_rt_tgsigqueueinfo (__NR_Linux + 332) #define __NR_perf_counter_open (__NR_Linux + 333) +#define __NR_accept4 (__NR_Linux + 334) /* * Offset of the last Linux o32 flavoured syscall */ -#define __NR_Linux_syscalls 333 +#define __NR_Linux_syscalls 334 #endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */ #define __NR_O32_Linux 4000 -#define __NR_O32_Linux_syscalls 333 +#define __NR_O32_Linux_syscalls 334 #if _MIPS_SIM == _MIPS_SIM_ABI64 @@ -664,16 +665,17 @@ #define __NR_pwritev (__NR_Linux + 290) #define __NR_rt_tgsigqueueinfo (__NR_Linux + 291) #define __NR_perf_counter_open (__NR_Linux + 292) +#define __NR_accept4 (__NR_Linux + 293) /* * Offset of the last Linux 64-bit flavoured syscall */ -#define __NR_Linux_syscalls 292 +#define __NR_Linux_syscalls 293 #endif /* _MIPS_SIM == _MIPS_SIM_ABI64 */ #define __NR_64_Linux 5000 -#define __NR_64_Linux_syscalls 292 +#define __NR_64_Linux_syscalls 293 #if _MIPS_SIM == _MIPS_SIM_NABI32 @@ -978,16 +980,17 @@ #define __NR_pwritev (__NR_Linux + 294) #define __NR_rt_tgsigqueueinfo (__NR_Linux + 295) #define __NR_perf_counter_open (__NR_Linux + 296) +#define __NR_accept4 (__NR_Linux + 297) /* * Offset of the last N32 flavoured syscall */ -#define __NR_Linux_syscalls 296 +#define __NR_Linux_syscalls 297 #endif /* _MIPS_SIM == _MIPS_SIM_NABI32 */ #define __NR_N32_Linux 6000 -#define __NR_N32_Linux_syscalls 296 +#define __NR_N32_Linux_syscalls 297 #ifdef __KERNEL__ diff --git a/arch/mips/jazz/jazzdma.c b/arch/mips/jazz/jazzdma.c index f0fd636723b..0d64d0f4641 100644 --- a/arch/mips/jazz/jazzdma.c +++ b/arch/mips/jazz/jazzdma.c @@ -190,7 +190,7 @@ int vdma_free(unsigned long laddr) return -1; } - while (pgtbl[i].owner == laddr && i < VDMA_PGTBL_ENTRIES) { + while (i < VDMA_PGTBL_ENTRIES && pgtbl[i].owner == laddr) { pgtbl[i].owner = VDMA_PAGE_EMPTY; i++; } diff --git a/arch/mips/kernel/head.S b/arch/mips/kernel/head.S index 492a0a8d70f..531ce7b1612 100644 --- a/arch/mips/kernel/head.S +++ b/arch/mips/kernel/head.S @@ -188,7 +188,8 @@ NESTED(kernel_entry, 16, sp) # kernel entry point MTC0 zero, CP0_CONTEXT # clear context register PTR_LA $28, init_thread_union - PTR_LI sp, _THREAD_SIZE - 32 + /* Set the SP after an empty pt_regs. */ + PTR_LI sp, _THREAD_SIZE - 32 - PT_SIZE PTR_ADDU sp, $28 set_saved_sp sp, t0, t1 PTR_SUBU sp, 4 * SZREG # init stack pointer diff --git a/arch/mips/kernel/irq_txx9.c b/arch/mips/kernel/irq_txx9.c index a4d1462c27f..9b78029bea7 100644 --- a/arch/mips/kernel/irq_txx9.c +++ b/arch/mips/kernel/irq_txx9.c @@ -1,6 +1,4 @@ /* - * linux/arch/mips/kernel/irq_txx9.c - * * Based on linux/arch/mips/jmr3927/rbhma3100/irq.c, * linux/arch/mips/tx4927/common/tx4927_irq.c, * linux/arch/mips/tx4938/common/irq.c diff --git a/arch/mips/kernel/module.c b/arch/mips/kernel/module.c index 3e9100dcc12..6f51dda87fc 100644 --- a/arch/mips/kernel/module.c +++ b/arch/mips/kernel/module.c @@ -98,7 +98,8 @@ static int apply_r_mips_32_rela(struct module *me, u32 *location, Elf_Addr v) static int apply_r_mips_26_rel(struct module *me, u32 *location, Elf_Addr v) { if (v % 4) { - printk(KERN_ERR "module %s: dangerous relocation\n", me->name); + pr_err("module %s: dangerous R_MIPS_26 REL relocation\n", + me->name); return -ENOEXEC; } @@ -118,7 +119,8 @@ static int apply_r_mips_26_rel(struct module *me, u32 *location, Elf_Addr v) static int apply_r_mips_26_rela(struct module *me, u32 *location, Elf_Addr v) { if (v % 4) { - printk(KERN_ERR "module %s: dangerous relocation\n", me->name); + pr_err("module %s: dangerous R_MIPS_26 RELArelocation\n", + me->name); return -ENOEXEC; } @@ -222,7 +224,7 @@ static int apply_r_mips_lo16_rel(struct module *me, u32 *location, Elf_Addr v) return 0; out_danger: - printk(KERN_ERR "module %s: dangerous " "relocation\n", me->name); + pr_err("module %s: dangerous R_MIPS_LO16 REL relocation\n", me->name); return -ENOEXEC; } @@ -301,7 +303,7 @@ int apply_relocate(Elf_Shdr *sechdrs, const char *strtab, /* This is the symbol it is referring to */ sym = (Elf_Sym *)sechdrs[symindex].sh_addr + ELF_MIPS_R_SYM(rel[i]); - if (!sym->st_value) { + if (IS_ERR_VALUE(sym->st_value)) { /* Ignore unresolved weak symbol */ if (ELF_ST_BIND(sym->st_info) == STB_WEAK) continue; @@ -341,7 +343,7 @@ int apply_relocate_add(Elf_Shdr *sechdrs, const char *strtab, /* This is the symbol it is referring to */ sym = (Elf_Sym *)sechdrs[symindex].sh_addr + ELF_MIPS_R_SYM(rel[i]); - if (!sym->st_value) { + if (IS_ERR_VALUE(sym->st_value)) { /* Ignore unresolved weak symbol */ if (ELF_ST_BIND(sym->st_info) == STB_WEAK) continue; diff --git a/arch/mips/kernel/proc.c b/arch/mips/kernel/proc.c index e0a4ac18fa0..26109c4d517 100644 --- a/arch/mips/kernel/proc.c +++ b/arch/mips/kernel/proc.c @@ -1,6 +1,4 @@ /* - * linux/arch/mips/kernel/proc.c - * * Copyright (C) 1995, 1996, 2001 Ralf Baechle * Copyright (C) 2001, 2004 MIPS Technologies, Inc. * Copyright (C) 2004 Maciej W. Rozycki diff --git a/arch/mips/kernel/process.c b/arch/mips/kernel/process.c index c09d681b718..f3d73e1831c 100644 --- a/arch/mips/kernel/process.c +++ b/arch/mips/kernel/process.c @@ -115,7 +115,7 @@ int copy_thread(unsigned long clone_flags, unsigned long usp, { struct thread_info *ti = task_thread_info(p); struct pt_regs *childregs; - long childksp; + unsigned long childksp; p->set_child_tid = p->clear_child_tid = NULL; childksp = (unsigned long)task_stack_page(p) + THREAD_SIZE - 32; @@ -132,6 +132,8 @@ int copy_thread(unsigned long clone_flags, unsigned long usp, /* set up new TSS. */ childregs = (struct pt_regs *) childksp - 1; + /* Put the stack after the struct pt_regs. */ + childksp = (unsigned long) childregs; *childregs = *regs; childregs->regs[7] = 0; /* Clear error flag */ diff --git a/arch/mips/kernel/scall32-o32.S b/arch/mips/kernel/scall32-o32.S index 20a86e08fd5..b5708212353 100644 --- a/arch/mips/kernel/scall32-o32.S +++ b/arch/mips/kernel/scall32-o32.S @@ -654,6 +654,7 @@ einval: li v0, -ENOSYS sys sys_pwritev 6 sys sys_rt_tgsigqueueinfo 4 sys sys_perf_counter_open 5 + sys sys_accept4 4 .endm /* We pre-compute the number of _instruction_ bytes needed to diff --git a/arch/mips/kernel/scall64-64.S b/arch/mips/kernel/scall64-64.S index b046130d4c5..3d866f24e06 100644 --- a/arch/mips/kernel/scall64-64.S +++ b/arch/mips/kernel/scall64-64.S @@ -491,4 +491,5 @@ sys_call_table: PTR sys_pwritev /* 5390 */ PTR sys_rt_tgsigqueueinfo PTR sys_perf_counter_open + PTR sys_accept4 .size sys_call_table,.-sys_call_table diff --git a/arch/mips/kernel/scall64-n32.S b/arch/mips/kernel/scall64-n32.S index 15874f9812c..e855b118a07 100644 --- a/arch/mips/kernel/scall64-n32.S +++ b/arch/mips/kernel/scall64-n32.S @@ -417,4 +417,5 @@ EXPORT(sysn32_call_table) PTR sys_pwritev PTR compat_sys_rt_tgsigqueueinfo /* 5295 */ PTR sys_perf_counter_open + PTR sys_accept4 .size sysn32_call_table,.-sysn32_call_table diff --git a/arch/mips/kernel/scall64-o32.S b/arch/mips/kernel/scall64-o32.S index 781e0f1e953..0c49f1a660b 100644 --- a/arch/mips/kernel/scall64-o32.S +++ b/arch/mips/kernel/scall64-o32.S @@ -537,4 +537,5 @@ sys_call_table: PTR compat_sys_pwritev PTR compat_sys_rt_tgsigqueueinfo PTR sys_perf_counter_open + PTR sys_accept4 .size sys_call_table,.-sys_call_table diff --git a/arch/mips/kernel/smtc.c b/arch/mips/kernel/smtc.c index 8a0626cbb10..c16bb6d6c25 100644 --- a/arch/mips/kernel/smtc.c +++ b/arch/mips/kernel/smtc.c @@ -465,11 +465,8 @@ void smtc_prepare_cpus(int cpus) smtc_configure_tlb(); for (tc = 0, vpe = 0 ; (vpe < nvpe) && (tc < ntc) ; vpe++) { - /* - * Set the MVP bits. - */ - settc(tc); - write_vpe_c0_vpeconf0(read_vpe_c0_vpeconf0() | VPECONF0_MVP); + if (tcpervpe[vpe] == 0) + continue; if (vpe != 0) printk(", "); printk("VPE %d: TC", vpe); @@ -488,6 +485,12 @@ void smtc_prepare_cpus(int cpus) } if (vpe != 0) { /* + * Allow this VPE to control others. + */ + write_vpe_c0_vpeconf0(read_vpe_c0_vpeconf0() | + VPECONF0_MVP); + + /* * Clear any stale software interrupts from VPE's Cause */ write_vpe_c0_cause(0); diff --git a/arch/mips/kernel/stacktrace.c b/arch/mips/kernel/stacktrace.c index 58f5cd76c8c..d52ff77baf3 100644 --- a/arch/mips/kernel/stacktrace.c +++ b/arch/mips/kernel/stacktrace.c @@ -1,6 +1,4 @@ /* - * arch/mips/kernel/stacktrace.c - * * Stack trace management functions * * Copyright (C) 2006 Atsushi Nemoto <anemo@mba.ocn.ne.jp> diff --git a/arch/mips/kernel/vpe.c b/arch/mips/kernel/vpe.c index 07b9ec2c6e3..9a1ab7e87fd 100644 --- a/arch/mips/kernel/vpe.c +++ b/arch/mips/kernel/vpe.c @@ -73,7 +73,7 @@ static int major; static const int minor = 1; /* fixed for now */ #ifdef CONFIG_MIPS_APSP_KSPD - static struct kspd_notifications kspd_events; +static struct kspd_notifications kspd_events; static int kspd_events_reqd = 0; #endif @@ -155,10 +155,9 @@ struct { }; static void release_progmem(void *ptr); -extern void save_gp_address(unsigned int secbase, unsigned int rel); /* get the vpe associated with this minor */ -struct vpe *get_vpe(int minor) +static struct vpe *get_vpe(int minor) { struct vpe *v; @@ -174,7 +173,7 @@ struct vpe *get_vpe(int minor) } /* get the vpe associated with this minor */ -struct tc *get_tc(int index) +static struct tc *get_tc(int index) { struct tc *t; @@ -186,20 +185,8 @@ struct tc *get_tc(int index) return NULL; } -struct tc *get_tc_unused(void) -{ - struct tc *t; - - list_for_each_entry(t, &vpecontrol.tc_list, list) { - if (t->state == TC_STATE_UNUSED) - return t; - } - - return NULL; -} - /* allocate a vpe and associate it with this minor (or index) */ -struct vpe *alloc_vpe(int minor) +static struct vpe *alloc_vpe(int minor) { struct vpe *v; @@ -216,7 +203,7 @@ struct vpe *alloc_vpe(int minor) } /* allocate a tc. At startup only tc0 is running, all other can be halted. */ -struct tc *alloc_tc(int index) +static struct tc *alloc_tc(int index) { struct tc *tc; @@ -232,7 +219,7 @@ out: } /* clean up and free everything */ -void release_vpe(struct vpe *v) +static void release_vpe(struct vpe *v) { list_del(&v->list); if (v->load_addr) @@ -240,7 +227,7 @@ void release_vpe(struct vpe *v) kfree(v); } -void dump_mtregs(void) +static void dump_mtregs(void) { unsigned long val; @@ -327,7 +314,8 @@ static void layout_sections(struct module *mod, const Elf_Ehdr * hdr, || (s->sh_flags & masks[m][1]) || s->sh_entsize != ~0UL) continue; - s->sh_entsize = get_offset(&mod->core_size, s); + s->sh_entsize = + get_offset((unsigned long *)&mod->core_size, s); } if (m == 0) @@ -461,16 +449,15 @@ static int apply_r_mips_lo16(struct module *me, uint32_t *location, { unsigned long insnlo = *location; Elf32_Addr val, vallo; + struct mips_hi16 *l, *next; /* Sign extend the addend we extract from the lo insn. */ vallo = ((insnlo & 0xffff) ^ 0x8000) - 0x8000; if (mips_hi16_list != NULL) { - struct mips_hi16 *l; l = mips_hi16_list; while (l != NULL) { - struct mips_hi16 *next; unsigned long insn; /* @@ -480,7 +467,7 @@ static int apply_r_mips_lo16(struct module *me, uint32_t *location, printk(KERN_DEBUG "VPE loader: " "apply_r_mips_lo16/hi16: \t" "inconsistent value information\n"); - return -ENOEXEC; + goto out_free; } /* @@ -518,6 +505,16 @@ static int apply_r_mips_lo16(struct module *me, uint32_t *location, *location = insnlo; return 0; + +out_free: + while (l != NULL) { + next = l->next; + kfree(l); + l = next; + } + mips_hi16_list = NULL; + + return -ENOEXEC; } static int (*reloc_handlers[]) (struct module *me, uint32_t *location, @@ -541,7 +538,7 @@ static char *rstrs[] = { [R_MIPS_PC16] = "MIPS_PC16" }; -int apply_relocations(Elf32_Shdr *sechdrs, +static int apply_relocations(Elf32_Shdr *sechdrs, const char *strtab, unsigned int symindex, unsigned int relsec, @@ -586,7 +583,7 @@ int apply_relocations(Elf32_Shdr *sechdrs, return 0; } -void save_gp_address(unsigned int secbase, unsigned int rel) +static inline void save_gp_address(unsigned int secbase, unsigned int rel) { gp_addr = secbase + rel; gp_offs = gp_addr - (secbase & 0xffff0000); diff --git a/arch/mips/mipssim/sim_time.c b/arch/mips/mipssim/sim_time.c index 0cea932f124..5492c42f765 100644 --- a/arch/mips/mipssim/sim_time.c +++ b/arch/mips/mipssim/sim_time.c @@ -89,13 +89,13 @@ unsigned __cpuinit get_c0_compare_int(void) if (cpu_has_veic) { set_vi_handler(MSC01E_INT_CPUCTR, mips_timer_dispatch); mips_cpu_timer_irq = MSC01E_INT_BASE + MSC01E_INT_CPUCTR; - } else { -#endif - { - if (cpu_has_vint) - set_vi_handler(cp0_compare_irq, mips_timer_dispatch); - mips_cpu_timer_irq = MIPS_CPU_IRQ_BASE + cp0_compare_irq; + + return mips_cpu_timer_irq; } +#endif + if (cpu_has_vint) + set_vi_handler(cp0_compare_irq, mips_timer_dispatch); + mips_cpu_timer_irq = MIPS_CPU_IRQ_BASE + cp0_compare_irq; return mips_cpu_timer_irq; } diff --git a/arch/mips/mm/c-octeon.c b/arch/mips/mm/c-octeon.c index b165cdcb281..10ab69f7183 100644 --- a/arch/mips/mm/c-octeon.c +++ b/arch/mips/mm/c-octeon.c @@ -289,7 +289,7 @@ static void cache_parity_error_octeon(int non_recoverable) } /** - * Called when the the exception is not recoverable + * Called when the the exception is recoverable */ asmlinkage void cache_parity_error_octeon_recoverable(void) @@ -298,7 +298,7 @@ asmlinkage void cache_parity_error_octeon_recoverable(void) } /** - * Called when the the exception is recoverable + * Called when the the exception is not recoverable */ asmlinkage void cache_parity_error_octeon_non_recoverable(void) diff --git a/arch/mips/mm/extable.c b/arch/mips/mm/extable.c index 297fb9f390d..9d25d2ba4b9 100644 --- a/arch/mips/mm/extable.c +++ b/arch/mips/mm/extable.c @@ -1,5 +1,9 @@ /* - * linux/arch/mips/mm/extable.c + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * Copyright (C) 1997, 99, 2001 - 2004 Ralf Baechle <ralf@linux-mips.org> */ #include <linux/module.h> #include <linux/spinlock.h> diff --git a/arch/mips/mm/fault.c b/arch/mips/mm/fault.c index 6751ce9ede9..f956ecbb813 100644 --- a/arch/mips/mm/fault.c +++ b/arch/mips/mm/fault.c @@ -171,6 +171,7 @@ out_of_memory: * We ran out of memory, call the OOM killer, and return the userspace * (which will retry the fault, or kill us if we got oom-killed). */ + up_read(&mm->mmap_sem); pagefault_out_of_memory(); return; diff --git a/arch/mips/mti-malta/malta-int.c b/arch/mips/mti-malta/malta-int.c index a8756f82c31..3e0a9b35ba5 100644 --- a/arch/mips/mti-malta/malta-int.c +++ b/arch/mips/mti-malta/malta-int.c @@ -331,6 +331,7 @@ static struct irqaction irq_call = { .flags = IRQF_DISABLED|IRQF_PERCPU, .name = "IPI_call" }; +#endif /* CONFIG_MIPS_MT_SMP */ static int gic_resched_int_base; static int gic_call_int_base; @@ -346,7 +347,6 @@ unsigned int plat_ipi_resched_int_xlate(unsigned int cpu) { return GIC_RESCHED_INT(cpu); } -#endif /* CONFIG_MIPS_MT_SMP */ static struct irqaction i8259irq = { .handler = no_action, diff --git a/arch/mips/nxp/pnx8550/common/time.c b/arch/mips/nxp/pnx8550/common/time.c index 8df43e9e4d9..18b19278487 100644 --- a/arch/mips/nxp/pnx8550/common/time.c +++ b/arch/mips/nxp/pnx8550/common/time.c @@ -138,7 +138,7 @@ __init void plat_time_init(void) * HZ timer interrupts per second. */ mips_hpt_frequency = 27UL * ((1000000UL * n)/(m * pow2p)); - cpj = (mips_hpt_frequency + HZ / 2) / HZ; + cpj = DIV_ROUND_CLOSEST(mips_hpt_frequency, HZ); write_c0_count(0); timer_ack(); diff --git a/arch/mips/pci/fixup-emma2rh.c b/arch/mips/pci/fixup-emma2rh.c index fba5aad00d5..0d9ccf4dfc5 100644 --- a/arch/mips/pci/fixup-emma2rh.c +++ b/arch/mips/pci/fixup-emma2rh.c @@ -1,7 +1,4 @@ /* - * arch/mips/pci/fixup-emma2rh.c - * This file defines the PCI configration. - * * Copyright (C) NEC Electronics Corporation 2004-2006 * * This file is based on the arch/mips/ddb5xxx/ddb5477/pci.c diff --git a/arch/mips/pci/fixup-sb1250.c b/arch/mips/pci/fixup-sb1250.c index 0ad39e53f7b..f0bb9146e6c 100644 --- a/arch/mips/pci/fixup-sb1250.c +++ b/arch/mips/pci/fixup-sb1250.c @@ -1,6 +1,4 @@ /* - * arch/mips/pci/fixup-sb1250.c - * * Copyright (C) 2004, 2006 MIPS Technologies, Inc. All rights reserved. * Author: Maciej W. Rozycki <macro@mips.com> * diff --git a/arch/mips/pci/ops-emma2rh.c b/arch/mips/pci/ops-emma2rh.c index 5947a70b0b7..710aef5c070 100644 --- a/arch/mips/pci/ops-emma2rh.c +++ b/arch/mips/pci/ops-emma2rh.c @@ -1,7 +1,4 @@ /* - * arch/mips/pci/ops-emma2rh.c - * This file defines the PCI operation for EMMA2RH. - * * Copyright (C) NEC Electronics Corporation 2004-2006 * * This file is based on the arch/mips/pci/ops-vr41xx.c diff --git a/arch/mips/pci/pci-emma2rh.c b/arch/mips/pci/pci-emma2rh.c index 2df4190232c..773e34ff4d1 100644 --- a/arch/mips/pci/pci-emma2rh.c +++ b/arch/mips/pci/pci-emma2rh.c @@ -1,7 +1,4 @@ /* - * arch/mips/pci/pci-emma2rh.c - * This file defines the PCI configration. - * * Copyright (C) NEC Electronics Corporation 2004-2006 * * This file is based on the arch/mips/ddb5xxx/ddb5477/pci.c diff --git a/arch/mips/pci/pci-tx4927.c b/arch/mips/pci/pci-tx4927.c index aaa90059679..a5807406a7f 100644 --- a/arch/mips/pci/pci-tx4927.c +++ b/arch/mips/pci/pci-tx4927.c @@ -1,6 +1,4 @@ /* - * linux/arch/mips/pci/pci-tx4927.c - * * Based on linux/arch/mips/txx9/rbtx4938/setup.c, * and RBTX49xx patch from CELF patch archive. * diff --git a/arch/mips/pci/pci-tx4938.c b/arch/mips/pci/pci-tx4938.c index 1ea257bc3b8..20e45f30b2e 100644 --- a/arch/mips/pci/pci-tx4938.c +++ b/arch/mips/pci/pci-tx4938.c @@ -1,6 +1,4 @@ /* - * linux/arch/mips/pci/pci-tx4938.c - * * Based on linux/arch/mips/txx9/rbtx4938/setup.c, * and RBTX49xx patch from CELF patch archive. * diff --git a/arch/mips/pci/pci-tx4939.c b/arch/mips/pci/pci-tx4939.c index 5fecf1cdc32..9ef840693ba 100644 --- a/arch/mips/pci/pci-tx4939.c +++ b/arch/mips/pci/pci-tx4939.c @@ -1,6 +1,4 @@ /* - * linux/arch/mips/pci/pci-tx4939.c - * * Based on linux/arch/mips/txx9/rbtx4939/setup.c, * and RBTX49xx patch from CELF patch archive. * diff --git a/arch/mips/pci/pcie-octeon.c b/arch/mips/pci/pcie-octeon.c index 75262247f3e..6aa5c542d52 100644 --- a/arch/mips/pci/pcie-octeon.c +++ b/arch/mips/pci/pcie-octeon.c @@ -1040,19 +1040,29 @@ static inline int octeon_pcie_read_config(int pcie_port, struct pci_bus *bus, int bus_number = bus->number; /* - * We need to force the bus number to be zero on the root - * bus. Linux numbers the 2nd root bus to start after all - * buses on root 0. + * For the top level bus make sure our hardware bus number + * matches the software one. */ - if (bus->parent == NULL) - bus_number = 0; + if (bus->parent == NULL) { + union cvmx_pciercx_cfg006 pciercx_cfg006; + pciercx_cfg006.u32 = cvmx_pcie_cfgx_read(pcie_port, + CVMX_PCIERCX_CFG006(pcie_port)); + if (pciercx_cfg006.s.pbnum != bus_number) { + pciercx_cfg006.s.pbnum = bus_number; + pciercx_cfg006.s.sbnum = bus_number; + pciercx_cfg006.s.subbnum = bus_number; + cvmx_pcie_cfgx_write(pcie_port, + CVMX_PCIERCX_CFG006(pcie_port), + pciercx_cfg006.u32); + } + } /* * PCIe only has a single device connected to Octeon. It is * always device ID 0. Don't bother doing reads for other * device IDs on the first segment. */ - if ((bus_number == 0) && (devfn >> 3 != 0)) + if ((bus->parent == NULL) && (devfn >> 3 != 0)) return PCIBIOS_FUNC_NOT_SUPPORTED; /* @@ -1070,7 +1080,7 @@ static inline int octeon_pcie_read_config(int pcie_port, struct pci_bus *bus, * bridge only respondes to device ID 0, function * 0-1 */ - if ((bus_number == 0) && (devfn >= 2)) + if ((bus->parent == NULL) && (devfn >= 2)) return PCIBIOS_FUNC_NOT_SUPPORTED; /* * The PCI-X slots are device ID 2,3. Choose one of @@ -1167,13 +1177,6 @@ static inline int octeon_pcie_write_config(int pcie_port, struct pci_bus *bus, int size, u32 val) { int bus_number = bus->number; - /* - * We need to force the bus number to be zero on the root - * bus. Linux numbers the 2nd root bus to start after all - * busses on root 0. - */ - if (bus->parent == NULL) - bus_number = 0; switch (size) { case 4: diff --git a/arch/mips/pmc-sierra/msp71xx/gpio.c b/arch/mips/pmc-sierra/msp71xx/gpio.c index 69848c5813e..aaccbe52438 100644 --- a/arch/mips/pmc-sierra/msp71xx/gpio.c +++ b/arch/mips/pmc-sierra/msp71xx/gpio.c @@ -1,6 +1,4 @@ /* - * @file /arch/mips/pmc-sierra/msp71xx/gpio.c - * * Generic PMC MSP71xx GPIO handling. These base gpio are controlled by two * types of registers. The data register sets the output level when in output * mode and when in input mode will contain the value at the input. The config diff --git a/arch/mips/pmc-sierra/msp71xx/gpio_extended.c b/arch/mips/pmc-sierra/msp71xx/gpio_extended.c index fc6dbc6cf1c..2a99f360fae 100644 --- a/arch/mips/pmc-sierra/msp71xx/gpio_extended.c +++ b/arch/mips/pmc-sierra/msp71xx/gpio_extended.c @@ -1,6 +1,4 @@ /* - * @file /arch/mips/pmc-sierra/msp71xx/gpio_extended.c - * * Generic PMC MSP71xx EXTENDED (EXD) GPIO handling. The extended gpio is * a set of hardware registers that have no need for explicit locking as * it is handled by unique method of writing individual set/clr bits. diff --git a/arch/mips/pmc-sierra/msp71xx/msp_irq_slp.c b/arch/mips/pmc-sierra/msp71xx/msp_irq_slp.c index f5f1b8d2bb9..61f39023234 100644 --- a/arch/mips/pmc-sierra/msp71xx/msp_irq_slp.c +++ b/arch/mips/pmc-sierra/msp71xx/msp_irq_slp.c @@ -45,13 +45,6 @@ static inline void mask_msp_slp_irq(unsigned int irq) */ static inline void ack_msp_slp_irq(unsigned int irq) { - mask_slp_irq(irq); - - /* - * only really necessary for 18, 16-14 and sometimes 3:0 (since - * these can be edge sensitive) but it doesn't hurt for the others. - */ - /* check for PER interrupt range */ if (irq < MSP_PER_INTBASE) *SLP_INT_STS_REG = (1 << (irq - MSP_SLP_INTBASE)); @@ -62,8 +55,7 @@ static inline void ack_msp_slp_irq(unsigned int irq) static struct irq_chip msp_slp_irq_controller = { .name = "MSP_SLP", .ack = ack_msp_slp_irq, - .mask = ack_msp_slp_irq, - .mask_ack = ack_msp_slp_irq, + .mask = mask_msp_slp_irq, .unmask = unmask_msp_slp_irq, }; @@ -79,7 +71,7 @@ void __init msp_slp_irq_init(void) /* initialize all the IRQ descriptors */ for (i = MSP_SLP_INTBASE; i < MSP_PER_INTBASE + 32; i++) - set_irq_chip_and_handler(i, &msp_slp_irq_controller + set_irq_chip_and_handler(i, &msp_slp_irq_controller, handle_level_irq); } diff --git a/arch/mips/pmc-sierra/yosemite/atmel_read_eeprom.c b/arch/mips/pmc-sierra/yosemite/atmel_read_eeprom.c index caf5e9a0acc..fc990cb3194 100644 --- a/arch/mips/pmc-sierra/yosemite/atmel_read_eeprom.c +++ b/arch/mips/pmc-sierra/yosemite/atmel_read_eeprom.c @@ -1,6 +1,4 @@ /* - * arch/mips/pmc-sierra/yosemite/atmel_read_eeprom.c - * * Copyright (C) 2003 PMC-Sierra Inc. * Author: Manish Lachwani (lachwani@pmc-sierra.com) * diff --git a/arch/mips/sibyte/swarm/swarm-i2c.c b/arch/mips/sibyte/swarm/swarm-i2c.c index 4282ac9d01d..062505054d4 100644 --- a/arch/mips/sibyte/swarm/swarm-i2c.c +++ b/arch/mips/sibyte/swarm/swarm-i2c.c @@ -1,6 +1,4 @@ /* - * arch/mips/sibyte/swarm/swarm-i2c.c - * * Broadcom BCM91250A (SWARM), etc. I2C platform setup. * * Copyright (c) 2008 Maciej W. Rozycki diff --git a/arch/mips/txx9/generic/mem_tx4927.c b/arch/mips/txx9/generic/mem_tx4927.c index ef6ea6e9787..70f9626f822 100644 --- a/arch/mips/txx9/generic/mem_tx4927.c +++ b/arch/mips/txx9/generic/mem_tx4927.c @@ -1,6 +1,4 @@ /* - * linux/arch/mips/txx9/generic/mem_tx4927.c - * * common tx4927 memory interface * * Author: MontaVista Software, Inc. diff --git a/arch/mips/txx9/generic/setup.c b/arch/mips/txx9/generic/setup.c index 3b7d77d61ce..a205e2ba8e7 100644 --- a/arch/mips/txx9/generic/setup.c +++ b/arch/mips/txx9/generic/setup.c @@ -1,6 +1,4 @@ /* - * linux/arch/mips/txx9/generic/setup.c - * * Based on linux/arch/mips/txx9/rbtx4938/setup.c, * and RBTX49xx patch from CELF patch archive. * diff --git a/arch/mips/txx9/rbtx4939/setup.c b/arch/mips/txx9/rbtx4939/setup.c index c033ffe71cd..b0c241ecf60 100644 --- a/arch/mips/txx9/rbtx4939/setup.c +++ b/arch/mips/txx9/rbtx4939/setup.c @@ -512,10 +512,10 @@ static void __init rbtx4939_setup(void) rbtx4939_ebusc_setup(); /* always enable ATA0 */ txx9_set64(&tx4939_ccfgptr->pcfg, TX4939_PCFG_ATA0MODE); - rbtx4939_update_ioc_pen(); if (txx9_master_clock == 0) txx9_master_clock = 20000000; tx4939_setup(); + rbtx4939_update_ioc_pen(); #ifdef HAVE_RBTX4939_IOSWAB ioswabw = rbtx4939_ioswabw; __mem_ioswabw = rbtx4939_mem_ioswabw; |