diff options
author | Nicolas Pitre <nicolas.pitre@linaro.org> | 2011-02-28 15:38:15 -0500 |
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committer | Nicolas Pitre <nicolas.pitre@linaro.org> | 2011-02-28 15:38:15 -0500 |
commit | 3b99255148bd5a40586944d0110f741c41db5f43 (patch) | |
tree | 2e1782b310a1252df85626d1efc7ccb30ba382d8 /arch | |
parent | c7e88a87fa8e2e853b180bdadf2d7f5456f8c9d6 (diff) | |
parent | 230389ddb190d8d98c48e15c6e3ded7773903ce5 (diff) |
Merge branch 'omap_cpuidle' into linaro-2.6.38
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/mach-omap2/board-3630sdp.c | 19 | ||||
-rw-r--r-- | arch/arm/mach-omap2/board-zoom.c | 19 | ||||
-rw-r--r-- | arch/arm/mach-omap2/cpuidle34xx.c | 49 |
3 files changed, 71 insertions, 16 deletions
diff --git a/arch/arm/mach-omap2/board-3630sdp.c b/arch/arm/mach-omap2/board-3630sdp.c index 62645640f5e..8d05fc94f51 100644 --- a/arch/arm/mach-omap2/board-3630sdp.c +++ b/arch/arm/mach-omap2/board-3630sdp.c @@ -25,6 +25,24 @@ #include "board-flash.h" #include "mux.h" #include "sdram-hynix-h8mbx00u0mer-0em.h" +#include "pm.h" + +static struct cpuidle_params omap36xx_cpuidle_params_table[] = { + /* C1 */ + {1, 74, 78, 152}, + /* C2 */ + {0, 165, 90, 255}, + /* C3 */ + {1, 163, 180, 345}, + /* C4 */ + {0, 2852, 605, 3457}, + /* C5 */ + {1, 800, 366, 2120}, + /* C6 */ + {0, 4080, 801, 4881}, + /* C7 */ + {1, 4300, 8794, 159000}, +}; #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) @@ -212,6 +230,7 @@ static void __init omap_sdp_init(void) board_flash_init(sdp_flash_partitions, chip_sel_sdp); enable_board_wakeup_source(); usb_ehci_init(&ehci_pdata); + omap3_pm_init_cpuidle(omap36xx_cpuidle_params_table); } MACHINE_START(OMAP_3630SDP, "OMAP 3630SDP board") diff --git a/arch/arm/mach-omap2/board-zoom.c b/arch/arm/mach-omap2/board-zoom.c index e26754c24ee..6bd364afe66 100644 --- a/arch/arm/mach-omap2/board-zoom.c +++ b/arch/arm/mach-omap2/board-zoom.c @@ -30,6 +30,24 @@ #include "mux.h" #include "sdram-micron-mt46h32m32lf-6.h" #include "sdram-hynix-h8mbx00u0mer-0em.h" +#include "pm.h" + +static struct cpuidle_params omap36xx_cpuidle_params_table[] = { + /* C1 */ + {1, 74, 78, 152}, + /* C2 */ + {0, 165, 90, 255}, + /* C3 */ + {1, 163, 180, 345}, + /* C4 */ + {0, 2852, 605, 3457}, + /* C5 */ + {1, 800, 366, 2120}, + /* C6 */ + {0, 4080, 801, 4881}, + /* C7 */ + {1, 4300, 8794, 159000}, +}; #define ZOOM3_EHCI_RESET_GPIO 64 @@ -126,6 +144,7 @@ static void __init omap_zoom_init(void) usb_ehci_init(&ehci_pdata); } + omap3_pm_init_cpuidle(omap36xx_cpuidle_params_table); board_nand_init(zoom_nand_partitions, ARRAY_SIZE(zoom_nand_partitions), ZOOM_NAND_CS); zoom_debugboard_init(); diff --git a/arch/arm/mach-omap2/cpuidle34xx.c b/arch/arm/mach-omap2/cpuidle34xx.c index f7b22a16f38..bc9bcac2ec0 100644 --- a/arch/arm/mach-omap2/cpuidle34xx.c +++ b/arch/arm/mach-omap2/cpuidle34xx.c @@ -51,6 +51,7 @@ struct omap3_processor_cx { u8 valid; + u8 enabled; u8 type; u32 sleep_latency; u32 wakeup_latency; @@ -139,19 +140,9 @@ static int omap3_enter_idle(struct cpuidle_device *dev, if (omap_irq_pending() || need_resched()) goto return_sleep_time; - if (cx->type == OMAP3_STATE_C1) { - pwrdm_for_each_clkdm(mpu_pd, _cpuidle_deny_idle); - pwrdm_for_each_clkdm(core_pd, _cpuidle_deny_idle); - } - /* Execute ARM wfi */ omap_sram_idle(); - if (cx->type == OMAP3_STATE_C1) { - pwrdm_for_each_clkdm(mpu_pd, _cpuidle_allow_idle); - pwrdm_for_each_clkdm(core_pd, _cpuidle_allow_idle); - } - return_sleep_time: getnstimeofday(&ts_postidle); ts_idle = timespec_sub(ts_postidle, ts_preidle); @@ -283,8 +274,18 @@ static int omap3_enter_idle_bm(struct cpuidle_device *dev, select_state: dev->last_state = new_state; + + if (new_state == dev->safe_state) { + pwrdm_for_each_clkdm(mpu_pd, _cpuidle_deny_idle); + pwrdm_for_each_clkdm(core_pd, _cpuidle_deny_idle); + } ret = omap3_enter_idle(dev, new_state); + if (new_state == dev->safe_state) { + pwrdm_for_each_clkdm(mpu_pd, _cpuidle_allow_idle); + pwrdm_for_each_clkdm(core_pd, _cpuidle_allow_idle); + } + /* Restore original PER state if it was modified */ if (per_next_state != per_saved_state) pwrdm_set_next_pwrst(per_pd, per_saved_state); @@ -309,12 +310,13 @@ void omap3_cpuidle_update_states(u32 mpu_deepest_state, u32 core_deepest_state) for (i = OMAP3_STATE_C1; i < OMAP3_MAX_STATES; i++) { struct omap3_processor_cx *cx = &omap3_power_states[i]; - - if ((cx->mpu_state >= mpu_deepest_state) && - (cx->core_state >= core_deepest_state)) { - cx->valid = 1; - } else { - cx->valid = 0; + if (cx->enabled) { + if ((cx->mpu_state >= mpu_deepest_state) && + (cx->core_state >= core_deepest_state)) { + cx->valid = 1; + } else { + cx->valid = 0; + } } } } @@ -355,6 +357,8 @@ void omap_init_power_states(void) /* C1 . MPU WFI + Core active */ omap3_power_states[OMAP3_STATE_C1].valid = cpuidle_params_table[OMAP3_STATE_C1].valid; + omap3_power_states[OMAP3_STATE_C1].enabled = + cpuidle_params_table[OMAP3_STATE_C1].valid; omap3_power_states[OMAP3_STATE_C1].type = OMAP3_STATE_C1; omap3_power_states[OMAP3_STATE_C1].sleep_latency = cpuidle_params_table[OMAP3_STATE_C1].sleep_latency; @@ -369,6 +373,8 @@ void omap_init_power_states(void) /* C2 . MPU WFI + Core inactive */ omap3_power_states[OMAP3_STATE_C2].valid = cpuidle_params_table[OMAP3_STATE_C2].valid; + omap3_power_states[OMAP3_STATE_C2].enabled = + cpuidle_params_table[OMAP3_STATE_C2].valid; omap3_power_states[OMAP3_STATE_C2].type = OMAP3_STATE_C2; omap3_power_states[OMAP3_STATE_C2].sleep_latency = cpuidle_params_table[OMAP3_STATE_C2].sleep_latency; @@ -384,6 +390,8 @@ void omap_init_power_states(void) /* C3 . MPU CSWR + Core inactive */ omap3_power_states[OMAP3_STATE_C3].valid = cpuidle_params_table[OMAP3_STATE_C3].valid; + omap3_power_states[OMAP3_STATE_C3].enabled = + cpuidle_params_table[OMAP3_STATE_C3].valid; omap3_power_states[OMAP3_STATE_C3].type = OMAP3_STATE_C3; omap3_power_states[OMAP3_STATE_C3].sleep_latency = cpuidle_params_table[OMAP3_STATE_C3].sleep_latency; @@ -399,6 +407,8 @@ void omap_init_power_states(void) /* C4 . MPU OFF + Core inactive */ omap3_power_states[OMAP3_STATE_C4].valid = cpuidle_params_table[OMAP3_STATE_C4].valid; + omap3_power_states[OMAP3_STATE_C4].enabled = + cpuidle_params_table[OMAP3_STATE_C4].valid; omap3_power_states[OMAP3_STATE_C4].type = OMAP3_STATE_C4; omap3_power_states[OMAP3_STATE_C4].sleep_latency = cpuidle_params_table[OMAP3_STATE_C4].sleep_latency; @@ -414,6 +424,8 @@ void omap_init_power_states(void) /* C5 . MPU CSWR + Core CSWR*/ omap3_power_states[OMAP3_STATE_C5].valid = cpuidle_params_table[OMAP3_STATE_C5].valid; + omap3_power_states[OMAP3_STATE_C5].enabled = + cpuidle_params_table[OMAP3_STATE_C5].valid; omap3_power_states[OMAP3_STATE_C5].type = OMAP3_STATE_C5; omap3_power_states[OMAP3_STATE_C5].sleep_latency = cpuidle_params_table[OMAP3_STATE_C5].sleep_latency; @@ -429,6 +441,8 @@ void omap_init_power_states(void) /* C6 . MPU OFF + Core CSWR */ omap3_power_states[OMAP3_STATE_C6].valid = cpuidle_params_table[OMAP3_STATE_C6].valid; + omap3_power_states[OMAP3_STATE_C6].enabled = + cpuidle_params_table[OMAP3_STATE_C6].valid; omap3_power_states[OMAP3_STATE_C6].type = OMAP3_STATE_C6; omap3_power_states[OMAP3_STATE_C6].sleep_latency = cpuidle_params_table[OMAP3_STATE_C6].sleep_latency; @@ -444,6 +458,8 @@ void omap_init_power_states(void) /* C7 . MPU OFF + Core OFF */ omap3_power_states[OMAP3_STATE_C7].valid = cpuidle_params_table[OMAP3_STATE_C7].valid; + omap3_power_states[OMAP3_STATE_C7].enabled = + cpuidle_params_table[OMAP3_STATE_C7].valid; omap3_power_states[OMAP3_STATE_C7].type = OMAP3_STATE_C7; omap3_power_states[OMAP3_STATE_C7].sleep_latency = cpuidle_params_table[OMAP3_STATE_C7].sleep_latency; @@ -463,6 +479,7 @@ void omap_init_power_states(void) */ if (IS_PM34XX_ERRATUM(PM_SDRC_WAKEUP_ERRATUM_i583)) { omap3_power_states[OMAP3_STATE_C7].valid = 0; + omap3_power_states[OMAP3_STATE_C7].enabled = 0; cpuidle_params_table[OMAP3_STATE_C7].valid = 0; WARN_ONCE(1, "%s: core off state C7 disabled due to i583\n", __func__); |