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authorDan Williams <dan.j.williams@intel.com>2009-09-08 14:32:24 -0700
committerDan Williams <dan.j.williams@intel.com>2009-09-08 14:32:24 -0700
commita348a7e6fdbcd2d5192a09719a479bb238fde727 (patch)
tree5ff94185f4e5a810777469d7fe7832a8ec2d3430 /crypto/Kconfig
parent808347f6a31792079e345ec865e9cfcb6e8ae6b2 (diff)
parent28d0325ce6e0a52f53d8af687e6427fee59004d3 (diff)
Merge commit 'v2.6.31-rc1' into dmaengine
Diffstat (limited to 'crypto/Kconfig')
-rw-r--r--crypto/Kconfig10
1 files changed, 10 insertions, 0 deletions
diff --git a/crypto/Kconfig b/crypto/Kconfig
index 74d0e622a51..4dfdd03e708 100644
--- a/crypto/Kconfig
+++ b/crypto/Kconfig
@@ -241,6 +241,11 @@ config CRYPTO_XTS
key size 256, 384 or 512 bits. This implementation currently
can't handle a sectorsize which is not a multiple of 16 bytes.
+config CRYPTO_FPU
+ tristate
+ select CRYPTO_BLKCIPHER
+ select CRYPTO_MANAGER
+
comment "Hash modes"
config CRYPTO_HMAC
@@ -486,6 +491,7 @@ config CRYPTO_AES_NI_INTEL
select CRYPTO_AES_X86_64
select CRYPTO_CRYPTD
select CRYPTO_ALGAPI
+ select CRYPTO_FPU
help
Use Intel AES-NI instructions for AES algorithm.
@@ -505,6 +511,10 @@ config CRYPTO_AES_NI_INTEL
See <http://csrc.nist.gov/encryption/aes/> for more information.
+ In addition to AES cipher algorithm support, the
+ acceleration for some popular block cipher mode is supported
+ too, including ECB, CBC, CTR, LRW, PCBC, XTS.
+
config CRYPTO_ANUBIS
tristate "Anubis cipher algorithm"
select CRYPTO_ALGAPI