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authorLinus Torvalds <torvalds@linux-foundation.org>2012-03-15 17:07:25 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2012-03-15 17:07:25 -0700
commit0c48ca8512ec099059fc532de57dbc6ffbccfb86 (patch)
tree5069ee9f240f4897c21e11f9f88b0d5c78bed2a6 /drivers/gpu/drm/i915
parent72c79bdbda396b7f67e97b2a89410ac91d814c1b (diff)
parentbb2551da10b659eab27330483828b88e898e7952 (diff)
Merge branch 'drm-fixes' of git://people.freedesktop.org/~airlied/linux
Pull drm exynos/intel updates from Dave Airlie: "Two minor updates from Jesse for Intel SNB fixes, and a few fixes from Samsung for exynos. The pull req has Alan's commit in it since Intel based their tree on my tree at that time, but it all seems fine wrt merging." * 'drm-fixes' of git://people.freedesktop.org/~airlied/linux: drm exynos: use drm_fb_helper_set_par directly drm/exynos: Fix fb_videomode <-> drm_mode_modeinfo conversion drm/exynos: fix runtime_pm fimd device state on probe drm/exynos: use correct 'exynos-drm' name for platform device drm/i915: support 32 bit BGR formats in sprite planes drm/i915: fix color order for BGR formats on SNB drm/gma500: Fix Cedarview boot failures in 3.3-rc
Diffstat (limited to 'drivers/gpu/drm/i915')
-rw-r--r--drivers/gpu/drm/i915/i915_reg.h2
-rw-r--r--drivers/gpu/drm/i915/intel_display.c1
-rw-r--r--drivers/gpu/drm/i915/intel_sprite.c6
3 files changed, 5 insertions, 4 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 03c53fcf865..558ac716a32 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -2689,7 +2689,7 @@
#define DVS_FORMAT_RGBX888 (2<<25)
#define DVS_FORMAT_RGBX161616 (3<<25)
#define DVS_SOURCE_KEY (1<<22)
-#define DVS_RGB_ORDER_RGBX (1<<20)
+#define DVS_RGB_ORDER_XBGR (1<<20)
#define DVS_YUV_BYTE_ORDER_MASK (3<<16)
#define DVS_YUV_ORDER_YUYV (0<<16)
#define DVS_YUV_ORDER_UYVY (1<<16)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index f851db7be2c..397087cf689 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -7828,6 +7828,7 @@ int intel_framebuffer_init(struct drm_device *dev,
case DRM_FORMAT_RGB332:
case DRM_FORMAT_RGB565:
case DRM_FORMAT_XRGB8888:
+ case DRM_FORMAT_XBGR8888:
case DRM_FORMAT_ARGB8888:
case DRM_FORMAT_XRGB2101010:
case DRM_FORMAT_ARGB2101010:
diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
index 2288abf88cc..a0835040c86 100644
--- a/drivers/gpu/drm/i915/intel_sprite.c
+++ b/drivers/gpu/drm/i915/intel_sprite.c
@@ -225,16 +225,16 @@ snb_update_plane(struct drm_plane *plane, struct drm_framebuffer *fb,
/* Mask out pixel format bits in case we change it */
dvscntr &= ~DVS_PIXFORMAT_MASK;
- dvscntr &= ~DVS_RGB_ORDER_RGBX;
+ dvscntr &= ~DVS_RGB_ORDER_XBGR;
dvscntr &= ~DVS_YUV_BYTE_ORDER_MASK;
switch (fb->pixel_format) {
case DRM_FORMAT_XBGR8888:
- dvscntr |= DVS_FORMAT_RGBX888;
+ dvscntr |= DVS_FORMAT_RGBX888 | DVS_RGB_ORDER_XBGR;
pixel_size = 4;
break;
case DRM_FORMAT_XRGB8888:
- dvscntr |= DVS_FORMAT_RGBX888 | DVS_RGB_ORDER_RGBX;
+ dvscntr |= DVS_FORMAT_RGBX888;
pixel_size = 4;
break;
case DRM_FORMAT_YUYV: