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authorFrancois Romieu <romieu@fr.zoreil.com>2008-07-05 00:21:15 +0200
committerFrancois Romieu <romieu@fr.zoreil.com>2008-08-17 15:53:04 +0200
commit9c14ceafa5ca7f57225a43fb0785c56ddc7f1823 (patch)
tree0c930fe3ca9110ba31b39e651e0b71a819738c0d /drivers/net/r8169.c
parent458a9f617adfb2fc5f38e7673339115c4ba3290f (diff)
r8169: use pci_find_capability for the PCI-E features
Signed-off-by: Francois Romieu <romieu@fr.zoreil.com> Cc: Edward Hsu <edward_hsu@realtek.com.tw>
Diffstat (limited to 'drivers/net/r8169.c')
-rw-r--r--drivers/net/r8169.c32
1 files changed, 24 insertions, 8 deletions
diff --git a/drivers/net/r8169.c b/drivers/net/r8169.c
index 26fa6e0c6d9..ae149a93062 100644
--- a/drivers/net/r8169.c
+++ b/drivers/net/r8169.c
@@ -61,6 +61,7 @@ static const int multicast_filter_limit = 32;
/* MAC address length */
#define MAC_ADDR_LEN 6
+#define MAX_READ_REQUEST_SHIFT 12
#define RX_FIFO_THRESH 7 /* 7 means NO threshold, Rx buffer level before first PCI xfer. */
#define RX_DMA_BURST 6 /* Maximum PCI burst, '6' is 1024 */
#define TX_DMA_BURST 6 /* Maximum PCI burst, '6' is 1024 */
@@ -412,6 +413,7 @@ struct rtl8169_private {
void (*hw_start)(struct net_device *);
unsigned int (*phy_reset_pending)(void __iomem *);
unsigned int (*link_ok)(void __iomem *);
+ int pcie_cap;
struct delayed_work task;
unsigned features;
@@ -1663,6 +1665,10 @@ rtl8169_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
goto err_out_free_res_4;
}
+ tp->pcie_cap = pci_find_capability(pdev, PCI_CAP_ID_EXP);
+ if (!tp->pcie_cap && netif_msg_probe(tp))
+ dev_info(&pdev->dev, "no PCI Express capability\n");
+
/* Unneeded ? Don't mess with Mrs. Murphy. */
rtl8169_irq_mask_and_ack(ioaddr);
@@ -2054,13 +2060,19 @@ static void rtl_hw_start_8169(struct net_device *dev)
RTL_W16(IntrMask, tp->intr_event);
}
-static void rtl_tx_performance_tweak(struct pci_dev *pdev, u8 force)
+static void rtl_tx_performance_tweak(struct pci_dev *pdev, u16 force)
{
- u8 ctl;
+ struct net_device *dev = pci_get_drvdata(pdev);
+ struct rtl8169_private *tp = netdev_priv(dev);
+ int cap = tp->pcie_cap;
+
+ if (cap) {
+ u16 ctl;
- pci_read_config_byte(pdev, 0x69, &ctl);
- ctl = (ctl & ~0x70) | force;
- pci_write_config_byte(pdev, 0x69, ctl);
+ pci_read_config_word(pdev, cap + PCI_EXP_DEVCTL, &ctl);
+ ctl = (ctl & ~PCI_EXP_DEVCTL_READRQ) | force;
+ pci_write_config_word(pdev, cap + PCI_EXP_DEVCTL, ctl);
+ }
}
static void rtl_hw_start_8168(struct net_device *dev)
@@ -2081,7 +2093,7 @@ static void rtl_hw_start_8168(struct net_device *dev)
RTL_W16(CPlusCmd, tp->cp_cmd);
- rtl_tx_performance_tweak(pdev, 0x50);
+ rtl_tx_performance_tweak(pdev, 0x5 << MAX_READ_REQUEST_SHIFT);
RTL_W16(IntrMitigate, 0x5151);
@@ -2116,8 +2128,12 @@ static void rtl_hw_start_8101(struct net_device *dev)
if ((tp->mac_version == RTL_GIGA_MAC_VER_13) ||
(tp->mac_version == RTL_GIGA_MAC_VER_16)) {
- pci_write_config_word(pdev, 0x68, 0x00);
- pci_write_config_word(pdev, 0x69, 0x08);
+ int cap = tp->pcie_cap;
+
+ if (cap) {
+ pci_write_config_word(pdev, cap + PCI_EXP_DEVCTL,
+ PCI_EXP_DEVCTL_NOSNOOP_EN);
+ }
}
RTL_W8(Cfg9346, Cfg9346_Unlock);