diff options
| author | Senthil Balasubramanian <senthilkumar@atheros.com> | 2009-09-18 15:07:03 +0530 |
|---|---|---|
| committer | John W. Linville <linville@tuxdriver.com> | 2009-10-07 16:39:40 -0400 |
| commit | 63a75b912b00fbafeb54849ca3bcd0295ad68609 (patch) | |
| tree | 6d7f0006efea33e4a87e58a4bdb7a45339b78392 /drivers/net/wireless/ath/ath9k/hw.c | |
| parent | 1d50a69b18818b276333590d1f2c9382d292d84d (diff) | |
ath9k: Reduce PLL Settle time and eliminate redundant PLL calls.
Reduce PLL Settle time and eliminate redundant PLL calls. Also reduce
the LoadNF timeout from 10 msec to 250usec as the 10 msec timeout was
hit with AR9285 in some cases.
Signed-off-by: Senthil Balasubramanian <senthilkumar@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/ath/ath9k/hw.c')
| -rw-r--r-- | drivers/net/wireless/ath/ath9k/hw.c | 15 |
1 files changed, 11 insertions, 4 deletions
diff --git a/drivers/net/wireless/ath/ath9k/hw.c b/drivers/net/wireless/ath/ath9k/hw.c index eb408831f3c..b53faa09bdb 100644 --- a/drivers/net/wireless/ath/ath9k/hw.c +++ b/drivers/net/wireless/ath/ath9k/hw.c @@ -1691,8 +1691,6 @@ static bool ath9k_hw_set_reset(struct ath_hw *ah, int type) if (!AR_SREV_9100(ah)) REG_WRITE(ah, AR_RC, 0); - ath9k_hw_init_pll(ah, NULL); - if (AR_SREV_9100(ah)) udelay(50); @@ -2885,6 +2883,7 @@ static bool ath9k_hw_set_power_awake(struct ath_hw *ah, int setChip) ATH9K_RESET_POWER_ON) != true) { return false; } + ath9k_hw_init_pll(ah, NULL); } if (AR_SREV_9100(ah)) REG_SET_BIT(ah, AR_RTC_RESET, @@ -3968,7 +3967,11 @@ void ath9k_hw_setrxfilter(struct ath_hw *ah, u32 bits) bool ath9k_hw_phy_disable(struct ath_hw *ah) { - return ath9k_hw_set_reset_reg(ah, ATH9K_RESET_WARM); + if (!ath9k_hw_set_reset_reg(ah, ATH9K_RESET_WARM)) + return false; + + ath9k_hw_init_pll(ah, NULL); + return true; } bool ath9k_hw_disable(struct ath_hw *ah) @@ -3976,7 +3979,11 @@ bool ath9k_hw_disable(struct ath_hw *ah) if (!ath9k_hw_setpower(ah, ATH9K_PM_AWAKE)) return false; - return ath9k_hw_set_reset_reg(ah, ATH9K_RESET_COLD); + if (!ath9k_hw_set_reset_reg(ah, ATH9K_RESET_COLD)) + return false; + + ath9k_hw_init_pll(ah, NULL); + return true; } void ath9k_hw_set_txpowerlimit(struct ath_hw *ah, u32 limit) |