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authorLuis R. Rodriguez <lrodriguez@atheros.com>2009-02-10 15:35:27 -0800
committerJohn W. Linville <linville@tuxdriver.com>2009-02-13 13:46:11 -0500
commit6d08b9b9c6eb2414c4a037407dd121298a74fb36 (patch)
treec14304c7bb3d000d9ad3777ef5bf35deb08c3c7f /drivers/net/wireless/ath9k/hw.c
parent24c1a280c8db6beddbb62662c30b79cd3c8d4d01 (diff)
ath9k: add udelay() for AR5416 on ath9k_hw_configpcipowersave()master-2009-02-13
We need the udelay() for all families, including AR5416. Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/ath9k/hw.c')
-rw-r--r--drivers/net/wireless/ath9k/hw.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/net/wireless/ath9k/hw.c b/drivers/net/wireless/ath9k/hw.c
index cfcaaf886d0..cad8e39c201 100644
--- a/drivers/net/wireless/ath9k/hw.c
+++ b/drivers/net/wireless/ath9k/hw.c
@@ -2666,7 +2666,6 @@ void ath9k_hw_configpcipowersave(struct ath_hw *ah, int restore)
REG_WRITE(ah, INI_RA(&ah->iniPcieSerdes, i, 0),
INI_RA(&ah->iniPcieSerdes, i, 1));
}
- udelay(1000);
} else if (AR_SREV_9280(ah) &&
(ah->hw_version.macRev == AR_SREV_REVISION_9280_10)) {
REG_WRITE(ah, AR_PCIE_SERDES, 0x9248fd00);
@@ -2690,7 +2689,6 @@ void ath9k_hw_configpcipowersave(struct ath_hw *ah, int restore)
/* Load the new settings */
REG_WRITE(ah, AR_PCIE_SERDES2, 0x00000000);
- udelay(1000);
} else {
REG_WRITE(ah, AR_PCIE_SERDES, 0x9248fc00);
REG_WRITE(ah, AR_PCIE_SERDES, 0x24924924);
@@ -2714,6 +2712,8 @@ void ath9k_hw_configpcipowersave(struct ath_hw *ah, int restore)
REG_WRITE(ah, AR_PCIE_SERDES2, 0x00000000);
}
+ udelay(1000);
+
/* set bit 19 to allow forcing of pcie core into L1 state */
REG_SET_BIT(ah, AR_PCIE_PM_CTRL, AR_PCIE_PM_CTRL_ENA);