summaryrefslogtreecommitdiff
path: root/drivers/net/wireless/bcmdhd/include/pcicfg.h
diff options
context:
space:
mode:
authorDmitry Shmidt <dimitrysh@google.com>2012-03-16 12:52:00 -0700
committerDmitry Shmidt <dimitrysh@google.com>2012-03-16 12:59:36 -0700
commit10c41e43e1703e11ebbf4707af3174850163024b (patch)
treef78c6614689931341c4ca59d087f3f5a64dfaa38 /drivers/net/wireless/bcmdhd/include/pcicfg.h
parent04172d07afdfc963a588cb792acd297ae1f25223 (diff)
net: wireless: bcmdhd: Update to version 6.10.67.2
Signed-off-by: Dmitry Shmidt <dimitrysh@google.com>
Diffstat (limited to 'drivers/net/wireless/bcmdhd/include/pcicfg.h')
-rw-r--r--drivers/net/wireless/bcmdhd/include/pcicfg.h54
1 files changed, 33 insertions, 21 deletions
diff --git a/drivers/net/wireless/bcmdhd/include/pcicfg.h b/drivers/net/wireless/bcmdhd/include/pcicfg.h
index 66199431fb9..5f7df6a7a7e 100644
--- a/drivers/net/wireless/bcmdhd/include/pcicfg.h
+++ b/drivers/net/wireless/bcmdhd/include/pcicfg.h
@@ -1,9 +1,9 @@
/*
* pcicfg.h: PCI configuration constants and structures.
*
- * Copyright (C) 1999-2011, Broadcom Corporation
+ * Copyright (C) 1999-2012, Broadcom Corporation
*
- * Unless you and Broadcom execute a separate written software license
+ * Unless you and Broadcom execute a separate written software license
* agreement governing use of this software, this software is licensed to you
* under the terms of the GNU General Public License version 2 (the "GPL"),
* available at http://www.broadcom.com/licenses/GPLv2.php, with the
@@ -21,26 +21,46 @@
* software in any way with any other Broadcom software provided under a license
* other than the GPL, without Broadcom's express prior written consent.
*
- * $Id: pcicfg.h 277737 2011-08-16 17:54:59Z $
+ * $Id: pcicfg.h 309193 2012-01-19 00:03:57Z $
*/
-
#ifndef _h_pcicfg_
#define _h_pcicfg_
#define PCI_CFG_VID 0
+#define PCI_CFG_DID 2
#define PCI_CFG_CMD 4
+#define PCI_CFG_STAT 6
#define PCI_CFG_REV 8
+#define PCI_CFG_PROGIF 9
+#define PCI_CFG_SUBCL 0xa
+#define PCI_CFG_BASECL 0xb
+#define PCI_CFG_CLSZ 0xc
+#define PCI_CFG_LATTIM 0xd
+#define PCI_CFG_HDR 0xe
+#define PCI_CFG_BIST 0xf
#define PCI_CFG_BAR0 0x10
#define PCI_CFG_BAR1 0x14
+#define PCI_CFG_BAR2 0x18
+#define PCI_CFG_BAR3 0x1c
+#define PCI_CFG_BAR4 0x20
+#define PCI_CFG_BAR5 0x24
+#define PCI_CFG_CIS 0x28
+#define PCI_CFG_SVID 0x2c
+#define PCI_CFG_SSID 0x2e
+#define PCI_CFG_ROMBAR 0x30
+#define PCI_CFG_CAPPTR 0x34
+#define PCI_CFG_INT 0x3c
+#define PCI_CFG_PIN 0x3d
+#define PCI_CFG_MINGNT 0x3e
+#define PCI_CFG_MAXLAT 0x3f
#define PCI_BAR0_WIN 0x80
-#define PCI_INT_STATUS 0x90
-#define PCI_INT_MASK 0x94
-
-#define PCIE_EXTCFG_OFFSET 0x100
+#define PCI_BAR1_WIN 0x84
#define PCI_SPROM_CONTROL 0x88
#define PCI_BAR1_CONTROL 0x8c
+#define PCI_INT_STATUS 0x90
+#define PCI_INT_MASK 0x94
#define PCI_TO_SB_MB 0x98
#define PCI_BACKPLANE_ADDR 0xa0
#define PCI_BACKPLANE_DATA 0xa4
@@ -55,24 +75,16 @@
#define PCI_BAR0_PCIREGS_OFFSET (6 * 1024)
#define PCI_BAR0_PCISBR_OFFSET (4 * 1024)
-#define PCI_BAR0_WINSZ (16 * 1024)
+#define PCIE2_BAR0_WIN2 0x70
+#define PCIE2_BAR0_CORE2_WIN 0x74
+#define PCIE2_BAR0_CORE2_WIN2 0x78
+#define PCI_BAR0_WINSZ (16 * 1024)
#define PCI_16KB0_PCIREGS_OFFSET (8 * 1024)
#define PCI_16KB0_CCREGS_OFFSET (12 * 1024)
#define PCI_16KBB0_WINSZ (16 * 1024)
-#define PCI_16KB0_WIN2_OFFSET (4 * 1024)
-
-
-
-#define SPROM_SZ_MSK 0x02
-#define SPROM_LOCKED 0x08
-#define SPROM_BLANK 0x04
-#define SPROM_WRITEEN 0x10
-#define SPROM_BOOTROM_WE 0x20
-#define SPROM_BACKPLANE_EN 0x40
-#define SPROM_OTPIN_USE 0x80
-
+#define PCI_CONFIG_SPACE_SIZE 256
#endif