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authorHaavard Skinnemoen <hskinnemoen@atmel.com>2008-02-06 01:38:11 -0800
committerLinus Torvalds <torvalds@woody.linux-foundation.org>2008-02-06 10:41:10 -0800
commit1eed29df472a33bba013d5a2ea2f9e32f4414397 (patch)
tree857d8c03baab8c845cd94cd601caab05e57dcb5b /drivers/spi
parent3c72426f0539c1abce17918d1456f7a6a5a11f90 (diff)
atmel_spi throughput improvement
Don't insert (undesirable) delays between consecutive words (DLYBCT) or when activating chipselects (DLYBS). Removing the between-word delays improves the performance of bulk transfers (such as mtd_dataflash, m25p80, mmc_spi) significantly. In one test, the improvement was a factor of more than eight! (The large DLYBCT value came from the legacy at91 SPI driver, and it's not clear why it used such a huge value.) Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com> Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'drivers/spi')
-rw-r--r--drivers/spi/atmel_spi.c11
1 files changed, 8 insertions, 3 deletions
diff --git a/drivers/spi/atmel_spi.c b/drivers/spi/atmel_spi.c
index ff10808183a..b09d33678dd 100644
--- a/drivers/spi/atmel_spi.c
+++ b/drivers/spi/atmel_spi.c
@@ -490,9 +490,14 @@ static int atmel_spi_setup(struct spi_device *spi)
if (!(spi->mode & SPI_CPHA))
csr |= SPI_BIT(NCPHA);
- /* TODO: DLYBS and DLYBCT */
- csr |= SPI_BF(DLYBS, 10);
- csr |= SPI_BF(DLYBCT, 10);
+ /* DLYBS is mostly irrelevant since we manage chipselect using GPIOs.
+ *
+ * DLYBCT would add delays between words, slowing down transfers.
+ * It could potentially be useful to cope with DMA bottlenecks, but
+ * in those cases it's probably best to just use a lower bitrate.
+ */
+ csr |= SPI_BF(DLYBS, 0);
+ csr |= SPI_BF(DLYBCT, 0);
/* chipselect must have been muxed as GPIO (e.g. in board setup) */
npcs_pin = (unsigned int)spi->controller_data;