diff options
author | Jimmy Rubin <jimmy.rubin@stericsson.com> | 2011-09-01 13:04:28 +0200 |
---|---|---|
committer | Philippe Langlais <philippe.langlais@stericsson.com> | 2011-12-06 10:58:57 +0100 |
commit | 32e79e451ed31e4f4da6f887857c0f6c1689085b (patch) | |
tree | 63ec2be04fdeae1d80baed3a5514c4a77ed56425 /drivers/video/mcde | |
parent | 1f8ca5453174aa4c26dd89fc7428306af0f0c4c9 (diff) |
video: mcde: lcdtim1 not properly set
The lcdtim1 registers was not properly set affecting the DPI
LCD timing.
ST-Ericsson ID: 355205
ST-Ericsson Linux next: NA
ST-Ericsson FOSS-OUT ID: Trivial
Change-Id: I99f214b53c4bdeefdaee738bbbaf918877b751b4
Signed-off-by: Jimmy Rubin <jimmy.rubin@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/29925
Reviewed-by: Nils CALMSUND <nils.calmsund@stericsson.com>
Reviewed-by: Philippe CORNU <philippe.cornu@stericsson.com>
Reviewed-by: QATOOLS
Reviewed-by: Fabien DESSENNE <fabien.dessenne@stericsson.com>
Reviewed-by: QABUILD
Reviewed-by: Per PERSSON <per.xb.persson@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/30075
Reviewed-by: Naveen Kumar GADDIPATI <naveen.gaddipati@stericsson.com>
Tested-by: Naveen Kumar GADDIPATI <naveen.gaddipati@stericsson.com>
Diffstat (limited to 'drivers/video/mcde')
-rw-r--r-- | drivers/video/mcde/mcde_hw.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/video/mcde/mcde_hw.c b/drivers/video/mcde/mcde_hw.c index d2105f0d29d..b6fa06ee89a 100644 --- a/drivers/video/mcde/mcde_hw.c +++ b/drivers/video/mcde/mcde_hw.c @@ -677,14 +677,14 @@ static void dpi_video_mode_apply(struct mcde_chnl_state *chnl) chnl->tv_regs.fsl1 = 0; chnl->tv_regs.fsl2 = 0; polarity = chnl->port.phy.dpi.polarity; - chnl->tv_regs.lcdtim1 |= MCDE_LCDTIM1A_IPC( - (polarity & DPI_ACT_ON_FALLING_EDGE) != 0); chnl->tv_regs.lcdtim1 = MCDE_LCDTIM1A_IHS( (polarity & DPI_ACT_LOW_HSYNC) != 0); chnl->tv_regs.lcdtim1 |= MCDE_LCDTIM1A_IVS( (polarity & DPI_ACT_LOW_VSYNC) != 0); chnl->tv_regs.lcdtim1 |= MCDE_LCDTIM1A_IOE( (polarity & DPI_ACT_LOW_DATA_ENABLE) != 0); + chnl->tv_regs.lcdtim1 |= MCDE_LCDTIM1A_IPC( + (polarity & DPI_ACT_ON_FALLING_EDGE) != 0); } } |