diff options
| author | Anders Bauer <anders.bauer@stericsson.com> | 2011-09-21 17:05:26 +0200 |
|---|---|---|
| committer | Philippe Langlais <philippe.langlais@stericsson.com> | 2012-05-22 11:04:17 +0200 |
| commit | 327b242535599f8b6b41db91e2d68e43b2515a01 (patch) | |
| tree | 3592d5528c31968b10735f89edd26f4e57c2b074 /drivers/video | |
| parent | 22bdde68e00014e7a15d56a800848c0a880b9ecb (diff) | |
video: mcde: use DSI display with one data lane
This patch enables using displays with
one DSI data lane.
ST-Ericsson ID: 359227
ST-Ericsson Linux next: NA
ST-Ericsson FOSS-OUT ID: Trivial
Change-Id: I852c55060c5c4ffa8b50eb6b8dbc3e002d4fe658
Signed-off-by: Anders Bauer <anders.bauer@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/35323
Tested-by: Jimmy RUBIN <jimmy.rubin@stericsson.com>
Reviewed-by: QATOOLS
Reviewed-by: QABUILD
Reviewed-by: Per PERSSON <per.xb.persson@stericsson.com>
Reviewed-by: Marcus LORENTZON <marcus.xm.lorentzon@stericsson.com>
Reviewed-by: Jimmy RUBIN <jimmy.rubin@stericsson.com>
Diffstat (limited to 'drivers/video')
| -rw-r--r-- | drivers/video/mcde/mcde_hw.c | 10 |
1 files changed, 6 insertions, 4 deletions
diff --git a/drivers/video/mcde/mcde_hw.c b/drivers/video/mcde/mcde_hw.c index 0e081ed7f0c..7de18aaea30 100644 --- a/drivers/video/mcde/mcde_hw.c +++ b/drivers/video/mcde/mcde_hw.c @@ -1037,7 +1037,8 @@ static int update_channel_static_registers(struct mcde_chnl_state *chnl) DSI_MCTL_DPHY_TIMEOUT_LPRX_TO_VAL(0x3fff)); dsi_wreg(lnk, DSI_MCTL_MAIN_PHY_CTL, DSI_MCTL_MAIN_PHY_CTL_WAIT_BURST_TIME(0xf) | - DSI_MCTL_MAIN_PHY_CTL_LANE2_EN(true) | + DSI_MCTL_MAIN_PHY_CTL_LANE2_EN( + port->phy.dsi.num_data_lanes >= 2) | DSI_MCTL_MAIN_PHY_CTL_CLK_CONTINUOUS( port->phy.dsi.clk_cont)); dsi_wreg(lnk, DSI_MCTL_ULPOUT_TIME, @@ -1057,7 +1058,8 @@ static int update_channel_static_registers(struct mcde_chnl_state *chnl) DSI_MCTL_MAIN_EN_IF2_EN(port->ifc == 1)); while (dsi_rfld(lnk, DSI_MCTL_MAIN_STS, CLKLANE_READY) == 0 || dsi_rfld(lnk, DSI_MCTL_MAIN_STS, DAT1_READY) == 0 || - dsi_rfld(lnk, DSI_MCTL_MAIN_STS, DAT2_READY) == 0) { + (dsi_rfld(lnk, DSI_MCTL_MAIN_STS, DAT2_READY) == 0 && + port->phy.dsi.num_data_lanes > 1)) { mdelay(1); if (i++ == 10) { dev_warn(&mcde_dev->dev, @@ -1077,10 +1079,10 @@ static int update_channel_static_registers(struct mcde_chnl_state *chnl) MCDE_DSIVID0CONF0_DCSVID_NOTGEN(true)); if (port->mode == MCDE_PORTMODE_CMD) { - if (port->ifc == DSI_VIDEO_MODE) + if (port->ifc == 0) dsi_wfld(port->link, DSI_CMD_MODE_CTL, IF1_ID, port->phy.dsi.virt_id); - else if (port->ifc == DSI_CMD_MODE) + else if (port->ifc == 1) dsi_wfld(port->link, DSI_CMD_MODE_CTL, IF2_ID, port->phy.dsi.virt_id); } |