diff options
| author | Will Deacon <will.deacon@arm.com> | 2011-10-07 15:57:55 +0100 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2011-10-08 10:05:34 +0100 |
| commit | a26bce1220a4c5a7a074a779e6aad3cae63a94f7 (patch) | |
| tree | b57a67eab4799e63e7fc699acd7682b8148ebbb8 /fs/pipe.c | |
| parent | c825dda905bac330c2da7fabdf5c0ac28758b3cd (diff) | |
ARM: 7127/1: hw_breakpoint: skip v7-specific reset on v6 cores
ARMv6 cores do not implement the DBGOSLAR register, so we don't need to
try and clear it on boot. Furthermore, the VCR is zeroed out of reset,
so we don't need to zero it explicitly when a CPU comes online.
Tested-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'fs/pipe.c')
0 files changed, 0 insertions, 0 deletions