4 files changed, 24 insertions, 11 deletions

diff --git a/arch/arm/mach-ux500/clock-db5500.c b/arch/arm/mach-ux500/clock-db5500.c
index 18583a52334..37e52e704ff 100644
--- a/arch/arm/mach-ux500/clock-db5500.c
+++ b/arch/arm/mach-ux500/clock-db5500.c
@@ -229,15 +229,15 @@ static struct clkops clkout1_ops = {
 	DEF_PRCC_PCLK(_name, U5500_CLKRST6_BASE, _cg_bit, &per6clk)
 
 #define DEF_PER1_KCLK(_cg_bit, _name, _parent) \
-	DEF_PRCC_KCLK(_name, U5500_CLKRST1_BASE, _cg_bit, _parent)
+	DEF_PRCC_KCLK(_name, U5500_CLKRST1_BASE, _cg_bit, _parent, &per1clk)
 #define DEF_PER2_KCLK(_cg_bit, _name, _parent) \
-	DEF_PRCC_KCLK(_name, U5500_CLKRST2_BASE, _cg_bit, _parent)
+	DEF_PRCC_KCLK(_name, U5500_CLKRST2_BASE, _cg_bit, _parent, &per2clk)
 #define DEF_PER3_KCLK(_cg_bit, _name, _parent) \
-	DEF_PRCC_KCLK(_name, U5500_CLKRST3_BASE, _cg_bit, _parent)
+	DEF_PRCC_KCLK(_name, U5500_CLKRST3_BASE, _cg_bit, _parent, &per3clk)
 #define DEF_PER5_KCLK(_cg_bit, _name, _parent) \
-	DEF_PRCC_KCLK(_name, U5500_CLKRST5_BASE, _cg_bit, _parent)
+	DEF_PRCC_KCLK(_name, U5500_CLKRST5_BASE, _cg_bit, _parent, &per5clk)
 #define DEF_PER6_KCLK(_cg_bit, _name, _parent) \
-	DEF_PRCC_KCLK(_name, U5500_CLKRST6_BASE, _cg_bit, _parent)
+	DEF_PRCC_KCLK(_name, U5500_CLKRST6_BASE, _cg_bit, _parent, &per6clk)
 
 #define DEF_MTU_CLK(_cg_sel, _name, _bus_parent) \
 	struct clk _name = { \
diff --git a/arch/arm/mach-ux500/clock-db8500.c b/arch/arm/mach-ux500/clock-db8500.c
index bce3cdc8569..7462d95eac7 100644
--- a/arch/arm/mach-ux500/clock-db8500.c
+++ b/arch/arm/mach-ux500/clock-db8500.c
@@ -388,15 +388,15 @@ static struct clkops clkout1_ops = {
 	DEF_PRCC_PCLK(_name, U8500_CLKRST6_BASE, _cg_bit, &per6clk)
 
 #define DEF_PER1_KCLK(_cg_bit, _name, _parent) \
-	DEF_PRCC_KCLK(_name, U8500_CLKRST1_BASE, _cg_bit, _parent)
+	DEF_PRCC_KCLK(_name, U8500_CLKRST1_BASE, _cg_bit, _parent, &per1clk)
 #define DEF_PER2_KCLK(_cg_bit, _name, _parent) \
-	DEF_PRCC_KCLK(_name, U8500_CLKRST2_BASE, _cg_bit, _parent)
+	DEF_PRCC_KCLK(_name, U8500_CLKRST2_BASE, _cg_bit, _parent, &per2clk)
 #define DEF_PER3_KCLK(_cg_bit, _name, _parent) \
-	DEF_PRCC_KCLK(_name, U8500_CLKRST3_BASE, _cg_bit, _parent)
+	DEF_PRCC_KCLK(_name, U8500_CLKRST3_BASE, _cg_bit, _parent, &per3clk)
 #define DEF_PER5_KCLK(_cg_bit, _name, _parent) \
-	DEF_PRCC_KCLK(_name, U8500_CLKRST5_BASE, _cg_bit, _parent)
+	DEF_PRCC_KCLK(_name, U8500_CLKRST5_BASE, _cg_bit, _parent, &per5clk)
 #define DEF_PER6_KCLK(_cg_bit, _name, _parent) \
-	DEF_PRCC_KCLK(_name, U8500_CLKRST6_BASE, _cg_bit, _parent)
+	DEF_PRCC_KCLK(_name, U8500_CLKRST6_BASE, _cg_bit, _parent, &per6clk)
 
 #define DEF_MTU_CLK(_cg_sel, _name, _bus_parent) \
 	struct clk _name = { \
diff --git a/arch/arm/mach-ux500/clock.c b/arch/arm/mach-ux500/clock.c
index 2e4a6c6cb51..d40e058fd87 100644
--- a/arch/arm/mach-ux500/clock.c
+++ b/arch/arm/mach-ux500/clock.c
@@ -370,11 +370,19 @@ struct clkops prcc_pclk_ops = {
 
 static int prcc_kclk_enable(struct clk *clk)
 {
+	int err;
 	void __iomem *io_base = __io_address(clk->io_base);
 
+	err = __clk_enable(clk->clock, clk->mutex);
+	if (err)
+		return err;
+
 	writel(clk->cg_sel, (io_base + PRCC_KCKEN));
 	while (!(readl(io_base + PRCC_KCKSR) & clk->cg_sel))
 		cpu_relax();
+
+	__clk_disable(clk->clock, clk->mutex);
+
 	return 0;
 }
 
@@ -382,7 +390,9 @@ static void prcc_kclk_disable(struct clk *clk)
 {
 	void __iomem *io_base = __io_address(clk->io_base);
 
+	(void)__clk_enable(clk->clock, clk->mutex);
 	writel(clk->cg_sel, (io_base + PRCC_KCKDIS));
+	__clk_disable(clk->clock, clk->mutex);
 }
 
 struct clkops prcc_kclk_ops = {
diff --git a/arch/arm/mach-ux500/clock.h b/arch/arm/mach-ux500/clock.h
index 0d8ca4ee8b0..f9daba62a9a 100644
--- a/arch/arm/mach-ux500/clock.h
+++ b/arch/arm/mach-ux500/clock.h
@@ -32,6 +32,7 @@
  *		be a %NULL-terminated &struct_clk array. Present if and only
  *		if clk_set_parent() is implemented for the clock.
  * @regulator:	The regulator needed to have the clock functional, if any.
+ * @clock:	The clock needed to control the clock, if any.
  */
 struct clk {
 	const struct clkops *ops;
@@ -46,6 +47,7 @@ struct clk {
 	struct clk *bus_parent;
 	struct clk **parents;
 	struct regulator *regulator;
+	struct clk *clock;
 	struct list_head list;
 #if defined(CONFIG_DEBUG_FS)
 	struct dentry		*dent;	/* For visible tree hierarchy */
@@ -108,13 +110,14 @@ extern struct clkops sga_clk_ops;
 		.parent = _parent, \
 	}
 
-#define DEF_PRCC_KCLK(_name, _io_base, _cg_bit, _parent) \
+#define DEF_PRCC_KCLK(_name, _io_base, _cg_bit, _parent, _clock) \
 	struct clk _name = { \
 		.name = #_name, \
 		.ops = &prcc_kclk_ops, \
 		.io_base = _io_base, \
 		.cg_sel = BIT(_cg_bit), \
 		.parent = _parent, \
+		.clock = _clock, \
 	}
 
 #define DEF_PER_CLK(_name, _bus_parent, _parent) \