diff options
| -rw-r--r-- | arch/arm/mach-ux500/include/mach/prcmu-db5500.h | 7 | ||||
| -rw-r--r-- | arch/arm/mach-ux500/prcmu-db5500.c | 31 | ||||
| -rw-r--r-- | arch/arm/mach-ux500/prcmu-regs-db5500.h | 2 |
3 files changed, 40 insertions, 0 deletions
diff --git a/arch/arm/mach-ux500/include/mach/prcmu-db5500.h b/arch/arm/mach-ux500/include/mach/prcmu-db5500.h index f0977986402..7e745a116af 100644 --- a/arch/arm/mach-ux500/include/mach/prcmu-db5500.h +++ b/arch/arm/mach-ux500/include/mach/prcmu-db5500.h @@ -15,6 +15,8 @@ void db5500_prcmu_early_init(void); int db5500_prcmu_abb_read(u8 slave, u8 reg, u8 *value, u8 size); int db5500_prcmu_abb_write(u8 slave, u8 reg, u8 *value, u8 size); +int prcmu_resetout(u8 resoutn, u8 state); + #else /* !CONFIG_UX500_SOC_DB5500 */ static inline void db5500_prcmu_early_init(void) @@ -31,6 +33,11 @@ static inline int db5500_prcmu_abb_write(u8 slave, u8 reg, u8 *value, u8 size) return -ENOSYS; } +static inline int prcmu_resetout(u8 resoutn, u8 state) +{ + return 0; +} + #endif /* CONFIG_UX500_SOC_DB5500 */ static inline int db5500_prcmu_config_abb_event_readout(u32 abb_events) diff --git a/arch/arm/mach-ux500/prcmu-db5500.c b/arch/arm/mach-ux500/prcmu-db5500.c index eaf44dbe8db..96dc23c32dd 100644 --- a/arch/arm/mach-ux500/prcmu-db5500.c +++ b/arch/arm/mach-ux500/prcmu-db5500.c @@ -122,6 +122,9 @@ enum mb5_header { #define PRCMU_DISABLE_PLLDSI 0x00000000 #define PRCMU_DSI_RESET_SW 0x00000003 +#define PRCMU_RESOUTN0_PIN 0x00000001 +#define PRCMU_RESOUTN1_PIN 0x00000002 +#define PRCMU_RESOUTN2_PIN 0x00000004 #define PRCMU_PLLDSI_LOCKP_LOCKED 0x3 @@ -330,6 +333,34 @@ int db5500_prcmu_abb_write(u8 slave, u8 reg, u8 *value, u8 size) return r; } +int prcmu_resetout(u8 resoutn, u8 state) +{ + int offset; + int pin = -1; + + offset = state > 0 ? PRCM_RESOUTN_SET_OFFSET : PRCM_RESOUTN_CLR_OFFSET; + + switch (resoutn) { + case 0: + pin = PRCMU_RESOUTN0_PIN; + break; + case 1: + pin = PRCMU_RESOUTN1_PIN; + break; + case 2: + pin = PRCMU_RESOUTN2_PIN; + default: + break; + } + + if (pin > 0) + writel(pin, _PRCMU_BASE + offset); + else + return -EINVAL; + + return 0; +} + int db5500_prcmu_enable_dsipll(void) { int i; diff --git a/arch/arm/mach-ux500/prcmu-regs-db5500.h b/arch/arm/mach-ux500/prcmu-regs-db5500.h index d1ae7883871..978259a4273 100644 --- a/arch/arm/mach-ux500/prcmu-regs-db5500.h +++ b/arch/arm/mach-ux500/prcmu-regs-db5500.h @@ -72,5 +72,7 @@ /* Miscellaneous unit registers */ #define PRCM_DSI_SW_RESET 0x324 +#define PRCM_RESOUTN_SET_OFFSET 0x214 +#define PRCM_RESOUTN_CLR_OFFSET 0x218 #endif |