diff options
Diffstat (limited to 'include/asm-arm')
| -rw-r--r-- | include/asm-arm/fpstate.h | 4 | ||||
| -rw-r--r-- | include/asm-arm/system.h | 3 | ||||
| -rw-r--r-- | include/asm-arm/thread_info.h | 2 | ||||
| -rw-r--r-- | include/asm-arm/tlbflush.h | 6 |
4 files changed, 13 insertions, 2 deletions
diff --git a/include/asm-arm/fpstate.h b/include/asm-arm/fpstate.h index f7430e3aa55..6246bf83627 100644 --- a/include/asm-arm/fpstate.h +++ b/include/asm-arm/fpstate.h @@ -55,8 +55,10 @@ struct fp_soft_struct { unsigned int save[FP_SOFT_SIZE]; /* undefined information */ }; +#define IWMMXT_SIZE 0x98 + struct iwmmxt_struct { - unsigned int save[0x98/sizeof(int) + 1]; + unsigned int save[IWMMXT_SIZE / sizeof(unsigned int)]; }; union fp_state { diff --git a/include/asm-arm/system.h b/include/asm-arm/system.h index eb2de8c1051..ec91d1ff032 100644 --- a/include/asm-arm/system.h +++ b/include/asm-arm/system.h @@ -415,6 +415,9 @@ static inline unsigned long __xchg(unsigned long x, volatile void *ptr, int size return ret; } +extern void disable_hlt(void); +extern void enable_hlt(void); + #endif /* __ASSEMBLY__ */ #define arch_align_stack(x) (x) diff --git a/include/asm-arm/thread_info.h b/include/asm-arm/thread_info.h index 33a33cbb632..cfbccb63c67 100644 --- a/include/asm-arm/thread_info.h +++ b/include/asm-arm/thread_info.h @@ -59,7 +59,7 @@ struct thread_info { struct cpu_context_save cpu_context; /* cpu context */ __u8 used_cp[16]; /* thread used copro */ unsigned long tp_value; - union fp_state fpstate; + union fp_state fpstate __attribute__((aligned(8))); union vfp_state vfpstate; struct restart_block restart_block; }; diff --git a/include/asm-arm/tlbflush.h b/include/asm-arm/tlbflush.h index 9387a5e1ffe..0c2acc944a0 100644 --- a/include/asm-arm/tlbflush.h +++ b/include/asm-arm/tlbflush.h @@ -340,6 +340,12 @@ static inline void local_flush_tlb_kernel_page(unsigned long kaddr) asm("mcr%? p15, 0, %0, c8, c6, 1" : : "r" (kaddr)); if (tlb_flag(TLB_V6_I_PAGE)) asm("mcr%? p15, 0, %0, c8, c5, 1" : : "r" (kaddr)); + + /* The ARM ARM states that the completion of a TLB maintenance + * operation is only guaranteed by a DSB instruction + */ + if (tlb_flag(TLB_V6_U_PAGE | TLB_V6_D_PAGE | TLB_V6_I_PAGE)) + asm("mcr%? p15, 0, %0, c7, c10, 4" : : "r" (zero)); } /* |