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2009-07-03[ARM] pxa: use kzalloc() in pxa_init_gpio_chip()Daniel Mack
As slab is available early now, use kzalloc() rather than alloc_bootmem_low() in pxa_init_gpio_chip(). This removes the following boot time warning: <4>------------[ cut here ]------------ <4>WARNING: at mm/bootmem.c:535 alloc_arch_preferred_bootmem+0x2c/0x54() <d>Modules linked in: [<c0029430>] (unwind_backtrace+0x0/0xdc) from [<c0036f64>] (warn_slowpath_common+0x4c/0x80) [<c0036f64>] (warn_slowpath_common+0x4c/0x80) from [<c000ede0>] (alloc_arch_preferred_bootmem+0x2c/0x54) [<c000ede0>] (alloc_arch_preferred_bootmem+0x2c/0x54) from [<c000f2e4>] (___alloc_bootmem_nopanic+0x34/0xd0) [<c000f2e4>] (___alloc_bootmem_nopanic+0x34/0xd0) from [<c000f6e4>] (___alloc_bootmem+0xc/0x34) [<c000f6e4>] (___alloc_bootmem+0xc/0x34) from [<c000cb20>] (pxa_init_gpio+0x48/0x228) [<c000cb20>] (pxa_init_gpio+0x48/0x228) from [<c0009794>] (init_IRQ+0x34/0x44) [<c0009794>] (init_IRQ+0x34/0x44) from [<c00089d4>] (start_kernel+0x144/0x264) [<c00089d4>] (start_kernel+0x144/0x264) from [<a0008034>] (0xa0008034) <4>---[ end trace 1b75b31a2719ed1c ]--- Signed-off-by: Daniel Mack <daniel@caiaq.de> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2009-06-05[ARM] pxa: add PWM devices support for pxa168/910Eric Miao
Signed-off-by: Mingwei Wang <mingwei.wang@marvell.com> Signed-off-by: Eric Miao <eric.miao@marvell.com>
2009-06-05[ARM] pxa: move pwm.c to common plat-pxa directoryEric Miao
Signed-off-by: Eric Miao <eric.miao@marvell.com>
2009-06-05[ARM] pxa: move mach/i2c.h to plat/i2c.hEric Miao
Signed-off-by: Paul Shen <paul.shen@marvell.com> Signed-off-by: Eric Miao <eric.miao@marvell.com>
2009-04-27[ARM] pxa: fix issue of muxed GPIO irq_chip functions touching non-muxed GPIOsEric Miao
pxa_gpio_irq_type() and pxa_unmask_muxed_gpio() will touch non-muxed GPIOs (0 and 1 on PXA2xx/PXA3xx) bits in GRERx and GFERx, which is incorrect. Actually, only those bits should get updated if the corresponding bits are set in c->irq_mask as well. Fix this by updating only those relevant bits. Reported-and-tested-by: Daniel Ribeiro <drwyrm@gmail.com> Signed-off-by: Eric Miao <eric.miao@marvell.com>
2009-03-26[ARM] pxa: build arch/arm/plat-pxa/mfp.c only when PXA3xx or ARCH_MMP definedEric Miao
arch/arm/plat-pxa/mfp.c is not intended to be use by PXA25x/PXA27x, make it explicit here only for use by PXA3xx or ARCH_MMP. Reported-by: Guennadi Liakhovestski <g.liakhovestski@gmx.de> Reported-by: Robert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: Eric Miao <eric.miao@marvell.com>
2009-03-23[ARM] pxa: add base support for Marvell PXA910Eric Miao
Signed-off-by: Bin Yang <bin.yang@marvell.com> Signed-off-by: Eric Miao <eric.miao@marvell.com>
2009-03-23[ARM] pxa: move common MFP handling code into plat-pxaEric Miao
Signed-off-by: Eric Miao <eric.miao@marvell.com>
2009-03-23[ARM] pxa: move common GPIO handling code into plat-pxaEric Miao
1. add common GPIO handling code into [arch/arm/plat-pxa] 2. common code in <mach/gpio.h> moved into <plat/gpio.h>, new processors should implement its own <mach/gpio.h>, provide the following required definitions and '#include <plat/gpio.h>' in the end: - GPIO_REGS_VIRT for mapped virtual address of the GPIO registers' physical I/O memory - macros of GPLR(), GPSR(), GPDR() for constant optimization for functions gpio_{set,get}_value() (so that bit-bang code can still have tolerable performance) - NR_BUILTIN_GPIO for the number of onchip GPIO - definitions of __gpio_is_inverted() and __gpio_is_occupied(), they can be either macros or inlined functions Signed-off-by: Eric Miao <eric.miao@marvell.com>
2009-03-23[ARM] pxa: introduce plat-pxa for PXA common code and add DMA supportEric Miao
1. introduce folder of 'arch/arm/plat-pxa' for common code across different PXA processor families 2. initially moved DMA code into plat-pxa 3. common code in <mach/dma.h> moved into <plat/dma.h>, new processors should implement its own <mach/dma.h>, provide the following required definitions and '#include <plat/dma.h>' in the end: - DMAC_REGS_VIRT for mapped virtual address of the DMA registers' physical I/O memory Signed-off-by: Eric Miao <eric.miao@marvell.com>