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2011-10-26Merge branch 'upstream/linaro-3.1' into linaro-android-3.1-agreen-rebaselinux-linaro-3.1-2011.10-2-android-0John Stultz
2011-10-24Merge branch 'devicetree/arm-linaro-3.1' of ↵linux-linaro-3.1-2011.10-2Nicolas Pitre
git://git.secretlab.ca/git/linux-2.6 into linaro-3.1
2011-10-24Merge commit 'v3.1' into linaro-3.1Nicolas Pitre
2011-10-24arm/dt: vexpress: add basic DT platform matching supportGrant Likely
This patch adds a DT match table to the Versatile Express machine description in order to enable basic device tree support. Tested on a Versatile Express board where the device tree blob is passed to the kernel by u-boot. Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> [converted .dts file to use skeleton.dtsi, and added 'dtbs' targets] Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2011-10-24arm/dt: Add basic device tree support for mx51 and mx53 boardsGrant Likely
This patch add support for the Genesi Efika MX Smarttop and Smartbook, the Freescale mx51 babbage board, and the Freescale mx53 loco board Signed-off-by: Jason Liu <jason.hui@linaro.org> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2011-10-24arm/dt: Add basic device tree support for smdkv310 boardThomas Abraham
Enable basic device tree support for Exynos4 smdkv310 board. Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2011-10-24arm/dt: omap3 basic device tree board supportGrant Likely
Enable basic device tree support for the Gumstix Overo, IGEP, Panda and Beagle OMAP boards Signed-off-by: Andy Doan <andy.doan@linaro.org> Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2011-10-24arm/dt: add versatile dtb build rulesShawn Guo
Makes 'make dtbs' build the versatile .dtb files when versatile is enabled. Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2011-10-21Merge branch 'upstream/linaro-3.1' into linaro-android-3.1-agreen-rebaselinux-linaro-3.1-2011.10-1-android-0John Stultz
2011-10-22ARM: S3C24XX: Fix s3c24xx build errors if !CONFIG_PMDomenico Andreoli
v2: - register_syscore_ops(&s3c24xx_irq_syscore_ops) does not need to be conditionally compiled out, it is already optimized out on !CONFIG_PM - fix also s3c2412 and s3c2416 affected by the same build issue v1: s3c2440.c fails to build if !CONFIG_PM because in such case s3c2410_pm_syscore_ops is not defined. Same error should happen also in s3c2410.c and s3c2442.c Signed-off-by: Domenico Andreoli <cavokz@gmail.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2011-10-21ARM: S5P: fix offset calculation on gpio-interruptMarek Szyprowski
Offsets of the irq controller registers were calculated correctly only for first GPIO bank. This patch fixes calculation of the register offsets for all GPIO banks. Reported-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2011-10-20ARM: mach-exynos4: move boot_params to atag_offsetNicolas Pitre
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
2011-10-20Merge branch 'upstream/linaro-3.1' into linaro-android-3.1-agreen-rebaseJohn Stultz
Conflicts: arch/arm/kernel/entry-armv.S arch/arm/vfp/vfpmodule.c kernel/power/Kconfig
2011-10-20Revert old origen supportJohn Stultz
Nico has already picked up more recent origen support, so drop the patch I merged earlier. Signed-off-by: John Stultz <john.stultz@linaro.org>
2011-10-19Merge branch 'imx_mx5_mx51' of ↵linux-linaro-3.1-2011.10-1Nicolas Pitre
git://git.linaro.org/people/rob_lee/imx_cpuidle into linaro-3.1
2011-10-19ARM: kprobes: Fix build error in test codeJon Medhurst (Tixy)
When compiling kprobes-test-thumb.c an error like below may occur: /tmp/ccKcuJcG.s:19179: Error: offset out of range This is caused by the compiler underestimating the size of the inline assembler instructions containing ".space 0x1000" and failing to spill the literal pool in time to prevent the generation of PC relative load instruction with invalid offsets. The fix implemented by this patch is to replace a single large .space directive by a number of 4 byte .space's. This requires splitting the macros which generate test cases for branch instructions into two forms: one with, and one without support for inserting extra code between branch and target. Signed-off-by: Jon Medhurst <jon.medhurst@linaro.org> Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
2011-10-19ARM: imx: Add cpuidle for i.MX51Robert Lee
Add imx cpuidle init call for i.MX51 SoC Signed-off-by: Robert Lee <rob.lee@linaro.org>
2011-10-19ARM: imx: Add cpuidle for mach-mx5Robert Lee
Add functionality for initialization and handling of a cpuidle driver requests entering a cpu idle state. Signed-off-by: Robert Lee <rob.lee@linaro.org>
2011-10-19ARM: imx: Add imx cpuidle driverRobert Lee
Introduce a new cpuidle driver which provides the common cpuidle functionality necessary for any imx soc cpuidle implementation. Signed-off-by: Robert Lee <rob.lee@linaro.org>
2011-10-17ARM: kprobes: work around build errorsArnd Bergmann
I got a few build errors for kprobes playing with randconfig on the latest kernel. While this patch manages to avoid these errors, I'm pretty sure that it is not the ideal solution. The errors I got in arm are while building for ARMv6 with the arm-linux-gnueabihf-gcc-4.6 provided by Linaro, which results in these messages: /tmp/ccGpftnj.s: Assembler messages: /tmp/ccGpftnj.s:22066: Error: selected processor does not support ARM mode `mls r0,r1,r2,r3' /tmp/ccGpftnj.s:22099: Error: selected processor does not support ARM mode `mlshi r7,r8,r9,r10' /tmp/ccGpftnj.s:22128: Error: selected processor does not support ARM mode `mls lr,r1,r2,r13' /tmp/ccGpftnj.s:23781: Error: selected processor does not support ARM mode `strexd r0,r2,r3,[sp]' /tmp/ccGpftnj.s:23802: Error: selected processor does not support ARM mode `ldrexd r2,r3,[sp]' /tmp/ccGpftnj.s:23823: Error: selected processor does not support ARM mode `strexb r0,r2,[sp]' /tmp/ccGpftnj.s:23844: Error: selected processor does not support ARM mode `ldrexb r2,[sp]' /tmp/ccGpftnj.s:23865: Error: selected processor does not support ARM mode `strexh r0,r2,[sp]' /tmp/ccGpftnj.s:23886: Error: selected processor does not support ARM mode `ldrexh r2,[sp]' /tmp/ccGpftnj.s:25836: Warning: base register written back, and overlaps second transfer register [ NP: I didn't reproduce the T2 errors, and Tixy was doubtful about them. Merged Tixy's change suggestions and his ACK. ] Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Jon Medhurst <tixy@yxit.co.uk> Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
2011-10-17Add ARM cpu topology definitionVincent Guittot
(Patch accepted by Russell for 3.1: http://www.spinics.net/lists/arm-kernel/msg131273.html) The affinity between ARM processors is defined in the MPIDR register. We can identify which processors are in the same cluster, and which ones have performance interdependency. We can define the cpu topology of ARM platform, that is then used by sched_mc and sched_smt. The default state of sched_mc and sched_smt config is disable. When enabled, the behavior of the scheduler can be modified with sched_mc_power_savings and sched_smt_power_savings sysfs interfaces. Changes since v4 : * Remove unnecessary parentheses and blank lines Changes since v3 : * Update the format of printk message * Remove blank line Changes since v2 : * Update the commit message and some comments Changes since v1 : * Update the commit message * Add read_cpuid_mpidr in arch/arm/include/asm/cputype.h * Modify header of arch/arm/kernel/topology.c * Modify tests and manipulation of MPIDR's bitfields * Modify the place and dependancy of the config * Modify Noop functions Signed-off-by: Vincent Guittot <vincent.guittot@linaro.org> Reviewed-by: Amit Kucheria <amit.kucheria@linaro.org> Signed-off-by: Amit Kucheria <amit.kucheria@verdurent.com> Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
2011-10-17Merge remote-tracking branch 'rmk/devel-stable' into linaro-3.1Nicolas Pitre
2011-10-17ARM: 7031/1: entry: Fix Thumb-2 undef handling for multi-CPU kernelsDave Martin
When v6 and >=v7 boards are supported in the same kernel, the __und_usr code currently makes a build-time assumption that Thumb-2 instructions occurring in userspace don't need to be supported. Strictly speaking this is incorrect. This patch fixes the above case by doing a run-time check on the CPU architecture in these cases. This only affects kernels which support v6 and >=v7 CPUs together: plain v6 and plain v7 kernels are unaffected. Signed-off-by: Dave Martin <dave.martin@linaro.org> Reviewed-by: Jon Medhurst <tixy@yxit.co.uk> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> (cherry picked from commit ef4c53687e0adf5409896c4fa688b15f8d4dc0c0)
2011-10-17ARM: 7030/1: entry: Remove unnecessary masking when decoding Thumb-2 ↵Dave Martin
instructions When testing whether a Thumb-2 instruction is 32 bits long or not, the masking done in order to test bits 11-15 of the first instruction halfword won't affect the result of the comparison, so remove it. Signed-off-by: Dave Martin <dave.martin@linaro.org> Reviewed-by: Jon Medhurst <tixy@yxit.co.uk> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> (cherry picked from commit 85519189df91c8aa9c368de0bdcfd7812200e614)
2011-10-17ARM: 7029/1: Make cpu_architecture into a global variableDave Martin
The CPU architecture really should not be changing at runtime, so make it a global variable instead of a function. The cpu_architecture() function declared in <asm/system.h> remains the correct way to read this variable from C code. Signed-off-by: Dave Martin <dave.martin@linaro.org> Reviewed-by: Jon Medhurst <tixy@yxit.co.uk> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> (cherry picked from commit 2ecccf90f2a6d821af4d33f086d59895e5d3bedc)
2011-10-17ARM: EXYNOS4: Add support for ORIGEN boardJeongHyeon Kim
Insignal's ORIGEN board is based Samsung EXYNOS4210 SoC. Signed-off-by: JeongHyeon Kim <jhkim@insignal.co.kr> Signed-off-by: Tushar Behera <tushar.behera@linaro.org> [kgene.kim@samsung.com: Fixed SoC name to EXYNOS4210] [kgene.kim@samsung.com: Selected MACH_ORIGEN in exynos4_defconfig] Signed-off-by: Kukjin Kim <kgene.kim@samsung.com> (cherry picked from commit 699efdd2d34c535f415516e06d3d9f0bed131664) (cherry picked from commit af7a950284af5526a26b4ae4809c1104b4dc47f3)
2011-10-16Merge branch 'fixes' of ↵Linus Torvalds
http://ftp.arm.linux.org.uk/pub/linux/arm/kernel/git-cur/linux-2.6-arm * 'fixes' of http://ftp.arm.linux.org.uk/pub/linux/arm/kernel/git-cur/linux-2.6-arm: ARM: 7128/1: vic: Don't write to the read-only register VIC_IRQ_STATUS ARM: 7122/1: localtimer: add header linux/errno.h explicitly ARM: 7117/1: perf: fix HW_CACHE_* events on Cortex-A9 ARM: 7113/1: mm: Align bank start to MAX_ORDER_NR_PAGES
2011-10-15ARM: 7128/1: vic: Don't write to the read-only register VIC_IRQ_STATUSZoltan Devai
This is unneeded and causes an abort on the SPMP8000 platform. Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Zoltan Devai <zoss@devai.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-10-15ARM: 7122/1: localtimer: add header linux/errno.h explicitlyShawn Guo
Per the text in Documentation/SubmitChecklist as below, we should explicitly have header linux/errno.h in localtimer.h for ENXIO reference. 1: If you use a facility then #include the file that defines/declares that facility. Don't depend on other header files pulling in ones that you use. Otherwise, we may run into some compiling error like the following one, if any file includes localtimer.h without CONFIG_LOCAL_TIMERS defined. arch/arm/include/asm/localtimer.h: In function ‘local_timer_setup’: arch/arm/include/asm/localtimer.h:53:10: error: ‘ENXIO’ undeclared (first use in this function) Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-10-15ARM: 7117/1: perf: fix HW_CACHE_* events on Cortex-A9Will Deacon
Using COHERENT_LINE_{MISS,HIT} for cache misses and references respectively is completely wrong. Instead, use the L1D events which are a better and more useful approximation despite ignoring instruction traffic. Reported-by: Alasdair Grant <alasdair.grant@arm.com> Reported-by: Matt Horsnell <matt.horsnell@arm.com> Reported-by: Michael Williams <michael.williams@arm.com> Cc: stable@kernel.org Cc: Jean Pihet <j-pihet@ti.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-10-14Update android_*_defconfigs to support UVClinux-linaro-3.1-2011.10-0-android-2John Stultz
Vishal requested the following options be enabled on the android configs: CONFIG_MEDIA_SUPPORT=y CONFIG_VIDEO_DEV=y CONFIG_USB_VIDEO_CLASS=y So this patch enables them where necessary. Signed-off-by: John Stultz <john.stultz@linaro.org>
2011-10-14savedefconfig compression of android defconfigsJohn Stultz
Update defconfigs to 3.1 savedefconfig results. Signed-off-by: John Stultz <john.stultz@linaro.org>
2011-10-12ARM: EXYNOS4: Add to support ORIGEN boardlinux-linaro-3.1-2011.10-0-android-1Sachin Kamat
This patch adds to support Insignal's ORIGEN board. Signed-off-by: JeongHyeon Kim <jhkim@insignal.co.kr> Conflicts: arch/arm/mach-exynos4/Kconfig Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: John Stultz <john.stultz@linaro.org>
2011-10-12Re-add Android defconfigs for imx53,omap3,omap4 and origenJohn Stultz
Re add Android defconfigs from linaro-android-3.0 branch. Signed-off-by: John Stultz <john.stultz@linaro.org>
2011-10-12Merge branch 'upstream/linaro-3.1' into linaro-android-3.1-agreen-rebaseJohn Stultz
Conflicts: drivers/usb/host/ehci-q.c drivers/usb/host/ehci.h
2011-10-10Merge branch 'fixes' of git://git.linaro.org/people/arnd/arm-socLinus Torvalds
* 'fixes' of git://git.linaro.org/people/arnd/arm-soc: ARM: mach-ux500: enable fix for ARM errata 754322 ARM: OMAP: musb: Remove a redundant omap4430_phy_init call in usb_musb_init ARM: OMAP: Fix i2c init for twl4030 ARM: OMAP4: MMC: fix power and audio issue, decouple USBC1 from MMC1
2011-10-10ARM: tegra: fix compilation error due to mach/hardware.h removalMarc Dietrich
This fixes a compilation error in cpu-tegra.c which was introduced in dc8d966bccde ("ARM: convert PCI defines to variables") which removed the now obsolete mach/hardware.h from the mach-tegra subtree. Signed-off-by: Marc Dietrich <marvin24@gmx.de> Signed-off-by: Olof Johansson <olof@lixom.net> Cc: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2011-10-09Revert "ARM: vfp: fix a hole in VFP thread migration"Colin Cross
This reverts commit c0822d4f0bcccf227b751cfe1c047f3bdae0f1ce.
2011-10-09Revert "ARM: vfp: ensure that thread flushing works if preempted"Colin Cross
This reverts commit 4f77fd436e53acf5bc0a06a24331f64b07fb33ec.
2011-10-09ARM: vfp: Always save VFP state in vfp_pm_suspendColin Cross
vfp_pm_suspend should save the VFP state in suspend after any lazy context switch. If it only saves when the VFP is enabled, the state can get lost when, on a UP system: Thread 1 uses the VFP Context switch occurs to thread 2, VFP is disabled but the VFP context is not saved Thread 2 initiates suspend vfp_pm_suspend is called with the VFP disabled, and the unsaved VFP context of Thread 1 in the registers Modify vfp_pm_suspend to save the VFP context whenever vfp_current_hw_state is not NULL. Change-Id: I91f29722d256a3afc1cc04df8b227541434ccffb Cc: Russell King <linux@arm.linux.org.uk> Cc: Barry Song <bs14@csr.com> Cc: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Colin Cross <ccross@android.com>
2011-10-09ARM: add option to flush console before rebootDima Zavin
If the console_lock was held while the system was rebooted, the messages in the temporary logbuffer would not have propogated to all the console drivers. This force releases the console lock if it failed to be acquired. Change-Id: I193dcf7b968be17966833e50b8b8bc70d5d9fe89 Signed-off-by: Dima Zavin <dima@android.com>
2011-10-09ARM: Move leds idle start/stop calls to idle notifiersTodd Poynor
Change-Id: I5d8e4e85b17bbab7992ecb477f0bdb5e4138b166 Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org> Signed-off-by: Todd Poynor <toddpoynor@google.com>
2011-10-09ARM: Call idle notifiersTodd Poynor
Change-Id: Id833e61c13baa1783705ac9e9046d1f0cc90c95e Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org> Signed-off-by: Todd Poynor <toddpoynor@google.com>
2011-10-09ARM: etm: Power down etm(s) when tracing is not enabled=?UTF-8?q?Arve=20Hj=C3=B8nnev=C3=A5g?=
MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Without this change a saw an 18% increase in idle power consumption on one deivce when trace support is compiled into the kernel. Now I see the same increase only when tracing. Change-Id: I21bb5ecf1b7d29ce3790ceeb5323409cc22d5a3b Signed-off-by: Arve Hjønnevåg <arve@android.com>
2011-10-09ARM: etm: Support multiple ETMs/PTMs.=?UTF-8?q?Arve=20Hj=C3=B8nnev=C3=A5g?=
MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit If more than one ETM or PTM are present, configure all of them and enable the formatter in the ETB. This allows tracing on dual core systems (e.g. omap4). Change-Id: I028657d5cf2bee1b23f193d4387b607953b35888 Signed-off-by: Arve Hjønnevåg <arve@android.com>
2011-10-09ARM: etm: Return the entire trace buffer if it is empty after reset=?UTF-8?q?Arve=20Hj=C3=B8nnev=C3=A5g?=
MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On some SOCs the read and write pointer are reset when the chip resets, but the trace buffer content is preserved. If the status bits indicates that the buffer is empty and we have never started tracing, assume the buffer is full instead. This can be useful if the system rebooted from a watchdog reset. Change-Id: Iaf21c2c329c6059004ee1d38e3dfff66d7d28029 Signed-off-by: Arve Hjønnevåg <arve@android.com>
2011-10-09ARM: etm: Add some missing locks and error checks=?UTF-8?q?Arve=20Hj=C3=B8nnev=C3=A5g?=
MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit It is not safe to call etm_lock or etb_lock without holding the mutex since another thread may also have unlocked the registers. Also add some missing checks for valid etb_regs in the etm sysfs entries. Change-Id: I939f76a6ea7546a8fc0d4ddafa2fd2b6f38103bb Signed-off-by: Arve Hjønnevåg <arve@android.com>
2011-10-09ARM: etm: Configure data tracing=?UTF-8?q?Arve=20Hj=C3=B8nnev=C3=A5g?=
MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The old code enabled data tracing, but did not configure the range. We now configure it to trace all data addresses by default, and add a trace_data_range attribute to change the range or disable data tracing. Change-Id: I9d04e3e1ea0d0b4d4d5bcb93b1b042938ad738b2 Signed-off-by: Arve Hjønnevåg <arve@android.com>
2011-10-09ARM: etm: Allow range selection=?UTF-8?q?Arve=20Hj=C3=B8nnev=C3=A5g?=
MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Trace kernel text segment by default as before, allow tracing of other ranges by writing a range to /sys/devices/etm/trace_range, or to trace everything by writing 0 0. Change-Id: Ibb734ca820fedf79560b20536247f1e1700cdc71 Signed-off-by: Arve Hjønnevåg <arve@android.com>
2011-10-09ARM: etm: Don't try to clear the buffer full status after reading the buffer=?UTF-8?q?Arve=20Hj=C3=B8nnev=C3=A5g?=
MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit If the write address was at the end of the buffer, toggling the trace capture bit would set the RAM-full status instead of clearing it, and if any of the stop bits in the formatter is set toggling the trace capture bit may not do anything. Instead use the read position to find out if the data has already been returned. This also fixes the read function so it works when the trace buffer is larger than the buffer passed in from user space. The old version would reset the trace buffer pointers after every read, so the second call to read would always return 0. Change-Id: I75256abe2556adfd66fd5963e46f9e84ae4645e1 Signed-off-by: Arve Hjønnevåg <arve@android.com>