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2008-07-23Merge branch 'for-linus' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx: (24 commits) I/OAT: I/OAT version 3.0 support I/OAT: tcp_dma_copybreak default value dependent on I/OAT version I/OAT: Add watchdog/reset functionality to ioatdma iop_adma: cleanup iop_chan_xor_slot_count iop_adma: document how to calculate the minimum descriptor pool size iop_adma: directly reclaim descriptors on allocation failure async_tx: make async_tx_test_ack a boolean routine async_tx: remove depend_tx from async_tx_sync_epilog async_tx: export async_tx_quiesce async_tx: fix handling of the "out of descriptor" condition in async_xor async_tx: ensure the xor destination buffer remains dma-mapped async_tx: list_for_each_entry_rcu() cleanup dmaengine: Driver for the Synopsys DesignWare DMA controller dmaengine: Add slave DMA interface dmaengine: add DMA_COMPL_SKIP_{SRC,DEST}_UNMAP flags to control dma unmap dmaengine: Add dma_client parameter to device_alloc_chan_resources dmatest: Simple DMA memcpy test client dmaengine: DMA engine driver for Marvell XOR engine iop-adma: fix platform driver hotplug/coldplug dmaengine: track the number of clients using a channel ... Fixed up conflict in drivers/dca/dca-sysfs.c manually
2008-07-15atmel-mci: Driver for Atmel on-chip MMC controllersHaavard Skinnemoen
This is a driver for the MMC controller on the AP7000 chips from Atmel. It should in theory work on AT91 systems too with some tweaking, but since the DMA interface is quite different, it's not entirely clear if it's worth merging this with the at91_mci driver. This driver has been around for a while in BSPs and kernel sources provided by Atmel, but this particular version uses the generic DMA Engine framework (with the slave extensions) instead of an avr32-only DMA controller framework. This driver can also use PIO transfers when no DMA channels are available, and for transfers where using DMA may be difficult or impractical for some reason (e.g. the DMA setup overhead is usually not worth it for very short transfers, and badly aligned buffers or lengths are difficult to handle.) Currently, the driver only support PIO transfers. DMA support has been split out to a separate patch to hopefully make it easier to review. The driver has been tested using mmc-block and ext3fs on several SD, SDHC and MMC+ cards. Reads and writes work fine, with read transfer rates up to 3.5 MiB/s on fast cards with debugging disabled. The driver has also been tested using the mmc_test module on the same cards. All tests except 7, 9, 15 and 17 succeed. The first two are unsupported by all the cards I have, so I don't know if the driver handles this correctly. The last two fail because the hardware flags a Data CRC Error instead of a Data Timeout error. I'm not sure how to deal with that. Documentation for this controller can be found in many data sheets from Atmel, including the AT32AP7000 data sheet which can be found here: http://www.atmel.com/dyn/products/datasheets.asp?family_id=682 Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com> Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
2008-07-08dmaengine: Driver for the Synopsys DesignWare DMA controllerHaavard Skinnemoen
This adds a driver for the Synopsys DesignWare DMA controller (aka DMACA on AVR32 systems.) This DMA controller can be found integrated on the AT32AP7000 chip and is primarily meant for peripheral DMA transfer, but can also be used for memory-to-memory transfers. This patch is based on a driver from David Brownell which was based on an older version of the DMA Engine framework. It also implements the proposed extensions to the DMA Engine API for slave DMA operations. The dmatest client shows no problems, but there may still be room for improvement performance-wise. DMA slave transfer performance is definitely "good enough"; reading 100 MiB from an SD card running at ~20 MHz yields ~7.2 MiB/s average transfer rate. Full documentation for this controller can be found in the Synopsys DW AHB DMAC Databook: http://www.synopsys.com/designware/docs/iip/DW_ahb_dmac/latest/doc/dw_ahb_dmac_db.pdf The controller has lots of implementation options, so it's usually a good idea to check the data sheet of the chip it's intergrated on as well. The AT32AP7000 data sheet can be found here: http://www.atmel.com/dyn/products/datasheets.asp?family_id=682 Changes since v4: * Use client_count instead of dma_chan_is_in_use() * Add missing include * Unmap buffers unless client told us not to Changes since v3: * Update to latest DMA engine and DMA slave APIs * Embed the hw descriptor into the sw descriptor * Clean up and update MODULE_DESCRIPTION, copyright date, etc. Changes since v2: * Dequeue all pending transfers in terminate_all() * Rename dw_dmac.h -> dw_dmac_regs.h * Define and use controller-specific dma_slave data * Fix up a few outdated comments * Define hardware registers as structs (doesn't generate better code, unfortunately, but it looks nicer.) * Get number of channels from platform_data instead of hardcoding it based on CONFIG_WHATEVER_CPU. * Give slave clients exclusive access to the channel Acked-by: Maciej Sosnowski <maciej.sosnowski@intel.com>, Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
2008-07-04avr32: Fix typo of IFSR in a comment in the PIO header fileHans-Christian Egtvedt
Signed-off-by: Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com> Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-07-02avr32: Power Management support ("standby" and "mem" modes)Haavard Skinnemoen
Implement Standby support. In this mode, we'll suspend all drivers, put the SDRAM in self-refresh mode and switch off the HSB bus ("frozen" mode.) Implement Suspend-to-mem support. In this mode, we suspend all drivers, put the SDRAM into self-refresh mode and switch off all internal clocks except the 32 kHz oscillator ("stop" mode.) The lowest-level suspend code runs from a small portion of SRAM allocated at startup time. This gets rid of a small potential race with the SDRAM where we might try to enter self-refresh mode in the middle of an icache burst. We also relocate all interrupt and exception handlers to SRAM during the small window when we enter and exit the low-power modes. We don't need to do any special tricks to start and stop the PLL. The main clock is automatically gated by hardware until the PLL is stable. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
2008-07-02avr32: Add system device for the internal interrupt controller (intc)Haavard Skinnemoen
This makes the intc show up in sysfs (probably not very useful), and allows us to easily add suspend/resume support later. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
2008-07-02avr32: Add simple SRAM allocatorHaavard Skinnemoen
Add SRAM allocator for avr32, which is just a thin wrapper around genalloc. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
2008-07-02avr32: Enable SDRAMC clock at startupHaavard Skinnemoen
The SDRAM controller needs a clock in order to respond to our commands, and suspend doesn't work very well without the SDRAM in self-refresh mode. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
2008-06-28avr32: Rename at32ap.c -> pdc.cHaavard Skinnemoen
The only thing left in at32ap.c is some PDC stuff. Rename the file to reflect what it actually does. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
2008-06-28avr32: Move setup_platform() into chip-specific fileHaavard Skinnemoen
Combine at32_clock_init() and at32_portmux_init() into setup_platform() and remove setup_platform() from at32ap.c. No functional change since all setup_platform() ever did was call those two functions. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
2008-06-27atmel_pwm: Rename the "mck" clock to "pwm_clk"Sedji Gaouaou
The name "mck" causes a conflict on AT91. Call it "pwm_clk" instead. Signed-off-by: Sedji Gaouaou <sedji.gaouaou@atmel.com> Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-06-27at32ap700x spi: enable pullups on MISODavid Brownell
This is a minor tweak to the at32ap700x pin configuration for the SPI input pin (MISO), enabling the on-chip weak pullup (typical 190K) to (a) ensure a fixed data value for missing or input-only slaves; (b) prevent power waste associated with inputs floating near VDDIO/2. Atmel's boards have no external pullup or pulldown on these pins, so it's unlikely other boards would address these issues with external pulldowns. Were there trouble, board-specific code could turn off the relevant pullup(s). Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-06-27avr32: Add PSIF platform devicesHans-Christian Egtvedt
This patch adds the PS/2 interface (PSIF) to the device code, split into two platform devices, one for each port. The function for adding the PSIF platform device is also added to the board header file. Signed-off-by: Hans-Christian Egtvedt <hcegtvedt@atmel.com> Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-06-27avr32: Add pin configuration choice to LCDC peripheralHans-Christian Egtvedt
This patch lets the board code choose which pin out to use for the LCD interface. On AT32AP7000 the LCDC is wired to two sets of pins, which lets the user choose between dual ethernet and 32-bit EBI. For the ATNGW100 board it is vital to have the choice to select the alternative pinout since this pinout is routed to the external headers. Update ATSTK1002 and ATSTK1004 to use the new interface. Signed-off-by: Hans-Christian Egtvedt <hcegtvedt@atmel.com> Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-06-27avr32: minor GPIO handling updatesDavid Brownell
On the odd chance some code uses a pin as a GPIO IRQ without calling gpio_request() or gpio_direction_input(), the debug dump should still show its pin status. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-06-27avr32: Allow board to define oscillator ratesAlex
On our custom board we have other oscillator rates than on atngw100 and atstk100x. Currently these rates are hardcoded in arch/avr32/mach-at32ap/at32ap700x.c. This patch moves them into board specific code. Signed-off-by: Alex Raimondi <raimondi@miromico.ch> Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-05-27avr32: Fix cpufreq oops when ondemand governor is defaultHaavard Skinnemoen
Move the AP7 cpufreq init to late_initcall() so that we don't try to bring up cpufreq until the governor is ready. x86 also uses late_initcall() for this. Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-04-19avr32: Implement set_rate(), set_parent() and mode() for pll1Hans-Christian Egtvedt
This patch is a take two of adding full functionality to PLL1 on AT32AP7000. This allows board-specific code and drivers to configure and enable PLL1. This is useful when precise control over the frequency of e.g. a genclock is needed and requested by users for the ABDAC device. The patch is based upon previous patches from both Haavard Skinnemoen and David Brownell. Signed-off-by: Hans-Christian Egtvedt <hcegtvedt@atmel.com> Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
2008-04-19avr32: Generic clockevents supportDavid Brownell
This combines three patches from David Brownell: * avr32: tclib support * avr32: simplify clocksources * avr32: Turn count/compare into a oneshot clockevent device Register both TC blocks (instead of just the first one) so that the AT32/AT91 tclib code will pick them up (instead of just the avr32-only PIT-style clocksource). Rename the first one and its resources appropriately. More cleanups to the cycle counter clocksource code - Disable all the weak symbol magic; remove the AVR32-only TCB-based clocksource code (source and header). - Mark the __init code properly. - Don't forget to report IRQF_TIMER. - Make the system work properly with this clocksource, by preventing use of the CPU "idle" sleep state in the idle loop when it's used. Package the avr32 count/compare timekeeping support as a oneshot clockevent device, so it supports NO_HZ and high res timers. This means it also supports plugging in other clockevent devices and clocksources. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
2008-04-19avr32: Move sleep code into mach-at32apHaavard Skinnemoen
Create a new file, pm-at32ap700x.S, in mach-at32ap and move the CPU idle sleep code there. Make it possible to disable the sleep code. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
2008-04-19avr32: Delete mostly unused header asm/intc.hHaavard Skinnemoen
Move the only thing that was actually implemented and used in asm/intc.h, intc_get_pending(), into asm/irq.h and delete asm/intc.h Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
2008-04-19avr32: pass i2c board info through at32_add_device_twiBen Nizette
New-style I2C drivers require that motherboard-mounted I2C devices are registered with the I2C core, typically at arch_initcall time. This can be done nice and neat by passing the struct i2c_board_info[] through at32_add_device_twi just like we do for the SPI board info. While we've got the hood up, remove a duplicate declaration of at32_add_device_twi() in board.h. [hskinnemoen@atmel.com: add missing i2c_board_info forward-declaration] Signed-Off-By: Ben Nizette <bn@niasdigital.com> Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
2008-04-06atmel_usba_udc: move endpoint declarations into platform data.Stelian Pop
The atmel_usba_udc driver is being used by several platforms and arches (avr32 and at91 ATM), and each platform may have different endpoint settings. The patch below moves the endpoint declarations into the platform data and make the necessary adjustments for AVR32 (improved by Haavard Skinnemoen <hskinnemoen@atmel.com>). Signed-off-by: Stelian Pop <stelian@popies.net> Acked-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
2008-02-08Basic PWM driver for AVR32 and AT91David Brownell
PWM device setup, and a simple PWM driver exposing a programming interface giving access to each channel's full capabilities. Note that this doesn't support starting several channels in synch. [hskinnemoen@atmel.com: allocate platform device dynamically] [hskinnemoen@atmel.com: Kconfig fix] Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com> Cc: Andrew Victor <linux@maxim.org.za> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2008-02-05gpiolib: avr32 at32ap platform supportDavid Brownell
Teach AVR32 to use the "GPIO Library" when exposing its GPIOs, so that signals on external chips (like GPIO expanders) can easily be used. This mostly reorganizes some existing logic, with two minor changes in behavior: - The PSR registers are used instead of the previous "gpio_mask" values, matching AT91 behavior and removing some duplication between that role and that of "pinmux_mask". - NR_IRQs grew to acommodate a bank of external GPIOs. Eventually this number should probably become a board-specific config option. There's a debugfs dump of status for the built-in GPIOs, showing which pins have deglitching, pullups, or open drain drive enabled, as well as the ID string used when requesting each IRQ. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Acked-by: Haavard Skinnemoen <hskinnemoen@atmel.com> Cc: Jean Delvare <khali@linux-fr.org> Cc: Eric Miao <eric.miao@marvell.com> Cc: Sam Ravnborg <sam@ravnborg.org> Cc: Philipp Zabel <philipp.zabel@gmail.com> Cc: Russell King <rmk@arm.linux.org.uk> Cc: Ben Gardner <bgardner@wabtec.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2008-01-25[AVR32] extint: Set initial irq type to low levelHaavard Skinnemoen
David Brownell pointed out a mismatch in the avr32 extint code: > I noticed a small glitch that's not fixed by this patch: the > initial type is falling edge, but IRQ_TYPE_NONE is mapped to > IRQ_TYPE_LEVEL_LOW. Potentially surprising. Fix it by setting the initial type (and handler) to low level, matching the meaning of IRQ_TYPE_NONE. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
2008-01-25[AVR32] extint: change set_irq_type() handlingDavid Brownell
Update the AVR32 EIC code to use the new __set_irq_handler_unlocked() call, getting rid of one more instance of this widespread problem. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
2008-01-25[AVR32] NMI debuggingHaavard Skinnemoen
Change the NMI handler to use the die notifier chain to signal anyone who cares. Add a simple "nmi debugger" which hooks into this chain and that may dump registers, task state, etc. when it happens. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
2008-01-25[AVR32] Add support for AT32AP7001 and AT32AP7002Haavard Skinnemoen
These are derivatives of the AT32AP7000 chip, which means that most of the code stays the same. Rename a few files, functions, definitions and config symbols to reflect that they apply to all AP700x chips, and exclude some platform devices from chips where they aren't present. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
2007-11-15[AVR32] Export intc_get_pending symbolHaavard Skinnemoen
Oprofile needs to call intc_get_pending() in order to determine whether a performance counter interrupt is pending. Also, include the header which declares intc_get_pending() and fix the definition to match the prototype. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
2007-11-15[AVR32] Fix duplicate clock index in at32ap machine codeben.nizette@iinet.net.au
There's a duplicate clock index between USART0 and USART1 which may be causing system crashes when USART0 is used. Change the USART0 index to '3', indicating the clock that is actually used by USART0. Signed-off-by: Ben Nizette <ben@niasdigital.com> Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
2007-11-15[AVR32] Turn off debugging in SMC driverHaavard Skinnemoen
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
2007-11-15Extend I/O resource for wdt0 for at32ap7000 devicesHans-Christian Egtvedt
This patch extends the I/O resource to 0xfff000cf which will enable the watchdog driver to access the reset cause (RCAUSE) register. Making it capable of reporting boot status. Signed-off-by: Hans-Christian Egtvedt <hcegtvedt@atmel.com> Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
2007-10-23[AVR32] ARRAY_SIZE() cleanupAlejandro Martinez Ruiz
Signed-off-by: Alejandro Martinez Ruiz <alex@flawedcode.org> Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
2007-10-23[AVR32] Implement at32_add_device_cf()Haavard Skinnemoen
Implement at32_add_device_cf() which will add a platform_device for the at32_cf driver (not merged yet). Separate out most of the at32_add_device_ide() code and use it to implement at32_add_device_cf() as well. This changes the API in the following ways: * The board code must initialize data->cs to the chipselect ID to use before calling any of these functions. * The board code must use GPIO_PIN_NONE to indicate unused CF pins. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
2007-10-23[AVR32] Implement more at32_add_device_foo() functionsHaavard Skinnemoen
Implement functions for adding platform devices for TWI, MCI, AC97C and ABDAC. They may need to be modified to cope with platform data, etc. when the corresponding drivers are ready to be merged, but such changes are much less likely to conflict than adding support for a whole new type of device. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
2007-10-23[AVR32] Fix a couple of sparse warningsHaavard Skinnemoen
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
2007-10-23[AVR32] Platform code for pata_at32Kristoffer Nyborg Gregertsen
This patch adds platform code for PATA devices on the AP7000. [hskinnemoen@atmel.com: board code left out for now since stk1000 doesn't support IDE out of the box] Signed-off-by: Kristoffer Nyborg Gregertsen <kngregertsen@norway.atmel.com> Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
2007-10-11[AVR32] SMC configuration in clock cyclesKristoffer Nyborg Gregertsen
This patch makes the SMC configuration take timings in clock cycles instead of nanoseconds. A function to calculate timings in clock cycles is added. This patch removes the rounding troubles of the previous SMC configuration method. [hskinnemoen@atmel.com: fix atstk1002/atngw100 flash config] Signed-off-by: Kristoffer Nyborg Gregertsen <gregerts@stud.ntnu.no> Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
2007-10-11[AVR32] Wire up USBA deviceHaavard Skinnemoen
Implement at32_add_device_usba() and use it to wire up the USBA device on ATSTK1000 and ATNGW100. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
2007-10-11[AVR32] add multidrive support for pio driverMatteo Vit
This patch add multidrive support for pio driver Signed-off-by: Matteo Vit - Dave S.r.l. <matteo.vit@dave.eu> Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
2007-10-11[AVR32] /sys/kernel/debug/at32ap_clkDavid Brownell
When debugfs is available, /sys/kernel/debug/at32ap_clk will provide a dump of the power manager registers and of the current clock tree. This can help sorting out various surprises, and when making runtime PM work. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
2007-10-11[AVR32] Move AT32_PM_BASE definition into pm.hHaavard Skinnemoen
We don't want to redefine this in every file that needs to access the PM. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
2007-07-18[AVR32] Add Atmel SSC driver platform device to AT32AP architectureHans-Christian Egtvedt
This patch adds register definitions, clocks and IRQs to the platform devices. Signed-off-by: Hans-Christian Egtvedt <hcegtvedt@atmel.com> Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
2007-07-18[AVR32] CPU frequency scaling for AT32APHans-Christian Egtvedt
This patch enables CPU frequency scaling for AT32AP devices. This will enable the CPU to scale between the speed of the high speed bus and the master clock and thus save some power. The patch also adds a parent to cpu_clk and a cpu_clk_set_rate to enable changing the CPU clock divider in a sane way. The driver does not check if the given rate is 0, thus resulting in a div by 0. I think this check should be go into the clk_set_rate framework, and not here. Tested on AT32AP7000/ATSTK1000. Hardware documentation can be found in the AT32AP7000 datasheet. Signed-off-by: Hans-Christian Egtvedt <hcegtvedt@atmel.com> Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
2007-07-18[AVR32] Split SM device into PM, RTC, WDT and EICHaavard Skinnemoen
Split the SM platform device into separate platform devices for PM, RTC, WDT and EIC. This is more correct according to the documentation and allows us to simplify the code a little. Also turn the EIC driver into a real platform driver. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com> Acked-by: Hans-Christian Egtvedt <hcegtvedt@atmel.com>
2007-06-23[AVR32] Initialize dma_mask and dma_coherent_maskDavid Brownell
The current at32ap7000 platform devices aren't declared as supporting DMA, so that layered drivers can't tell whether they need to manage DMA. This patch makes all those platform devices report that they support DMA. Most do, but in a few cases this is inappropriate. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
2007-05-15[AVR32] Implement platform hooks for atmel_lcdfb driverHaavard Skinnemoen
This modifies and extends the existing lcdc platform code to support the new atmel_lcdfb driver. The ATSTK1000 board code is set up to use the on-board Samsung LTV350QV LCD panel. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
2007-05-09AVR32: Spinlock initializer cleanupThomas Gleixner
Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
2007-04-27[AVR32] Make I/O access macros work with external devicesHaavard Skinnemoen
Fix the I/O access macros so that they work with externally connected devices accessed in little-endian mode over any bus width: * Use a set of macros to define I/O port- and memory operations borrowed from MIPS. * Allow subarchitecture to specify address- and data-mangling * Implement at32ap-specific port mangling (with build-time configurable bus width. Only one bus width at a time supported for now.) * Rewrite iowriteN and friends to use write[bwl] and friends (not the __raw counterparts.) This has been tested using pata_pcmcia to access a CompactFlash card connected to the EBI (16-bit bus width.) Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>