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Conflicts:
arch/arm/mach-imx/mach-mx31_3ds.c
arch/arm/mach-imx/mach-scb9328.c
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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CONFIG_ARCH_* are deprecated, so remove one user.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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On the i.MX SPI driver the chipselect pins can be of the following types:
- internal: when the chipselect pin is used as a dedicated CS pin of the CSPI controller
- GPIO: a generic GPIO can be used as a chipselect funtion
On the mx27_3ds the SPI2 chip select is a GPIO, so don't annotate 'internal' in the chip select
definition.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Use the standard gpio_to_irq function instead of a dedicated IRQ_GPIOx macro.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Place the UART gpio initialization inside the scb9328_init function as it is done on
other i.MX boards.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Cc: Sascha Hauer <kernel@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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As no flag is passed into UART0 platform data, pass NULL argument
when registering UART0.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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There are several occurences where MXC_INTERNAL_IRQ is
assumed to be the start of the gpio interrupts. It was never
meant this way. Replace these with gpio_to_irq.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Fabio Estevam <fabio.estevam@freescale.com>
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This becomes meaningless in subsequent patches.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This becomes meaningless in subsequent patches.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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CONFIG_ARCH_* are deprecated, so remove one user.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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since we now can include all soc specific headers at once we do not
need the ifdeffery anymore.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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All soc specific header have proper namespace now and thus can
be included at once.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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We have a clocksource which renders CLOCK_TICK_RATE useless. Define
it to a bogus value to get rid of some ifdeffery.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This allows to move the led definition to .init.rodata.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Cc: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This gets rid of per machine struct platform_device definitions and allows
to move the platform data and led definition to .init.rodata.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This gets rid of per machine struct platform_device definitions and allows
to move the platform data and led definition to .init.rodata.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Instead of using gpio_request followed by gpio_direction_output use gpio_request_array
when requesting multiple pins.
Also fixed the location of the delay for the reset and make the BABBAGE_USB_PHY_RESET to toggle.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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common place
The USB PHY Reset GPIO can be configured in the same place as the other GPIOs.
While at it rename the pin as BABBAGE_USB_PHY_RESET to make clearer its purpose.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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", o" was used for ", 0"
", 17" was used for ", 7 | 0x10"
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The clock from which the I2C timing is derived is the ipg_perclk not ipg_clk.
I2C bus frequency was lower by a factor of ~8 due to the clock divider
calculation being based on 66.5MHz IPG clock while the bus actually
uses 8MHz ipg_perclk.
Kernel version: 3.0.0-rc2 branch 'imx-for-next' of git://git.pengutronix.de/git/imx/linux-2.6
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The pins are actually used (not in mainline yet):
D4 -> SSP2_D0
D5 -> GPIO
D6 -> GPIO
D7 -> GPIO for owire
so their pinmapping for SSP0 is wrong.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Fix below build error:
CC arch/arm/mach-mxs/devices/platform-mxsfb.o
arch/arm/mach-mxs/devices/platform-mxsfb.c: In function 'mx23_add_mxsfb':
arch/arm/mach-mxs/devices/platform-mxsfb.c:27: error: implicit declaration of function 'DMA_BIT_MASK'
make[2]: *** [arch/arm/mach-mxs/devices/platform-mxsfb.o] Error 1
make[1]: *** [arch/arm/mach-mxs/devices] Error 2
make: *** [arch/arm/mach-mxs] Error 2
Signed-off-by: Axel Lin <axel.lin@gmail.com>
Tested-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Mark the actual interrupt source for some interrupts currently marked as reserved.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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iomux-v3.c uses NO_PAD_CTRL as a 32 bit value
so it should not be shifted left by MUX_PAD_CTRL_SHIFT(41)
Previously, anything requesting NO_PAD_CTRL would get
their pad control register set to 0.
Since it is a pad control mask, place it with the other mask values.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Acked-by: Lothar Waßmann <LW@KARO-electronics.de>
Tested-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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On MX51 the address space length for SSI is 16KB.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The imx25 sdma script only gets TO1 version, so there is no need
to encode "to1" in the variable name.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The value 0 is not a valid TO version number. With the current
code, imx-sdma driver will try to load firmware sdma-imx25-to0.bin,
which is obviously not a good name. Instead, sdma-imx25-to1.bin
makes much more sense.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The sdma on soc imx25 is not a V1 but V2 block.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The sdma on all imx soc gets 16K IO space not 4K.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Fix the following warning:
CC arch/arm/plat-mxc/iomux-v1.o
arch/arm/plat-mxc/iomux-v1.c: In function 'mxc_gpio_setup_multiple_pins':
arch/arm/plat-mxc/iomux-v1.c:160: warning: 'ret' may be used uninitialized in this function
arch/arm/plat-mxc/iomux-v1.c:160: note: 'ret' was declared here
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Fix the 2.8V (VMMC1) and 1.8V (VGEN) voltage generation on mx27_3ds.
Also configure the IOMUX for the PMIC interrupt pin and for the CSPI chip select that is connected
to the MC13783 PMIC.
In order to get the voltage for the LCD (2.8V and 1.8V) it is also necessary to turn on GPO1 and GPO3
supplies because they are connected to switches that enable these two voltages.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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When setting the IOMUX of multiple pins via mxc_gpio_setup_multiple_pins, gpio_request
is called and this prevents subsequent calls of gpio_request done by drivers to succeed.
Remove gpio_request call from mxc_gpio_setup_multiple_pins function.
As gpio_request is removed from mxc_gpio_setup_multiple_pins, there is no need to have
mxc_gpio_release_multiple_pins anymore, so remove this function.
Tested on a mx27_3ds board and after applying this patch it is possible to define all the
IOMUX setup in a static array
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Original code was assuming that the CSPI1 pins on the
MX31PDK were the primary pin function, which is incorrect.
On MX31PDK board these are the pins that provide CSPI1 functionality:
DSR_DCE1 (ALT mode 1) --> CSPI1_CLK
RI_DCE1 (ALT mode 1) --> CSPI1_RDY
DTR_DTE1 -->CSI1_MOSI
DSR_DTE1 --> CSPI1_MISO
DTR_DCE2 ---> CSPI1_SS2
The 3 IOMUX settings above are done via GPR as per Table A-1 of the MX31RM.
This patch fixes the CSPI1 IOMUX and makes the LCD to be functional.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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MX53 has 4 chip selects (CS0 - CS3) and the valid combinations are:
- CS0 (128MB)
- CS0 (64MB), CS1 (64MB)
- CS0 (64MB), CS1 (32MB), CS2 (32MB)
- CS0 (32MB), CS1 (32MB), CS2 (32MB) , CS3 (32MB)
Fix these addresses and also take into account all the four possibilities.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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MX53_PAD_PATA_DATA6 can have the following alternate modes:
PATA_DATA_6: mode 0
GPIO2_6: mode 1
EMI_NANDF_D_6: mode 3
ESDHC4_DAT6 mode 4
GPU3d_GPU_DEBUG_OUT_6 mode 5
IPU_DIAG_BUS_6 mode 6
Fix the modes accordingly.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Dinh Nguyen <dinh.nguyen@freescale.com>
Acked-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Let USB Storage be built by default.
Also select NLS_ISO8859 so that the USB device can be mounted.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The patch fixes the warning below.
arch/arm/configs/mxs_defconfig:92:warning: symbol value 'm' invalid for RTC_CLASS
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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* 'msm-fix' of git://codeaurora.org/quic/kernel/davidb/linux-msm:
msm: timer: Fix DGT rate on 8960 and 8660
msm: timer: compensate for timer shift in msm_read_timer_count
msm: timer: Fix SMP build error
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The DGT runs at 27 MHz divided by 4 on 8660 and 8960.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/konrad/xen
* 'stable/bug.fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/konrad/xen:
xen/setup: Fix for incorrect xen_extra_mem_start.
xen: When calling power_off, don't call the halt function.
xen: Fix compile warning when CONFIG_SMP is not defined.
xen: support CONFIG_MAXSMP
xen: partially revert "xen: set max_pfn_mapped to the last pfn mapped"
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* 'kvm-updates/3.0' of git://git.kernel.org/pub/scm/virt/kvm/kvm:
KVM: Fix register corruption in pvclock_scale_delta
KVM: MMU: fix opposite condition in mapping_level_dirty_bitmap
KVM: VMX: do not overwrite uptodate vcpu->arch.cr3 on KVM_SET_SREGS
KVM: MMU: Fix build warnings in walk_addr_generic()
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The 128-bit multiply in pvclock.h was missing an output constraint for
EDX which caused a register corruption to appear. Thanks to Ulrich for
diagnosing the EDX corruption and Avi for providing this fix.
Signed-off-by: Zachary Amsden <zamsden@redhat.com>
Signed-off-by: Avi Kivity <avi@redhat.com>
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The condition is opposite, it always maps huge page for the dirty tracked page
Reported-by: Steve <stefan.bosak@gmail.com>
Signed-off-by: Steve <stefan.bosak@gmail.com>
Signed-off-by: Avi Kivity <avi@redhat.com>
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Only decache guest CR3 value if vcpu->arch.cr3 is stale.
Fixes loadvm with live guest.
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
Tested-by: Markus Schade <markus.schade@gmail.com>
Signed-off-by: Avi Kivity <avi@redhat.com>
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On 3.0-rc1 I get
In file included from arch/x86/kvm/mmu.c:2856:
arch/x86/kvm/paging_tmpl.h: In function ‘paging32_walk_addr_generic’:
arch/x86/kvm/paging_tmpl.h:124: warning: ‘ptep_user’ may be used uninitialized in this function
In file included from arch/x86/kvm/mmu.c:2852:
arch/x86/kvm/paging_tmpl.h: In function ‘paging64_walk_addr_generic’:
arch/x86/kvm/paging_tmpl.h:124: warning: ‘ptep_user’ may be used uninitialized in this function
caused by 6e2ca7d1802bf8ed9908435e34daa116662e7790. According to Takuya
Yoshikawa, ptep_user won't be used uninitialized so shut up gcc.
Cc: Takuya Yoshikawa <yoshikawa.takuya@oss.ntt.co.jp>
Link: http://lkml.kernel.org/r/20110530094604.GC21833@liondog.tnic
Signed-off-by: Borislav Petkov <bp@alien8.de>
Signed-off-by: Avi Kivity <avi@redhat.com>
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Commit 916f676f8dc started reserving boot service code since some systems
require you to keep that code around until SetVirtualAddressMap is called.
However, in some cases those areas will overlap with reserved regions.
The proper medium-term fix is to fix the bootloader to prevent the
conflicts from occurring by moving the kernel to a better position,
but the kernel should check for this possibility, and only reserve regions
which can be reserved.
Signed-off-by: Maarten Lankhorst <m.b.lankhorst@gmail.com>
Link: http://lkml.kernel.org/r/4DF7A005.1050407@gmail.com
Acked-by: Matthew Garrett <mjg@redhat.com>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
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