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Signed-off-by: Sujith <Sujith.Manoharan@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
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When issuing a reset, the TSF value is lost in the hardware because of
the 913x specific cold reset. As with some AR9280 cards, the TSF needs
to be preserved in software here.
Additionally, there's an issue that frequently prevents a successful
TSF write directly after the chip reset. In this case, repeating the
TSF write after the initval-writes usually works.
This patch detects failed TSF writes and recovers from them, taking
into account the delay caused by the initval writes.
Signed-off-by: Felix Fietkau <nbd@openwrt.org>
Reported-by: Björn Smedman <bjorn.smedman@venatech.se>
Cc: stable@kernel.org
Signed-off-by: John W. Linville <linville@tuxdriver.com>
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Reported-by: Johannes Berg <johannes@sipsolutions.net>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
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Reported-by: Johannes Berg <johannes@sipsolutions.net>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
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The 'bf_retries' field of the ath_buf structure was used for both
software retries (AMPDU subframes) and hardware retries (legacy
frames). This led to a wrong retry count being reported for the A-MPDU
rate control stats.
This patch changes the code to no longer use bf_retries for reporting
retry counts, but instead always using the real on-chip retry count
from the ath_tx_status.
Additionally, if the first subframe of an A-MPDU was not acked, the tx
status report is submitted along with the first acked subframe, which
may not contain the correct rates in the tx info.
This is easily corrected by saving the tx rate info before looping over
subframes, and then copying it back once the A-MPDU status report is
submitted.
In my tests this change improves throughput visibly.
Signed-off-by: Felix Fietkau <nbd@openwrt.org>
Reported-by: Björn Smedman <bjorn.smedman@venatech.se>
Cc: stable@kernel.org
Signed-off-by: John W. Linville <linville@tuxdriver.com>
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Move ath9k_ps_wakeup() down just before accessing hw registers.
Signed-off-by: Vasanthakumar Thiagarajan <vasanth@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
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Signed-off-by: Vasanthakumar Thiagarajan <vasanth@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
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It is possbile that the transmission of paprd test frame
might not get completed in 100ms if tx is stuck. Freeing
this skb upon timeout in ath_paprd_calibrate() will result
in accessing already freed memory when the associated pending
buffer is drained in txq. This patch fixes this issue.
Signed-off-by: Vasanthakumar Thiagarajan <vasanth@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
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There are few places where ANI is started without checking
if it is right to start. This might lead to a case where ani
timer would be left undeleted and cause improper memory acccess
during module unload. This bug is clearly exposed with
paprd support where the driver detects tx hang and does a
chip reset. During this reset ani is (re)started without checking
if it needs to be started. This would leave a timer scheduled
even after all the resources are freed and cause a panic.
This patch introduces a bit in sc_flags to indicate if ani
needs to be started in sw_scan_start() and ath_reset().
This would fix the following panic. This issue is easily seen
with ar9003 + paprd.
BUG: unable to handle kernel paging request at 0000000000003f38
[<ffffffff81075391>] ? __queue_work+0x41/0x50
[<ffffffff8106afaa>] run_timer_softirq+0x17a/0x370
[<ffffffff81088be8>] ? tick_dev_program_event+0x48/0x110
[<ffffffff81061f69>] __do_softirq+0xb9/0x1f0
[<ffffffff810ba060>] ? handle_IRQ_event+0x50/0x160
[<ffffffff8100af5c>] call_softirq+0x1c/0x30
[<ffffffff8100c9f5>] do_softirq+0x65/0xa0
[<ffffffff81061e25>] irq_exit+0x85/0x90
[<ffffffff8155e095>] do_IRQ+0x75/0xf0
[<ffffffff815570d3>] ret_from_intr+0x0/0x11
<EOI>
[<ffffffff812fd67b>] ? acpi_idle_enter_simple+0xe4/0x119
[<ffffffff812fd674>] ? acpi_idle_enter_simple+0xdd/0x119
[<ffffffff81441c87>] cpuidle_idle_call+0xa7/0x140
[<ffffffff81008da3>] cpu_idle+0xb3/0x110
[<ffffffff81550722>] start_secondary+0x1ee/0x1f5
Signed-off-by: Vasanthakumar Thiagarajan <vasanth@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
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Signed-off-by: John W. Linville <linville@tuxdriver.com>
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Some vendors require the LED to be ON always irrespective of any
radio activity. Introducing a module parameter to disable blinking,
so that one can choose between always on or led blink during
activity.
Signed-off-by: Vivek Natarajan <vnatarajan@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
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Without this we could start trying to work with the device without
it being fully functional yet and loose some packets upon resume.
Cc: Aeolus Yang <aeolus.yang@atheros.com>
Cc: Madhan Jaganathan <madhan.jaganathan@atheros.com>
signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
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The array we use will vary depending on whether or not we are
to go to lower power or not. The default values (iniPcieSerdes)
are a copy or what go into the registers through the INI files.
Cc: Aeolus Yang <aeolus.yang@atheros.com>
Cc: Madhan Jaganathan <madhan.jaganathan@atheros.com>
Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
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This can be useful during testing of new ASPM tweaks which often
have to be done through the PCI Serializer-Deserializer (SERDES).
Cc: Aeolus Yang <aeolus.yang@atheros.com>
Cc: Madhan Jaganathan <madhan.jaganathan@atheros.com>
Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
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The LowPower array writes disables the PLL when ASPM is enabled.
The host driver makes quite a few calls to ath9k_hw_configpcipowersave()
and these same calls also need to ensure the PLL is off when they issue
it.
Cc: Aeolus Yang <aeolus.yang@atheros.com>
Cc: Madhan Jaganathan <madhan.jaganathan@atheros.com>
Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
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The AR_WA register should not be read when in sleep state so
add a variable we can stash its value into for when we need
to set it. Additionally the AR_WA_D3_TO_L1_DISABLE_REAL
(bit 16) needs to be removed.
Cc: Aeolus Yang <aeolus.yang@atheros.com>
Cc: Madhan Jaganathan <madhan.jaganathan@atheros.com>
signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
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This patch adds USB IDs for some more supported
devices.
Signed-off-by: Sujith <Sujith.Manoharan@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
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Now that ampdu_action() can sleep, remove all
the driver hacks and just issue WMI commands
to the target.
Signed-off-by: Sujith <Sujith.Manoharan@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
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IBSS requires the cwmin and cwmax to be respected when
we reset the txqueues on AR9003 otherwise the distribution
of beacons will be balanced towards the AR9003 card first
preventing equal contention for air time for other peers
on the IBSS.
Without this IBSS will work but only the AR9003 card will be
be issuing beacons on the IBSS.
Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
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This capability check is no longer used, so it can be removed along with
the now-obsolete ath9k_hw_getcapability function.
Signed-off-by: Felix Fietkau <nbd@openwrt.org>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
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mac80211 already masks the HT sta capabilities based on hardware support
Signed-off-by: Felix Fietkau <nbd@openwrt.org>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
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The driver always sets this to enabled, but this can be simplified with
a small change to ah->sta_id1_defaults instead.
This change also removes the now-obsolete ath9k_hw_setcapability function.
Signed-off-by: Felix Fietkau <nbd@openwrt.org>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
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This is only used as a workaround for an issue in one specific hw revision.
Signed-off-by: Felix Fietkau <nbd@openwrt.org>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
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TKIP MIC support is always enabled anyway.
Signed-off-by: Felix Fietkau <nbd@openwrt.org>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
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replace calls that read this capability with accesses to ath9k_hw's
regulatory data.
Signed-off-by: Felix Fietkau <nbd@openwrt.org>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
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All of the ciphers that are tested for are always supported
Signed-off-by: Felix Fietkau <nbd@openwrt.org>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
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All AR9003 features are now complete so enable AR9003
support.
Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
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Signed-off-by: Felix Fietkau <nbd@openwrt.org>
Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
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Signed-off-by: Felix Fietkau <nbd@openwrt.org>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
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Signed-off-by: Felix Fietkau <nbd@openwrt.org>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
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Signed-off-by: Felix Fietkau <nbd@openwrt.org>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
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ath9k_hw_setmac() only copies the mac address it is called with into
common->macaddr, yet in all call sites, the supplied mac address pointer
is already common->macaddr.
Signed-off-by: Felix Fietkau <nbd@openwrt.org>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
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Debugfs requires a u32 for bool knobs though so we turn the
ath9k_hw knob into a u32 as well.
Signed-off-by: Felix Fietkau <nbd@openwrt.org>
Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
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ath9k tries to prevent WMM queue tx buffer starvation caused by
traffic on different queues by limiting the number of pending frames
in a tx queue (tracked in the ath_buf structure). This had a leak
issue, because the a skb can be reassigned to a different ath_buf
in the tx path, causing the pending frame counter to become inaccurate.
To fix this, track the number of frames in an array in the softc,
using the mac80211 queue mapping as index.
Signed-off-by: Felix Fietkau <nbd@openwrt.org>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
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AR5416 and all newer chipsets use a 32 bit rx timestamp, so there
is no need to keep the 15 bit timestamp extending logic around.
This patch removes ath9k_hw_extend_tsf (replaced by a call to
ath9k_hw_gettsf64), and reduces the frequency of TSF reads, which
can improve performance in some cases.
This change also has the side effect of making rx timestamps
more accurate.
Signed-off-by: Felix Fietkau <nbd@openwrt.org>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
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Signed-off-by: Felix Fietkau <nbd@openwrt.org>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
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Signed-off-by: Felix Fietkau <nbd@openwrt.org>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
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Signed-off-by: Felix Fietkau <nbd@openwrt.org>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
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Signed-off-by: Felix Fietkau <nbd@openwrt.org>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
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ath_get_mac80211_qnum() expects the queue 'subtype'
(internal ID for the WMM AC) as argument when looking up
the mac80211 queue, however ath_wake_mac80211_queue provides
txq->axq_qnum instead, which contains the hardware queue
number. Fix this by keeping track of the WMM class ID in
the txq data structure.
Signed-off-by: Felix Fietkau <nbd@openwrt.org>
Cc: stable@kernel.org
Signed-off-by: John W. Linville <linville@tuxdriver.com>
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This updates the initvals for AR9003 to adjust the 5 GHz tx gain
tables for femless and high power PA.
References:
Osprey 2.0 header file ver 72
Osprey 2.2 header file ver 20
Checksums:
$ ./initvals -f ar9003-2p0
0x00000000c2bfa7d5 ar9300_2p0_radio_postamble
0x00000000ada2b114 ar9300Modes_lowest_ob_db_tx_gain_table_2p0
0x00000000e0bc2c84 ar9300Modes_fast_clock_2p0
0x00000000056eaf74 ar9300_2p0_radio_core
0x0000000000000000 ar9300Common_rx_gain_table_merlin_2p0
0x0000000078658fb5 ar9300_2p0_mac_postamble
0x0000000023235333 ar9300_2p0_soc_postamble
0x0000000054d41904 ar9200_merlin_2p0_radio_core
0x00000000748572cf ar9300_2p0_baseband_postamble
0x000000009aa5a0a4 ar9300_2p0_baseband_core
0x000000003dffa526 ar9300Modes_high_power_tx_gain_table_2p0
0x000000001cfda724 ar9300Modes_high_ob_db_tx_gain_table_2p0
0x0000000011302700 ar9300Common_rx_gain_table_2p0
0x00000000e3eab114 ar9300Modes_low_ob_db_tx_gain_table_2p0
0x00000000c9d66d40 ar9300_2p0_mac_core
0x000000001e1d0800 ar9300Common_wo_xlna_rx_gain_table_2p0
0x00000000a0c54980 ar9300_2p0_soc_preamble
0x00000000292e2544 ar9300PciePhy_pll_on_clkreq_disable_L1_2p0
0x000000002d3e2544 ar9300PciePhy_clkreq_enable_L1_2p0
0x00000000293e2544 ar9300PciePhy_clkreq_disable_L1_2p0
$ ./initvals -f ar9003-2p2
0x00000000c2bfa7d5 ar9300_2p2_radio_postamble
0x00000000ada2b114 ar9300Modes_lowest_ob_db_tx_gain_table_2p2
0x00000000e0bc2c84 ar9300Modes_fast_clock_2p2
0x00000000056eaf74 ar9300_2p2_radio_core
0x0000000000000000 ar9300Common_rx_gain_table_merlin_2p2
0x0000000078658fb5 ar9300_2p2_mac_postamble
0x0000000023235333 ar9300_2p2_soc_postamble
0x0000000054d41904 ar9200_merlin_2p2_radio_core
0x000000008475a084 ar9300_2p2_baseband_postamble
0x000000009aaafd90 ar9300_2p2_baseband_core
0x000000003dffa526 ar9300Modes_high_power_tx_gain_table_2p2
0x000000001cfda724 ar9300Modes_high_ob_db_tx_gain_table_2p2
0x0000000011302700 ar9300Common_rx_gain_table_2p2
0x00000000a9a2b114 ar9300Modes_low_ob_db_tx_gain_table_2p2
0x00000000a9d66d40 ar9300_2p2_mac_core
0x000000001e1d0800 ar9300Common_wo_xlna_rx_gain_table_2p2
0x00000000a0c531c8 ar9300_2p2_soc_preamble
0x00000000292e2544 ar9300PciePhy_pll_on_clkreq_disable_L1_2p2
0x000000002d3e2544 ar9300PciePhy_clkreq_enable_L1_2p2
0x00000000293e2544 ar9300PciePhy_clkreq_disable_L1_2p2
Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
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All AR9003 devices are PCI-E only, the extra delay here
is not required and only reduces the delay for loading
the initial register values by at least 14ms.
Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
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AR9003 has been tested with the new ANI implementation
and so ANI can now be enabled for that family.
Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
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This adds support for ANI for AR9003. The implementation for
ANI for AR9003 is slightly different than the one used for
the older chipset families. It can technically be used for
the older families as well but this is not yet fully tested
so we only enable the new ANI for the AR5008, AR9001 and AR9002
families with a module parameter, force_new_ani.
The old ANI implementation is left intact.
Details of the new ANI implemention:
* ANI adjustment logic is now table driven so that each ANI level
setting is parameterized. This makes adjustments much more
deterministic than the old procedure based logic and allows
adjustments to be made incrementally to several parameters per
level.
* ANI register settings are now relative to INI values; so ANI
param zero level == INI value. Appropriate floor and ceiling
values are obeyed when adjustments are combined with INI values.
* ANI processing is done once per second rather that every 100ms.
The poll interval is now a set upon hardware initialization and
can be picked up by the core driver.
* OFDM error and CCK error processing are made in a round robin
fashion rather than allowing all OFDM adjustments to be made
before CCK adjustments.
* ANI adjusts MRC CCK off in the presence of high CCK errors
* When adjusting spur immunity (SI) and OFDM weak signal detection,
ANI now sets register values for the extension channel too
* When adjusting FIR step (ST), ANI now sets register for FIR step
low too
* FIR step adjustments now allow for an extra level of immunity for
extremely noisy environments
* The old Noise immunity setting (NI), which changes coarse low, size
desired, etc have been removed. Changing these settings could affect
up RIFS RX as well.
* CCK weak signal adjustment is no longer used
* ANI no longer enables phy error interrupts; in all cases phy hw
counting registers are used instead
* The phy error count (overflow) interrupts are also no longer used
for ANI adjustments. All ANI adjustments are made via the polling
routine and no adjustments are possible in the ISR context anymore
* A history settings buffer is now correctly used for each channel;
channel settings are initialized with the defaults but later
changes are restored when returning back to that channel
* When scanning, ANI is disabled settings are returned to (INI) defaults.
* OFDM phy error thresholds are now 400 & 1000 (errors/second units) for
low/high water marks, providing increased stability/hysteresis when
changing levels.
* Similarly CCK phy error thresholds are now 300 & 600 (errors/second)
Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
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The new ANI implementation will use this to skip ANI
calibration upon a scan. This cannot be ported to the
older ANI implementation unless default ANI values from
the ANI are also used upon a scan. This is essentially
what one of the things thenew ANI does.
Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
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Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
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The AR9003 hardware family will use a slightly modified ANI
implementation which has not yet been tested on the other hardware
families. To allow for this new ANI implementation a few ANI
calls need to be abstracted away. This patch just allows for
each hardware family to declare their own ANI ops and annotates
the current ANI implementation as old.
Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
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We get an MIB interrupt when we hit certain PHY error counter
thresholds. If ANI is disabled but the MIB interrupt is enabled
we'll keep around the old MIB interrupt causes.
Since ath9k disables the MIB interrupt when ANI is disabled
this is not a fix, but more of a sanity fix in case we ever
need the MIB interrupt enabled but disabling ANI.
Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
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The clock rate was assumed to be static but it actually
changes depending on the mode of operation, correct this
to help improve the calcuation of the listenTime for ANI.
This change will help adjust ANI more accurately on different
PHY thresholds.
Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
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