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2010-05-13sh: simplify WARN usage in SH clock driverGuennadi Liakhovetski
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-05-13sh: move sh clock-cpg.c contents to drivers/sh/clk-cpg.cMagnus Damm
Move the CPG helpers to drivers/sh/clk-cpg.c V2. This to allow SH-Mobile ARM to share the code with SH. All functions except the legacy CPG stuff is moved. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-05-13sh: move sh clock.c contents to drivers/sh/clk.Magnus Damm
This patch is V2 of the SH clock framework move from arch/sh/kernel/cpu/clock.c to drivers/sh/clk.c. All code except the following functions are moved: clk_init(), clk_get() and clk_put(). The init function is still kept in clock.c since it depends on the SH-specific machvec implementation. The symbols clk_get() and clk_put() already exist in the common ARM clkdev code, those symbols are left in the SH tree to avoid duplicating them for SH-Mobile ARM. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-04-26Merge branch 'sh/stable-updates'Paul Mundt
Conflicts: arch/sh/kernel/dwarf.c drivers/dma/shdma.c Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-04-15sh: intc: IRQ auto-distribution support.Paul Mundt
This implements support for hardware-managed IRQ balancing as implemented by SH-X3 cores (presently only hooked up for SH7786, but can probably be carried over to other SH-X3 cores, too). CPUs need to specify their distribution register along with the mask definitions, as these follow the same format. Peripheral IRQs that don't opt out of balancing will be automatically distributed at the whim of the hardware block, while each CPU needs to verify whether it is handling the IRQ or not, especially before clearing the mask. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-04-13sh: intc: userimask support.Paul Mundt
This adds support for hardware-assisted userspace irq masking for special priority levels. Due to the SR.IMASK interactivity, only some platforms implement this in hardware (including but not limited to SH-4A interrupt controllers, and ARM-based SH-Mobile CPUs). Each CPU needs to wire this up on its own, for now only SH7786 is wired up as an example. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-04-13sh: intc: Tidy up loglevel mismatches.Paul Mundt
The printk loglevels are all over the place, make them a bit more coherent, and add some registration notification while we're at it. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-04-13sh: intc: Provide sysdev name for intc controllers.Paul Mundt
Presently the sysdevs are simply numbered based on the list position, without having any direct way of figuring out which controller these are actually mapping to. This provides a name attr for mapping out the chip name. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-03-30include cleanup: Update gfp.h and slab.h includes to prepare for breaking ↵Tejun Heo
implicit slab.h inclusion from percpu.h percpu.h is included by sched.h and module.h and thus ends up being included when building most .c files. percpu.h includes slab.h which in turn includes gfp.h making everything defined by the two files universally available and complicating inclusion dependencies. percpu.h -> slab.h dependency is about to be removed. Prepare for this change by updating users of gfp and slab facilities include those headers directly instead of assuming availability. As this conversion needs to touch large number of source files, the following script is used as the basis of conversion. http://userweb.kernel.org/~tj/misc/slabh-sweep.py The script does the followings. * Scan files for gfp and slab usages and update includes such that only the necessary includes are there. ie. if only gfp is used, gfp.h, if slab is used, slab.h. * When the script inserts a new include, it looks at the include blocks and try to put the new include such that its order conforms to its surrounding. It's put in the include block which contains core kernel includes, in the same order that the rest are ordered - alphabetical, Christmas tree, rev-Xmas-tree or at the end if there doesn't seem to be any matching order. * If the script can't find a place to put a new include (mostly because the file doesn't have fitting include block), it prints out an error message indicating which .h file needs to be added to the file. The conversion was done in the following steps. 1. The initial automatic conversion of all .c files updated slightly over 4000 files, deleting around 700 includes and adding ~480 gfp.h and ~3000 slab.h inclusions. The script emitted errors for ~400 files. 2. Each error was manually checked. Some didn't need the inclusion, some needed manual addition while adding it to implementation .h or embedding .c file was more appropriate for others. This step added inclusions to around 150 files. 3. The script was run again and the output was compared to the edits from #2 to make sure no file was left behind. 4. Several build tests were done and a couple of problems were fixed. e.g. lib/decompress_*.c used malloc/free() wrappers around slab APIs requiring slab.h to be added manually. 5. The script was run on all .h files but without automatically editing them as sprinkling gfp.h and slab.h inclusions around .h files could easily lead to inclusion dependency hell. Most gfp.h inclusion directives were ignored as stuff from gfp.h was usually wildly available and often used in preprocessor macros. Each slab.h inclusion directive was examined and added manually as necessary. 6. percpu.h was updated not to include slab.h. 7. Build test were done on the following configurations and failures were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my distributed build env didn't work with gcov compiles) and a few more options had to be turned off depending on archs to make things build (like ipr on powerpc/64 which failed due to missing writeq). * x86 and x86_64 UP and SMP allmodconfig and a custom test config. * powerpc and powerpc64 SMP allmodconfig * sparc and sparc64 SMP allmodconfig * ia64 SMP allmodconfig * s390 SMP allmodconfig * alpha SMP allmodconfig * um on x86_64 SMP allmodconfig 8. percpu.h modifications were reverted so that it could be applied as a separate patch and serve as bisection point. Given the fact that I had only a couple of failures from tests on step 6, I'm fairly confident about the coverage of this conversion patch. If there is a breakage, it's likely to be something in one of the arch headers which should be easily discoverable easily on most builds of the specific arch. Signed-off-by: Tejun Heo <tj@kernel.org> Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
2010-03-30Merge branches 'sh/intc-extension', 'sh/dmaengine', 'sh/serial-dma' and ↵Paul Mundt
'sh/clkfwk' Conflicts: arch/sh/kernel/cpu/clock.c Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-03-19Merge git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6Linus Torvalds
* git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6: serial: sh-sci: remove duplicated #include sh: Export uncached helper symbols. sh: Fix up NUMA build for 29-bit. serial: sh-sci: Fix build failure for non-sh architectures. sh: Fix up uncached offset for legacy 29-bit mode. sh: Support CPU affinity masks for INTC controllers.
2010-03-19sh: INTC ioremap supportMagnus Damm
Extend the INTC code with ioremap() support V2. Support INTC controllers that are not accessible through a 1:1 virt:phys window. Needed by SH-Mobile ARM INTCS. The INTC code behaves as usual if the io window resource is omitted. The slow phys->virt lookup only happens during setup. The fast path code operates on virtual addresses. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-03-19sh: add INTC out of memory error handlingMagnus Damm
Extend the INTC code to warn and return an error code in the case of memory allocation failure. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-03-08Merge branch 'origin' into devel-stableRussell King
Conflicts: arch/arm/mach-mx2/devices.c arch/arm/mach-mx2/devices.h sound/soc/pxa/pxa-ssp.c
2010-03-08sh: Support CPU affinity masks for INTC controllers.Paul Mundt
This hooks up the ->set_affinity() for the INTC controllers, which can be done as just a simple copy of the cpumask. The enable/disable paths already handle SMP register strides, so we just test the affinity mask in these paths to determine which strides to skip over. The early enable/disable path happens prior to the IRQs being registered, so we have no affinity mask established at that point, in which case we just default to CPU_MASK_ALL. This is left as it is to permit the force enable/disable code to retain existing semantics. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-02-17sh: Use dummy_irq_chip for INTC redirect vectors.Paul Mundt
Presently there's an ordering issue with the chained handler change which places the set_irq_chip() after set_irq_chained_handler(). This causes a warning to be emitted as the IRQ chip needs to be set first. However, there is the caveat that redirect IRQs can't use the parent IRQ's irq chip as they are just dummy redirects, resulting in intc_enable() blowing up when set_irq_chained_handler() attempts to start up the redirect IRQ. In these cases we can just use dummy_irq_chip directly, as we already extract the parent IRQ and chip from the redirect handler. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-02-16sh: extend INTC with force_disableMagnus Damm
Extend the shared INTC code with force_disable support to allow keeping mask bits statically disabled. Needed for SDHI support to mask out unsupported interrupt sources. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-02-09sh: fix INTC to use set_irq_chained_handler() for redirectsMagnus Damm
This patch updates the shared INTC code to use set_irq_chained_handler() for intc_redirect_irq(). With this in place request_irq() on a merged irq which has been redirected will now return -EINVAL instead of 0 together with a crash. This thanks to the protection of the IRQ_NOREQUEST flag set for chained interrupt handlers. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-02-09Merge branch 'sh/intc-extension'Paul Mundt
2010-02-09sh: extend INTC with force_enableMagnus Damm
Extend the shared INTC code with force_enable support to allow keeping mask bits statically enabled. Needed by upcoming INTC SDHI patches that mux together a bunch of vectors to a single linux interrupt which is masked by a priority register, but needs individual mask bits constantly enabled. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-02-09sh: extend INTC with struct intc_hw_descMagnus Damm
This patch updates the INTC code by moving all vectors, groups and registers from struct intc_desc to struct intc_hw_desc. The idea is that INTC tables should go from using the macro(s) DECLARE_INTC_DESC..() only to using struct intc_desc with name and hw initialized using the macro INTC_HW_DESC(). This move makes it easy to initialize an extended struct intc_desc in the future. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-02-08sh: Let INTC set IRQF_VALID on ARM platforms.Magnus Damm
Reuse the SuperH INTC code on ARM by using set_irq_flags() to set IRQF_VALID on ARM platforms. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-02-02sh: Provide create_irq_nr() for dynamic IRQ creation by number.Paul Mundt
This just reworks the existing create_irq_on_node() in to the new create_irq_nr() which is generally exposed. This permits boards that haven't converted over to sparseirq to try and use their existing ranges, rather than having arbitrary vectors assigned to them. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-01-20sh: update PFC to allow any enum in MARK listsMagnus Damm
This patch updates the PFC code with some clarifying comments together with a functional change. The change allows function type of GPIO to select any type of enum in their MARK lists. Without this patch only function type of enums are allowed in MARK lists. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-12-09sh: pfc: Fixup type mismatch in debug printks.Paul Mundt
!!value works out to an int while we were still using %ld, so fix this up and shut gcc up. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-12-09sh: intc: Fixup compile breakage.Paul Mundt
The resume from hibernation patch introduced build failure, fix it up.. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-12-09sh: intc: Fixed resume from hibernationFrancesco VIRLINZI
This patch fixes the resume from hibernation in the intc sysdev device when it manages 'redirect' irq Signed-off-by: Francesco Virlinzi <francesco.virlinzi@st.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-11-30sh: pfc: pr_info() -> pr_debug() cleanups.Paul Mundt
For some reason this was using pr_info() nested under an ifdef DEBUG. While this is appealing in that it circumvents the effort necessary to change ones loglevel, it's not terribly practical. So, convert it over to pr_debug(). Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-11-30sh: pfc: Convert from ctrl_xxx() to __raw_xxx() I/O routines.Paul Mundt
Now that the PFC code is exposed for other architectures, use the common __raw_xxx() routines instead of the ctrl_xxx() ones. This will be needed for ARM-based SH-Mobiles amongst others. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-11-30sh: Break out SuperH PFC codeMagnus Damm
This file breaks out the SuperH PFC code from arch/sh/kernel/gpio.c + arch/sh/include/asm/gpio.h to drivers/sh/pfc.c + include/linux/sh_pfc.h. Similar to the INTC stuff. The non-SuperH specific file location makes it possible to share the code between multiple architectures. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-11-02sh: intc: Handle legacy IRQ reservation in vector map.Paul Mundt
Different CPUs will have different starting vectors, with varying amounts of reserved or unusable vector space prior to the first slot. This introduces a legacy vector reservation system that inserts itself in between the CPU vector map registration and the platform specific IRQ setup. This works fine in practice as the only new vectors that boards need to establish on their own should be dynamically allocated rather than arbitrarily assigned. As a plus, this also makes all of the converted platforms sparseirq ready. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-11-02sh: intc: dynamic IRQ support.Paul Mundt
This adds support for dynamic IRQ allocation/deallocation for all parts using the SH-style vectored IRQs. While this is not inherently INTC-specific, the INTC code is the main tie-in for vectored IRQ registration, and is the only place that a full view of the utilized vector map is possible. The implementation is fairly straightforward, implementing a flat IRQ map where each registered vector is reserved, allowing us to scan for holes and dynamically wire up IRQs lazily later on in the boot stage. This piggybacks on top of sparseirq in order to make the best use of the available vector space. Dynamic IRQs can be used for any number of things, ranging from MSI in the SH-X3 PCIe case down to demux vectors for board FPGAs and system controllers that presently allocate an arbitrary range. In the latter case, this also allows those platforms to use sparseirq without blowing up, which brings us one step closer to enabling sparseirq as the default for all platform and CPU combinations. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-10-27sh: intc: Make ack_regs generally available.Paul Mundt
Currently this is ifdef'ed under SH-3 and SH-4A, but there are other CPUs that will need this as well. Given the size of the existing data structures, this doesn't cause any additional cacheline utilization for the existing users, so has no direct impact on the data structures. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-10-13sh: maple: PHYSADDR() -> virt_to_phys() conversion.Paul Mundt
Maple's abuse of PHYSADDR() likewise can be converted to virt_to_phys() for its cases, although in practice this really wants explicit remapping. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-08-31sh: Fix up simplified multi-evt handling under sparseirq.Paul Mundt
This fixes up the simplified multi-evt handling when sparseirq support is enabled. While vectors are redirected through the single unique masking source, each one of the redirected vectors still requires its own backing irq_desc, which needs to be manually allocated in the sparseirq case. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-08-24sh: Simplify "multi-evt" interrupt handling.Pawel Moll
This patch changes the way in which "multi-evt" interrups are handled. The intc_evt2irq_table and related intc_evt2irq() have been removed and the "redirecting" handler is installed for the coupled interrupts. Thanks to that the do_IRQ() function don't have to use another level of indirection for all the interrupts... Signed-off-by: Pawel Moll <pawel.moll@st.com> Signed-off-by: Stuart Menefy <stuart.menefy@st.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-08-24sh: Fixes some write posting issues in the interrupt handling for SHStuart Menefy
It is possible for the CPU to re-enable it's interrupt block bit before the write to the interrupt controller has actually masked out the external interupt at the controller. We get around this by reading back from the interrupt controller which will ensure the write has happened. Signed-off-by: Stuart Menefy <stuart.menefy@st.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-06-12sh: intc: alloc_bootmem() -> kzalloc() conversion.Paul Mundt
Now that the slab allocators are available much earlier, this triggers a the slab_is_available() warning when registering the interrupt controller. Convert to kzalloc() with GFP_NOWAIT, as per the generic changes. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-06-11sh: Tie sparseirq in to Kconfig.Paul Mundt
Now that the dependent patches are merged, we are ready to enable sparseirq support. This simply adds the Kconfig option, and then converts from the _cpu to the _node allocation routines to follow the upstream sparseirq API changes. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-05-22sh: Wrap irq_to_desc_alloc_cpu() around CONFIG_SPARSE_IRQ temporarily.Paul Mundt
irq_to_desc_alloc_cpu() has been renamed to irq_to_desc_alloc_node() in -next, but as we can not presently enable SPARSE_IRQ without the early irq_desc alloc patch, protect it with an ifdef until the interface has settled and we are ready to enable it system-wide. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-05-22sh: irq: Teach ipr and intc about dynamically allocating irq_descs.Paul Mundt
This hooks in irq_to_desc_alloc_cpu() to the necessary code paths in the intc and ipr controller registration paths. As these are the primary call paths for all SH CPUs, this alone will make all CPUs sparse IRQ ready. There is the added benefit now that each CPU contains specific IPR and INTC tables, so only the vectors with interrupt sources backing them will ever see an irq_desc instantiation. This effectively packs irq_desc down to match the CPU, rather than padding NR_IRQS out to cover the valid vector range. Boards with extra sources will still have to fiddle with the nr_irqs setting, but they can continue doing so through the machvec as before. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-04-06sh: intc: Added resume from hibernation support to the intcFrancesco VIRLINZI
It's required for all modules loaded in the previous runtime session because not initilized duing the kernel start-up. Signed-off-by: Francesco Virlinzi <francesco.virlinzi@st.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-04-02sh: intc: set_irq_wake() supportMagnus Damm
Add set_irq_wake() support to intc using sysdev and suspend. The intc controllers are put on a list at registration time and registered as sysdev devices later on during the boot. The sysdev class suspend callback is used to find irqs with wakeup enabled belonging to our intc controller. Such irqs are simply enabled so wakeup interrupts may reach the cpu. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-04-02sh: intc: install enable, disable and shutdown callbacksMagnus Damm
Modify the intc code to install a disable callback. The current solution without a disable callback results in use of the generic default_disable() function. This function is a no-op so suspend_device_irqs() will not disable any intc interrupts at suspend time without this patch. Also, install enable and shutdown callbacks while at it. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-03-29maple: fix Error in kernel-doc notationRandy Dunlap
Fix kernel-doc error in maple (it's not kernel-doc): Error(drivers/sh/maple/maple.c:782): cannot understand prototype: 'struct bus_type maple_bus_type = ' Signed-off-by: Randy Dunlap <randy.dunlap@oracle.com> cc: Paul Mundt <lethal@linux-sh.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2009-03-26Merge git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core-2.6Linus Torvalds
* git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core-2.6: (61 commits) Dynamic debug: fix pr_fmt() build error Dynamic debug: allow simple quoting of words dynamic debug: update docs dynamic debug: combine dprintk and dynamic printk sysfs: fix some bin_vm_ops errors kobject: don't block for each kobject_uevent sysfs: only allow one scheduled removal callback per kobj Driver core: Fix device_move() vs. dpm list ordering, v2 Driver core: some cleanup on drivers/base/sys.c Driver core: implement uevent suppress in kobject vcs: hook sysfs devices into object lifetime instead of "binding" driver core: fix passing platform_data driver core: move platform_data into platform_device sysfs: don't block indefinitely for unmapped files. driver core: move knode_bus into private structure driver core: move knode_driver into private structure driver core: move klist_children into private structure driver core: create a private portion of struct device driver core: remove polling for driver_probe_done(v5) sysfs: reference sysfs_dirent from sysfs inodes ... Fixed conflicts in drivers/sh/maple/maple.c manually
2009-03-24sh: struct device - replace bus_id with dev_name(), dev_set_name()Kay Sievers
Acked-by: Greg Kroah-Hartman <gregkh@suse.de> Signed-off-by: Kay Sievers <kay.sievers@vrfy.org>
2009-03-06sh: intc: Make missing unique IRQ mask warning more verbose.Paul Mundt
This includes the IRQ number in addition to the vector, as not all platforms wrap in with INTC_VECT(). Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-03-03sh: struct device - replace bus_id with dev_name(), dev_set_name()Kay Sievers
Acked-by: Greg Kroah-Hartman <gregkh@suse.de> Signed-off-by: Kay Sievers <kay.sievers@vrfy.org> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-02-27sh: multiple vectors per irq - baseMagnus Damm
Instead of keeping the single vector -> single linux irq mapping we extend the intc code to support merging of vectors to a single linux irq. This helps processors such as sh7750, sh7780 and sh7785 which have more vectors than masking ability. With this patch in place we can modify the intc tables to use one irq per maskable irq source. Please note the following: - If multiple vectors share the same enum then only the first vector will be available as a linux irq. - Drivers may need to be rewritten to get pending irq source from the hardware block instead of irq number. This patch together with the sh7785 specific intc tables solves DMA controller irq issues related to buggy interrupt masking. Reported-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>