From 324ae6098c81213ab7de035dcd0cbabf29029b1f Mon Sep 17 00:00:00 2001 From: Daniel Lezcano Date: Mon, 19 Mar 2012 20:15:52 -0500 Subject: mfd : ux500 - fix redefined includes Signed-off-by: Daniel Lezcano --- drivers/mfd/db8500-prcmu.c | 17 +++++++---------- 1 file changed, 7 insertions(+), 10 deletions(-) diff --git a/drivers/mfd/db8500-prcmu.c b/drivers/mfd/db8500-prcmu.c index 9baf4cd7f07..9d2399284b1 100644 --- a/drivers/mfd/db8500-prcmu.c +++ b/drivers/mfd/db8500-prcmu.c @@ -787,23 +787,20 @@ int db8500_prcmu_set_power_state(u8 state, bool keep_ulp_clk, bool keep_ap_pll) return 0; } -#define PRCMU_A9_MASK_REQ 0x00000328 -#define PRCMU_A9_MASK_REQ_MASK 0x00000001 -#define PRCMU_GIC_DELAY 1 - /* This function decouple the gic from the prcmu */ int db8500_prcmu_gic_decouple(void) { - u32 val = readl(_PRCMU_BASE + PRCMU_A9_MASK_REQ); + u32 val = readl(PRCM_A9_MASK_REQ); /* Set bit 0 register value to 1 */ - writel(val | PRCMU_A9_MASK_REQ_MASK, _PRCMU_BASE + PRCMU_A9_MASK_REQ); + writel(val | PRCM_A9_MASK_REQ_PRCM_A9_MASK_REQ, + PRCM_A9_MASK_REQ); /* Make sure the register is updated */ - readl(_PRCMU_BASE + PRCMU_A9_MASK_REQ); + readl(PRCM_A9_MASK_REQ); /* Wait a few cycles for the gic mask completion */ - udelay(PRCMU_GIC_DELAY); + udelay(1); return 0; } @@ -811,10 +808,10 @@ int db8500_prcmu_gic_decouple(void) /* This function recouple the gic with the prcmu */ int db8500_prcmu_gic_recouple(void) { - u32 val = readl(_PRCMU_BASE + PRCMU_A9_MASK_REQ); + u32 val = readl(PRCM_A9_MASK_REQ); /* Set bit 0 register value to 0 */ - writel(val & ~PRCMU_A9_MASK_REQ_MASK, _PRCMU_BASE + PRCMU_A9_MASK_REQ); + writel(val & ~PRCM_A9_MASK_REQ_PRCM_A9_MASK_REQ, PRCM_A9_MASK_REQ); return 0; } -- cgit v1.2.3