From 963c34b2653005804739c81cde97001a561655e2 Mon Sep 17 00:00:00 2001 From: Colin Cross Date: Wed, 14 Sep 2011 15:59:50 -0700 Subject: ARM: cache-l2x0: update workaround for PL310 errata 727915 ARM errata 727915 for PL310 has been updated to include a new workaround required for PL310 r2p0 for l2x0_flush_all, which also affects l2x0_clean_all in my testing. For r2p0, clean or flush each set/way individually. For r3p0 or greater, use the debug register for cleaning and flushing. Requires exporting the cache_id, sets and ways detected in the init function for later use. Change-Id: I215055cbe5dc7e4e8184fb2befc4aff672ef0a12 Signed-off-by: Colin Cross --- arch/arm/include/asm/hardware/cache-l2x0.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'arch/arm/include/asm/hardware/cache-l2x0.h') diff --git a/arch/arm/include/asm/hardware/cache-l2x0.h b/arch/arm/include/asm/hardware/cache-l2x0.h index 7df239bcdf2..5e69437e63e 100644 --- a/arch/arm/include/asm/hardware/cache-l2x0.h +++ b/arch/arm/include/asm/hardware/cache-l2x0.h @@ -66,6 +66,7 @@ #define L2X0_STNDBY_MODE_EN (1 << 0) /* Registers shifts and masks */ +#define L2X0_CACHE_ID_REV_MASK (0x3f) #define L2X0_CACHE_ID_PART_MASK (0xf << 6) #define L2X0_CACHE_ID_PART_L210 (1 << 6) #define L2X0_CACHE_ID_PART_L310 (3 << 6) @@ -102,6 +103,8 @@ #define L2X0_ADDR_FILTER_EN 1 +#define REV_PL310_R2P0 4 + #ifndef __ASSEMBLY__ extern void __init l2x0_init(void __iomem *base, __u32 aux_val, __u32 aux_mask); #if defined(CONFIG_CACHE_L2X0) && defined(CONFIG_OF) -- cgit v1.2.3