From 0210dc4eafcfd1b38ac178ebf63627f359d6371d Mon Sep 17 00:00:00 2001 From: Peter Ujfalusi Date: Thu, 26 Jan 2012 12:38:31 +0200 Subject: ARM: OMAP: mcbsp: Convert core driver to proper platform driver Convert the plat-omap/mcbsp.c driver to be proper platform driver. Remove the omap_mcbsp_init function call which was called from mach-omap1/2/mcbsp.c to register the platform driver for the just created platform device in the same function. Signed-off-by: Peter Ujfalusi Acked-by: Tony Lindgren Tested-by: Grazvydas Ignotas Tested-by: Janusz Krzysztofik Acked-by: Jarkko Nikula Signed-off-by: Liam Girdwood --- arch/arm/plat-omap/include/plat/mcbsp.h | 1 - arch/arm/plat-omap/mcbsp.c | 11 ++++++----- 2 files changed, 6 insertions(+), 6 deletions(-) (limited to 'arch/arm/plat-omap') diff --git a/arch/arm/plat-omap/include/plat/mcbsp.h b/arch/arm/plat-omap/include/plat/mcbsp.h index 8fa74e2c9d6..7e4f893c271 100644 --- a/arch/arm/plat-omap/include/plat/mcbsp.h +++ b/arch/arm/plat-omap/include/plat/mcbsp.h @@ -360,7 +360,6 @@ struct omap_mcbsp_dev_attr { extern struct omap_mcbsp **mcbsp_ptr; extern int omap_mcbsp_count; -int omap_mcbsp_init(void); void omap_mcbsp_config(unsigned int id, const struct omap_mcbsp_reg_cfg * config); void omap_mcbsp_set_tx_threshold(unsigned int id, u16 threshold); void omap_mcbsp_set_rx_threshold(unsigned int id, u16 threshold); diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c index 4b15cd7926d..3c704f36e0f 100644 --- a/arch/arm/plat-omap/mcbsp.c +++ b/arch/arm/plat-omap/mcbsp.c @@ -1354,8 +1354,9 @@ static struct platform_driver omap_mcbsp_driver = { }, }; -int __init omap_mcbsp_init(void) -{ - /* Register the McBSP driver */ - return platform_driver_register(&omap_mcbsp_driver); -} +module_platform_driver(omap_mcbsp_driver); + +MODULE_AUTHOR("Samuel Ortiz "); +MODULE_DESCRIPTION("OMAP McBSP core driver"); +MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform:omap-mcbsp"); -- cgit v1.2.3 From 71e822e9dcd80923813705e5843eb39e065e8250 Mon Sep 17 00:00:00 2001 From: Peter Ujfalusi Date: Thu, 26 Jan 2012 12:47:22 +0200 Subject: OMAP: mcbsp: Move core driver under sound/soc/omap In order to consolidate the McBSP driver move it out from arch/arm/plat-omap directory under sound/soc/omap/ Signed-off-by: Peter Ujfalusi Acked-by: Tony Lindgren Tested-by: Grazvydas Ignotas Tested-by: Janusz Krzysztofik Acked-by: Jarkko Nikula Signed-off-by: Liam Girdwood --- arch/arm/plat-omap/Kconfig | 8 - arch/arm/plat-omap/Makefile | 2 - arch/arm/plat-omap/mcbsp.c | 1362 ------------------------------------------ sound/soc/omap/Kconfig | 4 + sound/soc/omap/Makefile | 1 + sound/soc/omap/mcbsp.c | 1364 +++++++++++++++++++++++++++++++++++++++++++ 6 files changed, 1369 insertions(+), 1372 deletions(-) delete mode 100644 arch/arm/plat-omap/mcbsp.c create mode 100644 sound/soc/omap/mcbsp.c (limited to 'arch/arm/plat-omap') diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig index aa59f4247dc..8f81503a4df 100644 --- a/arch/arm/plat-omap/Kconfig +++ b/arch/arm/plat-omap/Kconfig @@ -110,14 +110,6 @@ config OMAP_MUX_WARNINGS to change the pin multiplexing setup. When there are no warnings printed, it's safe to deselect OMAP_MUX for your product. -config OMAP_MCBSP - bool "McBSP support" - depends on ARCH_OMAP - default y - help - Say Y here if you want support for the OMAP Multichannel - Buffered Serial Port. - config OMAP_MBOX_FWK tristate "Mailbox framework support" depends on ARCH_OMAP diff --git a/arch/arm/plat-omap/Makefile b/arch/arm/plat-omap/Makefile index 9a584614e7e..c0fe2757b69 100644 --- a/arch/arm/plat-omap/Makefile +++ b/arch/arm/plat-omap/Makefile @@ -17,8 +17,6 @@ obj-$(CONFIG_ARCH_OMAP2) += omap_device.o obj-$(CONFIG_ARCH_OMAP3) += omap_device.o obj-$(CONFIG_ARCH_OMAP4) += omap_device.o -obj-$(CONFIG_OMAP_MCBSP) += mcbsp.o - obj-$(CONFIG_OMAP_DM_TIMER) += dmtimer.o obj-$(CONFIG_OMAP_DEBUG_DEVICES) += debug-devices.o obj-$(CONFIG_OMAP_DEBUG_LEDS) += debug-leds.o diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c deleted file mode 100644 index 3c704f36e0f..00000000000 --- a/arch/arm/plat-omap/mcbsp.c +++ /dev/null @@ -1,1362 +0,0 @@ -/* - * linux/arch/arm/plat-omap/mcbsp.c - * - * Copyright (C) 2004 Nokia Corporation - * Author: Samuel Ortiz - * - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * Multichannel mode not supported. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -struct omap_mcbsp **mcbsp_ptr; -int omap_mcbsp_count; - -#define omap_mcbsp_check_valid_id(id) (id < omap_mcbsp_count) -#define id_to_mcbsp_ptr(id) mcbsp_ptr[id]; - -static void omap_mcbsp_write(struct omap_mcbsp *mcbsp, u16 reg, u32 val) -{ - void __iomem *addr = mcbsp->io_base + reg * mcbsp->pdata->reg_step; - - if (mcbsp->pdata->reg_size == 2) { - ((u16 *)mcbsp->reg_cache)[reg] = (u16)val; - __raw_writew((u16)val, addr); - } else { - ((u32 *)mcbsp->reg_cache)[reg] = val; - __raw_writel(val, addr); - } -} - -static int omap_mcbsp_read(struct omap_mcbsp *mcbsp, u16 reg, bool from_cache) -{ - void __iomem *addr = mcbsp->io_base + reg * mcbsp->pdata->reg_step; - - if (mcbsp->pdata->reg_size == 2) { - return !from_cache ? __raw_readw(addr) : - ((u16 *)mcbsp->reg_cache)[reg]; - } else { - return !from_cache ? __raw_readl(addr) : - ((u32 *)mcbsp->reg_cache)[reg]; - } -} - -static void omap_mcbsp_st_write(struct omap_mcbsp *mcbsp, u16 reg, u32 val) -{ - __raw_writel(val, mcbsp->st_data->io_base_st + reg); -} - -static int omap_mcbsp_st_read(struct omap_mcbsp *mcbsp, u16 reg) -{ - return __raw_readl(mcbsp->st_data->io_base_st + reg); -} - -#define MCBSP_READ(mcbsp, reg) \ - omap_mcbsp_read(mcbsp, OMAP_MCBSP_REG_##reg, 0) -#define MCBSP_WRITE(mcbsp, reg, val) \ - omap_mcbsp_write(mcbsp, OMAP_MCBSP_REG_##reg, val) -#define MCBSP_READ_CACHE(mcbsp, reg) \ - omap_mcbsp_read(mcbsp, OMAP_MCBSP_REG_##reg, 1) - -#define MCBSP_ST_READ(mcbsp, reg) \ - omap_mcbsp_st_read(mcbsp, OMAP_ST_REG_##reg) -#define MCBSP_ST_WRITE(mcbsp, reg, val) \ - omap_mcbsp_st_write(mcbsp, OMAP_ST_REG_##reg, val) - -static void omap_mcbsp_dump_reg(u8 id) -{ - struct omap_mcbsp *mcbsp = id_to_mcbsp_ptr(id); - - dev_dbg(mcbsp->dev, "**** McBSP%d regs ****\n", mcbsp->id); - dev_dbg(mcbsp->dev, "DRR2: 0x%04x\n", - MCBSP_READ(mcbsp, DRR2)); - dev_dbg(mcbsp->dev, "DRR1: 0x%04x\n", - MCBSP_READ(mcbsp, DRR1)); - dev_dbg(mcbsp->dev, "DXR2: 0x%04x\n", - MCBSP_READ(mcbsp, DXR2)); - dev_dbg(mcbsp->dev, "DXR1: 0x%04x\n", - MCBSP_READ(mcbsp, DXR1)); - dev_dbg(mcbsp->dev, "SPCR2: 0x%04x\n", - MCBSP_READ(mcbsp, SPCR2)); - dev_dbg(mcbsp->dev, "SPCR1: 0x%04x\n", - MCBSP_READ(mcbsp, SPCR1)); - dev_dbg(mcbsp->dev, "RCR2: 0x%04x\n", - MCBSP_READ(mcbsp, RCR2)); - dev_dbg(mcbsp->dev, "RCR1: 0x%04x\n", - MCBSP_READ(mcbsp, RCR1)); - dev_dbg(mcbsp->dev, "XCR2: 0x%04x\n", - MCBSP_READ(mcbsp, XCR2)); - dev_dbg(mcbsp->dev, "XCR1: 0x%04x\n", - MCBSP_READ(mcbsp, XCR1)); - dev_dbg(mcbsp->dev, "SRGR2: 0x%04x\n", - MCBSP_READ(mcbsp, SRGR2)); - dev_dbg(mcbsp->dev, "SRGR1: 0x%04x\n", - MCBSP_READ(mcbsp, SRGR1)); - dev_dbg(mcbsp->dev, "PCR0: 0x%04x\n", - MCBSP_READ(mcbsp, PCR0)); - dev_dbg(mcbsp->dev, "***********************\n"); -} - -static irqreturn_t omap_mcbsp_tx_irq_handler(int irq, void *dev_id) -{ - struct omap_mcbsp *mcbsp_tx = dev_id; - u16 irqst_spcr2; - - irqst_spcr2 = MCBSP_READ(mcbsp_tx, SPCR2); - dev_dbg(mcbsp_tx->dev, "TX IRQ callback : 0x%x\n", irqst_spcr2); - - if (irqst_spcr2 & XSYNC_ERR) { - dev_err(mcbsp_tx->dev, "TX Frame Sync Error! : 0x%x\n", - irqst_spcr2); - /* Writing zero to XSYNC_ERR clears the IRQ */ - MCBSP_WRITE(mcbsp_tx, SPCR2, MCBSP_READ_CACHE(mcbsp_tx, SPCR2)); - } - - return IRQ_HANDLED; -} - -static irqreturn_t omap_mcbsp_rx_irq_handler(int irq, void *dev_id) -{ - struct omap_mcbsp *mcbsp_rx = dev_id; - u16 irqst_spcr1; - - irqst_spcr1 = MCBSP_READ(mcbsp_rx, SPCR1); - dev_dbg(mcbsp_rx->dev, "RX IRQ callback : 0x%x\n", irqst_spcr1); - - if (irqst_spcr1 & RSYNC_ERR) { - dev_err(mcbsp_rx->dev, "RX Frame Sync Error! : 0x%x\n", - irqst_spcr1); - /* Writing zero to RSYNC_ERR clears the IRQ */ - MCBSP_WRITE(mcbsp_rx, SPCR1, MCBSP_READ_CACHE(mcbsp_rx, SPCR1)); - } - - return IRQ_HANDLED; -} - -/* - * omap_mcbsp_config simply write a config to the - * appropriate McBSP. - * You either call this function or set the McBSP registers - * by yourself before calling omap_mcbsp_start(). - */ -void omap_mcbsp_config(unsigned int id, const struct omap_mcbsp_reg_cfg *config) -{ - struct omap_mcbsp *mcbsp; - - if (!omap_mcbsp_check_valid_id(id)) { - printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); - return; - } - mcbsp = id_to_mcbsp_ptr(id); - - dev_dbg(mcbsp->dev, "Configuring McBSP%d phys_base: 0x%08lx\n", - mcbsp->id, mcbsp->phys_base); - - /* We write the given config */ - MCBSP_WRITE(mcbsp, SPCR2, config->spcr2); - MCBSP_WRITE(mcbsp, SPCR1, config->spcr1); - MCBSP_WRITE(mcbsp, RCR2, config->rcr2); - MCBSP_WRITE(mcbsp, RCR1, config->rcr1); - MCBSP_WRITE(mcbsp, XCR2, config->xcr2); - MCBSP_WRITE(mcbsp, XCR1, config->xcr1); - MCBSP_WRITE(mcbsp, SRGR2, config->srgr2); - MCBSP_WRITE(mcbsp, SRGR1, config->srgr1); - MCBSP_WRITE(mcbsp, MCR2, config->mcr2); - MCBSP_WRITE(mcbsp, MCR1, config->mcr1); - MCBSP_WRITE(mcbsp, PCR0, config->pcr0); - if (mcbsp->pdata->has_ccr) { - MCBSP_WRITE(mcbsp, XCCR, config->xccr); - MCBSP_WRITE(mcbsp, RCCR, config->rccr); - } -} -EXPORT_SYMBOL(omap_mcbsp_config); - -/** - * omap_mcbsp_dma_params - returns the dma channel number - * @id - mcbsp id - * @stream - indicates the direction of data flow (rx or tx) - * - * Returns the dma channel number for the rx channel or tx channel - * based on the value of @stream for the requested mcbsp given by @id - */ -int omap_mcbsp_dma_ch_params(unsigned int id, unsigned int stream) -{ - struct omap_mcbsp *mcbsp; - - if (!omap_mcbsp_check_valid_id(id)) { - printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); - return -ENODEV; - } - mcbsp = id_to_mcbsp_ptr(id); - - if (stream) - return mcbsp->dma_rx_sync; - else - return mcbsp->dma_tx_sync; -} -EXPORT_SYMBOL(omap_mcbsp_dma_ch_params); - -/** - * omap_mcbsp_dma_reg_params - returns the address of mcbsp data register - * @id - mcbsp id - * @stream - indicates the direction of data flow (rx or tx) - * - * Returns the address of mcbsp data transmit register or data receive register - * to be used by DMA for transferring/receiving data based on the value of - * @stream for the requested mcbsp given by @id - */ -int omap_mcbsp_dma_reg_params(unsigned int id, unsigned int stream) -{ - struct omap_mcbsp *mcbsp; - int data_reg; - - if (!omap_mcbsp_check_valid_id(id)) { - printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); - return -ENODEV; - } - mcbsp = id_to_mcbsp_ptr(id); - - if (mcbsp->pdata->reg_size == 2) { - if (stream) - data_reg = OMAP_MCBSP_REG_DRR1; - else - data_reg = OMAP_MCBSP_REG_DXR1; - } else { - if (stream) - data_reg = OMAP_MCBSP_REG_DRR; - else - data_reg = OMAP_MCBSP_REG_DXR; - } - - return mcbsp->phys_dma_base + data_reg * mcbsp->pdata->reg_step; -} -EXPORT_SYMBOL(omap_mcbsp_dma_reg_params); - -static void omap_st_on(struct omap_mcbsp *mcbsp) -{ - unsigned int w; - - if (mcbsp->pdata->enable_st_clock) - mcbsp->pdata->enable_st_clock(mcbsp->id, 1); - - /* Enable McBSP Sidetone */ - w = MCBSP_READ(mcbsp, SSELCR); - MCBSP_WRITE(mcbsp, SSELCR, w | SIDETONEEN); - - /* Enable Sidetone from Sidetone Core */ - w = MCBSP_ST_READ(mcbsp, SSELCR); - MCBSP_ST_WRITE(mcbsp, SSELCR, w | ST_SIDETONEEN); -} - -static void omap_st_off(struct omap_mcbsp *mcbsp) -{ - unsigned int w; - - w = MCBSP_ST_READ(mcbsp, SSELCR); - MCBSP_ST_WRITE(mcbsp, SSELCR, w & ~(ST_SIDETONEEN)); - - w = MCBSP_READ(mcbsp, SSELCR); - MCBSP_WRITE(mcbsp, SSELCR, w & ~(SIDETONEEN)); - - if (mcbsp->pdata->enable_st_clock) - mcbsp->pdata->enable_st_clock(mcbsp->id, 0); -} - -static void omap_st_fir_write(struct omap_mcbsp *mcbsp, s16 *fir) -{ - u16 val, i; - - val = MCBSP_ST_READ(mcbsp, SSELCR); - - if (val & ST_COEFFWREN) - MCBSP_ST_WRITE(mcbsp, SSELCR, val & ~(ST_COEFFWREN)); - - MCBSP_ST_WRITE(mcbsp, SSELCR, val | ST_COEFFWREN); - - for (i = 0; i < 128; i++) - MCBSP_ST_WRITE(mcbsp, SFIRCR, fir[i]); - - i = 0; - - val = MCBSP_ST_READ(mcbsp, SSELCR); - while (!(val & ST_COEFFWRDONE) && (++i < 1000)) - val = MCBSP_ST_READ(mcbsp, SSELCR); - - MCBSP_ST_WRITE(mcbsp, SSELCR, val & ~(ST_COEFFWREN)); - - if (i == 1000) - dev_err(mcbsp->dev, "McBSP FIR load error!\n"); -} - -static void omap_st_chgain(struct omap_mcbsp *mcbsp) -{ - u16 w; - struct omap_mcbsp_st_data *st_data = mcbsp->st_data; - - w = MCBSP_ST_READ(mcbsp, SSELCR); - - MCBSP_ST_WRITE(mcbsp, SGAINCR, ST_CH0GAIN(st_data->ch0gain) | \ - ST_CH1GAIN(st_data->ch1gain)); -} - -int omap_st_set_chgain(unsigned int id, int channel, s16 chgain) -{ - struct omap_mcbsp *mcbsp; - struct omap_mcbsp_st_data *st_data; - int ret = 0; - - if (!omap_mcbsp_check_valid_id(id)) { - printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); - return -ENODEV; - } - - mcbsp = id_to_mcbsp_ptr(id); - st_data = mcbsp->st_data; - - if (!st_data) - return -ENOENT; - - spin_lock_irq(&mcbsp->lock); - if (channel == 0) - st_data->ch0gain = chgain; - else if (channel == 1) - st_data->ch1gain = chgain; - else - ret = -EINVAL; - - if (st_data->enabled) - omap_st_chgain(mcbsp); - spin_unlock_irq(&mcbsp->lock); - - return ret; -} -EXPORT_SYMBOL(omap_st_set_chgain); - -int omap_st_get_chgain(unsigned int id, int channel, s16 *chgain) -{ - struct omap_mcbsp *mcbsp; - struct omap_mcbsp_st_data *st_data; - int ret = 0; - - if (!omap_mcbsp_check_valid_id(id)) { - printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); - return -ENODEV; - } - - mcbsp = id_to_mcbsp_ptr(id); - st_data = mcbsp->st_data; - - if (!st_data) - return -ENOENT; - - spin_lock_irq(&mcbsp->lock); - if (channel == 0) - *chgain = st_data->ch0gain; - else if (channel == 1) - *chgain = st_data->ch1gain; - else - ret = -EINVAL; - spin_unlock_irq(&mcbsp->lock); - - return ret; -} -EXPORT_SYMBOL(omap_st_get_chgain); - -static int omap_st_start(struct omap_mcbsp *mcbsp) -{ - struct omap_mcbsp_st_data *st_data = mcbsp->st_data; - - if (st_data && st_data->enabled && !st_data->running) { - omap_st_fir_write(mcbsp, st_data->taps); - omap_st_chgain(mcbsp); - - if (!mcbsp->free) { - omap_st_on(mcbsp); - st_data->running = 1; - } - } - - return 0; -} - -int omap_st_enable(unsigned int id) -{ - struct omap_mcbsp *mcbsp; - struct omap_mcbsp_st_data *st_data; - - if (!omap_mcbsp_check_valid_id(id)) { - printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); - return -ENODEV; - } - - mcbsp = id_to_mcbsp_ptr(id); - st_data = mcbsp->st_data; - - if (!st_data) - return -ENODEV; - - spin_lock_irq(&mcbsp->lock); - st_data->enabled = 1; - omap_st_start(mcbsp); - spin_unlock_irq(&mcbsp->lock); - - return 0; -} -EXPORT_SYMBOL(omap_st_enable); - -static int omap_st_stop(struct omap_mcbsp *mcbsp) -{ - struct omap_mcbsp_st_data *st_data = mcbsp->st_data; - - if (st_data && st_data->running) { - if (!mcbsp->free) { - omap_st_off(mcbsp); - st_data->running = 0; - } - } - - return 0; -} - -int omap_st_disable(unsigned int id) -{ - struct omap_mcbsp *mcbsp; - struct omap_mcbsp_st_data *st_data; - int ret = 0; - - if (!omap_mcbsp_check_valid_id(id)) { - printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); - return -ENODEV; - } - - mcbsp = id_to_mcbsp_ptr(id); - st_data = mcbsp->st_data; - - if (!st_data) - return -ENODEV; - - spin_lock_irq(&mcbsp->lock); - omap_st_stop(mcbsp); - st_data->enabled = 0; - spin_unlock_irq(&mcbsp->lock); - - return ret; -} -EXPORT_SYMBOL(omap_st_disable); - -int omap_st_is_enabled(unsigned int id) -{ - struct omap_mcbsp *mcbsp; - struct omap_mcbsp_st_data *st_data; - - if (!omap_mcbsp_check_valid_id(id)) { - printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); - return -ENODEV; - } - - mcbsp = id_to_mcbsp_ptr(id); - st_data = mcbsp->st_data; - - if (!st_data) - return -ENODEV; - - - return st_data->enabled; -} -EXPORT_SYMBOL(omap_st_is_enabled); - -/* - * omap_mcbsp_set_rx_threshold configures the transmit threshold in words. - * The threshold parameter is 1 based, and it is converted (threshold - 1) - * for the THRSH2 register. - */ -void omap_mcbsp_set_tx_threshold(unsigned int id, u16 threshold) -{ - struct omap_mcbsp *mcbsp; - - if (!omap_mcbsp_check_valid_id(id)) { - printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); - return; - } - mcbsp = id_to_mcbsp_ptr(id); - if (mcbsp->pdata->buffer_size == 0) - return; - - if (threshold && threshold <= mcbsp->max_tx_thres) - MCBSP_WRITE(mcbsp, THRSH2, threshold - 1); -} -EXPORT_SYMBOL(omap_mcbsp_set_tx_threshold); - -/* - * omap_mcbsp_set_rx_threshold configures the receive threshold in words. - * The threshold parameter is 1 based, and it is converted (threshold - 1) - * for the THRSH1 register. - */ -void omap_mcbsp_set_rx_threshold(unsigned int id, u16 threshold) -{ - struct omap_mcbsp *mcbsp; - - if (!omap_mcbsp_check_valid_id(id)) { - printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); - return; - } - mcbsp = id_to_mcbsp_ptr(id); - if (mcbsp->pdata->buffer_size == 0) - return; - - if (threshold && threshold <= mcbsp->max_rx_thres) - MCBSP_WRITE(mcbsp, THRSH1, threshold - 1); -} -EXPORT_SYMBOL(omap_mcbsp_set_rx_threshold); - -/* - * omap_mcbsp_get_max_tx_thres just return the current configured - * maximum threshold for transmission - */ -u16 omap_mcbsp_get_max_tx_threshold(unsigned int id) -{ - struct omap_mcbsp *mcbsp; - - if (!omap_mcbsp_check_valid_id(id)) { - printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); - return -ENODEV; - } - mcbsp = id_to_mcbsp_ptr(id); - - return mcbsp->max_tx_thres; -} -EXPORT_SYMBOL(omap_mcbsp_get_max_tx_threshold); - -/* - * omap_mcbsp_get_max_rx_thres just return the current configured - * maximum threshold for reception - */ -u16 omap_mcbsp_get_max_rx_threshold(unsigned int id) -{ - struct omap_mcbsp *mcbsp; - - if (!omap_mcbsp_check_valid_id(id)) { - printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); - return -ENODEV; - } - mcbsp = id_to_mcbsp_ptr(id); - - return mcbsp->max_rx_thres; -} -EXPORT_SYMBOL(omap_mcbsp_get_max_rx_threshold); - -u16 omap_mcbsp_get_fifo_size(unsigned int id) -{ - struct omap_mcbsp *mcbsp; - - if (!omap_mcbsp_check_valid_id(id)) { - printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); - return -ENODEV; - } - mcbsp = id_to_mcbsp_ptr(id); - - return mcbsp->pdata->buffer_size; -} -EXPORT_SYMBOL(omap_mcbsp_get_fifo_size); - -/* - * omap_mcbsp_get_tx_delay returns the number of used slots in the McBSP FIFO - */ -u16 omap_mcbsp_get_tx_delay(unsigned int id) -{ - struct omap_mcbsp *mcbsp; - u16 buffstat; - - if (!omap_mcbsp_check_valid_id(id)) { - printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); - return -ENODEV; - } - mcbsp = id_to_mcbsp_ptr(id); - if (mcbsp->pdata->buffer_size == 0) - return 0; - - /* Returns the number of free locations in the buffer */ - buffstat = MCBSP_READ(mcbsp, XBUFFSTAT); - - /* Number of slots are different in McBSP ports */ - return mcbsp->pdata->buffer_size - buffstat; -} -EXPORT_SYMBOL(omap_mcbsp_get_tx_delay); - -/* - * omap_mcbsp_get_rx_delay returns the number of free slots in the McBSP FIFO - * to reach the threshold value (when the DMA will be triggered to read it) - */ -u16 omap_mcbsp_get_rx_delay(unsigned int id) -{ - struct omap_mcbsp *mcbsp; - u16 buffstat, threshold; - - if (!omap_mcbsp_check_valid_id(id)) { - printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); - return -ENODEV; - } - mcbsp = id_to_mcbsp_ptr(id); - if (mcbsp->pdata->buffer_size == 0) - return 0; - - /* Returns the number of used locations in the buffer */ - buffstat = MCBSP_READ(mcbsp, RBUFFSTAT); - /* RX threshold */ - threshold = MCBSP_READ(mcbsp, THRSH1); - - /* Return the number of location till we reach the threshold limit */ - if (threshold <= buffstat) - return 0; - else - return threshold - buffstat; -} -EXPORT_SYMBOL(omap_mcbsp_get_rx_delay); - -/* - * omap_mcbsp_get_dma_op_mode just return the current configured - * operating mode for the mcbsp channel - */ -int omap_mcbsp_get_dma_op_mode(unsigned int id) -{ - struct omap_mcbsp *mcbsp; - int dma_op_mode; - - if (!omap_mcbsp_check_valid_id(id)) { - printk(KERN_ERR "%s: Invalid id (%u)\n", __func__, id + 1); - return -ENODEV; - } - mcbsp = id_to_mcbsp_ptr(id); - - dma_op_mode = mcbsp->dma_op_mode; - - return dma_op_mode; -} -EXPORT_SYMBOL(omap_mcbsp_get_dma_op_mode); - -int omap_mcbsp_request(unsigned int id) -{ - struct omap_mcbsp *mcbsp; - void *reg_cache; - int err; - - if (!omap_mcbsp_check_valid_id(id)) { - printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); - return -ENODEV; - } - mcbsp = id_to_mcbsp_ptr(id); - - reg_cache = kzalloc(mcbsp->reg_cache_size, GFP_KERNEL); - if (!reg_cache) { - return -ENOMEM; - } - - spin_lock(&mcbsp->lock); - if (!mcbsp->free) { - dev_err(mcbsp->dev, "McBSP%d is currently in use\n", - mcbsp->id); - err = -EBUSY; - goto err_kfree; - } - - mcbsp->free = false; - mcbsp->reg_cache = reg_cache; - spin_unlock(&mcbsp->lock); - - if (mcbsp->pdata && mcbsp->pdata->ops && mcbsp->pdata->ops->request) - mcbsp->pdata->ops->request(id); - - pm_runtime_get_sync(mcbsp->dev); - - /* Enable wakeup behavior */ - if (mcbsp->pdata->has_wakeup) - MCBSP_WRITE(mcbsp, WAKEUPEN, XRDYEN | RRDYEN); - - /* - * Make sure that transmitter, receiver and sample-rate generator are - * not running before activating IRQs. - */ - MCBSP_WRITE(mcbsp, SPCR1, 0); - MCBSP_WRITE(mcbsp, SPCR2, 0); - - err = request_irq(mcbsp->tx_irq, omap_mcbsp_tx_irq_handler, - 0, "McBSP", (void *)mcbsp); - if (err != 0) { - dev_err(mcbsp->dev, "Unable to request TX IRQ %d " - "for McBSP%d\n", mcbsp->tx_irq, - mcbsp->id); - goto err_clk_disable; - } - - if (mcbsp->rx_irq) { - err = request_irq(mcbsp->rx_irq, - omap_mcbsp_rx_irq_handler, - 0, "McBSP", (void *)mcbsp); - if (err != 0) { - dev_err(mcbsp->dev, "Unable to request RX IRQ %d " - "for McBSP%d\n", mcbsp->rx_irq, - mcbsp->id); - goto err_free_irq; - } - } - - return 0; -err_free_irq: - free_irq(mcbsp->tx_irq, (void *)mcbsp); -err_clk_disable: - if (mcbsp->pdata && mcbsp->pdata->ops && mcbsp->pdata->ops->free) - mcbsp->pdata->ops->free(id); - - /* Disable wakeup behavior */ - if (mcbsp->pdata->has_wakeup) - MCBSP_WRITE(mcbsp, WAKEUPEN, 0); - - pm_runtime_put_sync(mcbsp->dev); - - spin_lock(&mcbsp->lock); - mcbsp->free = true; - mcbsp->reg_cache = NULL; -err_kfree: - spin_unlock(&mcbsp->lock); - kfree(reg_cache); - - return err; -} -EXPORT_SYMBOL(omap_mcbsp_request); - -void omap_mcbsp_free(unsigned int id) -{ - struct omap_mcbsp *mcbsp; - void *reg_cache; - - if (!omap_mcbsp_check_valid_id(id)) { - printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); - return; - } - mcbsp = id_to_mcbsp_ptr(id); - - if (mcbsp->pdata && mcbsp->pdata->ops && mcbsp->pdata->ops->free) - mcbsp->pdata->ops->free(id); - - /* Disable wakeup behavior */ - if (mcbsp->pdata->has_wakeup) - MCBSP_WRITE(mcbsp, WAKEUPEN, 0); - - pm_runtime_put_sync(mcbsp->dev); - - if (mcbsp->rx_irq) - free_irq(mcbsp->rx_irq, (void *)mcbsp); - free_irq(mcbsp->tx_irq, (void *)mcbsp); - - reg_cache = mcbsp->reg_cache; - - spin_lock(&mcbsp->lock); - if (mcbsp->free) - dev_err(mcbsp->dev, "McBSP%d was not reserved\n", mcbsp->id); - else - mcbsp->free = true; - mcbsp->reg_cache = NULL; - spin_unlock(&mcbsp->lock); - - if (reg_cache) - kfree(reg_cache); -} -EXPORT_SYMBOL(omap_mcbsp_free); - -/* - * Here we start the McBSP, by enabling transmitter, receiver or both. - * If no transmitter or receiver is active prior calling, then sample-rate - * generator and frame sync are started. - */ -void omap_mcbsp_start(unsigned int id, int tx, int rx) -{ - struct omap_mcbsp *mcbsp; - int enable_srg = 0; - u16 w; - - if (!omap_mcbsp_check_valid_id(id)) { - printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); - return; - } - mcbsp = id_to_mcbsp_ptr(id); - - if (mcbsp->st_data) - omap_st_start(mcbsp); - - /* Only enable SRG, if McBSP is master */ - w = MCBSP_READ_CACHE(mcbsp, PCR0); - if (w & (FSXM | FSRM | CLKXM | CLKRM)) - enable_srg = !((MCBSP_READ_CACHE(mcbsp, SPCR2) | - MCBSP_READ_CACHE(mcbsp, SPCR1)) & 1); - - if (enable_srg) { - /* Start the sample generator */ - w = MCBSP_READ_CACHE(mcbsp, SPCR2); - MCBSP_WRITE(mcbsp, SPCR2, w | (1 << 6)); - } - - /* Enable transmitter and receiver */ - tx &= 1; - w = MCBSP_READ_CACHE(mcbsp, SPCR2); - MCBSP_WRITE(mcbsp, SPCR2, w | tx); - - rx &= 1; - w = MCBSP_READ_CACHE(mcbsp, SPCR1); - MCBSP_WRITE(mcbsp, SPCR1, w | rx); - - /* - * Worst case: CLKSRG*2 = 8000khz: (1/8000) * 2 * 2 usec - * REVISIT: 100us may give enough time for two CLKSRG, however - * due to some unknown PM related, clock gating etc. reason it - * is now at 500us. - */ - udelay(500); - - if (enable_srg) { - /* Start frame sync */ - w = MCBSP_READ_CACHE(mcbsp, SPCR2); - MCBSP_WRITE(mcbsp, SPCR2, w | (1 << 7)); - } - - if (mcbsp->pdata->has_ccr) { - /* Release the transmitter and receiver */ - w = MCBSP_READ_CACHE(mcbsp, XCCR); - w &= ~(tx ? XDISABLE : 0); - MCBSP_WRITE(mcbsp, XCCR, w); - w = MCBSP_READ_CACHE(mcbsp, RCCR); - w &= ~(rx ? RDISABLE : 0); - MCBSP_WRITE(mcbsp, RCCR, w); - } - - /* Dump McBSP Regs */ - omap_mcbsp_dump_reg(id); -} -EXPORT_SYMBOL(omap_mcbsp_start); - -void omap_mcbsp_stop(unsigned int id, int tx, int rx) -{ - struct omap_mcbsp *mcbsp; - int idle; - u16 w; - - if (!omap_mcbsp_check_valid_id(id)) { - printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); - return; - } - - mcbsp = id_to_mcbsp_ptr(id); - - /* Reset transmitter */ - tx &= 1; - if (mcbsp->pdata->has_ccr) { - w = MCBSP_READ_CACHE(mcbsp, XCCR); - w |= (tx ? XDISABLE : 0); - MCBSP_WRITE(mcbsp, XCCR, w); - } - w = MCBSP_READ_CACHE(mcbsp, SPCR2); - MCBSP_WRITE(mcbsp, SPCR2, w & ~tx); - - /* Reset receiver */ - rx &= 1; - if (mcbsp->pdata->has_ccr) { - w = MCBSP_READ_CACHE(mcbsp, RCCR); - w |= (rx ? RDISABLE : 0); - MCBSP_WRITE(mcbsp, RCCR, w); - } - w = MCBSP_READ_CACHE(mcbsp, SPCR1); - MCBSP_WRITE(mcbsp, SPCR1, w & ~rx); - - idle = !((MCBSP_READ_CACHE(mcbsp, SPCR2) | - MCBSP_READ_CACHE(mcbsp, SPCR1)) & 1); - - if (idle) { - /* Reset the sample rate generator */ - w = MCBSP_READ_CACHE(mcbsp, SPCR2); - MCBSP_WRITE(mcbsp, SPCR2, w & ~(1 << 6)); - } - - if (mcbsp->st_data) - omap_st_stop(mcbsp); -} -EXPORT_SYMBOL(omap_mcbsp_stop); - -int omap2_mcbsp_set_clks_src(u8 id, u8 fck_src_id) -{ - struct omap_mcbsp *mcbsp; - const char *src; - - if (!omap_mcbsp_check_valid_id(id)) { - pr_err("%s: Invalid id (%d)\n", __func__, id + 1); - return -EINVAL; - } - mcbsp = id_to_mcbsp_ptr(id); - - if (fck_src_id == MCBSP_CLKS_PAD_SRC) - src = "clks_ext"; - else if (fck_src_id == MCBSP_CLKS_PRCM_SRC) - src = "clks_fclk"; - else - return -EINVAL; - - if (mcbsp->pdata->set_clk_src) - return mcbsp->pdata->set_clk_src(mcbsp->dev, mcbsp->fclk, src); - else - return -EINVAL; -} -EXPORT_SYMBOL(omap2_mcbsp_set_clks_src); - -void omap2_mcbsp1_mux_clkr_src(u8 mux) -{ - struct omap_mcbsp *mcbsp; - const char *src; - - if (mux == CLKR_SRC_CLKR) - src = "clkr"; - else if (mux == CLKR_SRC_CLKX) - src = "clkx"; - else - return; - - mcbsp = id_to_mcbsp_ptr(0); - if (mcbsp->pdata->mux_signal) - mcbsp->pdata->mux_signal(mcbsp->dev, "clkr", src); -} -EXPORT_SYMBOL(omap2_mcbsp1_mux_clkr_src); - -void omap2_mcbsp1_mux_fsr_src(u8 mux) -{ - struct omap_mcbsp *mcbsp; - const char *src; - - if (mux == FSR_SRC_FSR) - src = "fsr"; - else if (mux == FSR_SRC_FSX) - src = "fsx"; - else - return; - - mcbsp = id_to_mcbsp_ptr(0); - if (mcbsp->pdata->mux_signal) - mcbsp->pdata->mux_signal(mcbsp->dev, "fsr", src); -} -EXPORT_SYMBOL(omap2_mcbsp1_mux_fsr_src); - -#define max_thres(m) (mcbsp->pdata->buffer_size) -#define valid_threshold(m, val) ((val) <= max_thres(m)) -#define THRESHOLD_PROP_BUILDER(prop) \ -static ssize_t prop##_show(struct device *dev, \ - struct device_attribute *attr, char *buf) \ -{ \ - struct omap_mcbsp *mcbsp = dev_get_drvdata(dev); \ - \ - return sprintf(buf, "%u\n", mcbsp->prop); \ -} \ - \ -static ssize_t prop##_store(struct device *dev, \ - struct device_attribute *attr, \ - const char *buf, size_t size) \ -{ \ - struct omap_mcbsp *mcbsp = dev_get_drvdata(dev); \ - unsigned long val; \ - int status; \ - \ - status = strict_strtoul(buf, 0, &val); \ - if (status) \ - return status; \ - \ - if (!valid_threshold(mcbsp, val)) \ - return -EDOM; \ - \ - mcbsp->prop = val; \ - return size; \ -} \ - \ -static DEVICE_ATTR(prop, 0644, prop##_show, prop##_store); - -THRESHOLD_PROP_BUILDER(max_tx_thres); -THRESHOLD_PROP_BUILDER(max_rx_thres); - -static const char *dma_op_modes[] = { - "element", "threshold", "frame", -}; - -static ssize_t dma_op_mode_show(struct device *dev, - struct device_attribute *attr, char *buf) -{ - struct omap_mcbsp *mcbsp = dev_get_drvdata(dev); - int dma_op_mode, i = 0; - ssize_t len = 0; - const char * const *s; - - dma_op_mode = mcbsp->dma_op_mode; - - for (s = &dma_op_modes[i]; i < ARRAY_SIZE(dma_op_modes); s++, i++) { - if (dma_op_mode == i) - len += sprintf(buf + len, "[%s] ", *s); - else - len += sprintf(buf + len, "%s ", *s); - } - len += sprintf(buf + len, "\n"); - - return len; -} - -static ssize_t dma_op_mode_store(struct device *dev, - struct device_attribute *attr, - const char *buf, size_t size) -{ - struct omap_mcbsp *mcbsp = dev_get_drvdata(dev); - const char * const *s; - int i = 0; - - for (s = &dma_op_modes[i]; i < ARRAY_SIZE(dma_op_modes); s++, i++) - if (sysfs_streq(buf, *s)) - break; - - if (i == ARRAY_SIZE(dma_op_modes)) - return -EINVAL; - - spin_lock_irq(&mcbsp->lock); - if (!mcbsp->free) { - size = -EBUSY; - goto unlock; - } - mcbsp->dma_op_mode = i; - -unlock: - spin_unlock_irq(&mcbsp->lock); - - return size; -} - -static DEVICE_ATTR(dma_op_mode, 0644, dma_op_mode_show, dma_op_mode_store); - -static const struct attribute *additional_attrs[] = { - &dev_attr_max_tx_thres.attr, - &dev_attr_max_rx_thres.attr, - &dev_attr_dma_op_mode.attr, - NULL, -}; - -static const struct attribute_group additional_attr_group = { - .attrs = (struct attribute **)additional_attrs, -}; - -static ssize_t st_taps_show(struct device *dev, - struct device_attribute *attr, char *buf) -{ - struct omap_mcbsp *mcbsp = dev_get_drvdata(dev); - struct omap_mcbsp_st_data *st_data = mcbsp->st_data; - ssize_t status = 0; - int i; - - spin_lock_irq(&mcbsp->lock); - for (i = 0; i < st_data->nr_taps; i++) - status += sprintf(&buf[status], (i ? ", %d" : "%d"), - st_data->taps[i]); - if (i) - status += sprintf(&buf[status], "\n"); - spin_unlock_irq(&mcbsp->lock); - - return status; -} - -static ssize_t st_taps_store(struct device *dev, - struct device_attribute *attr, - const char *buf, size_t size) -{ - struct omap_mcbsp *mcbsp = dev_get_drvdata(dev); - struct omap_mcbsp_st_data *st_data = mcbsp->st_data; - int val, tmp, status, i = 0; - - spin_lock_irq(&mcbsp->lock); - memset(st_data->taps, 0, sizeof(st_data->taps)); - st_data->nr_taps = 0; - - do { - status = sscanf(buf, "%d%n", &val, &tmp); - if (status < 0 || status == 0) { - size = -EINVAL; - goto out; - } - if (val < -32768 || val > 32767) { - size = -EINVAL; - goto out; - } - st_data->taps[i++] = val; - buf += tmp; - if (*buf != ',') - break; - buf++; - } while (1); - - st_data->nr_taps = i; - -out: - spin_unlock_irq(&mcbsp->lock); - - return size; -} - -static DEVICE_ATTR(st_taps, 0644, st_taps_show, st_taps_store); - -static const struct attribute *sidetone_attrs[] = { - &dev_attr_st_taps.attr, - NULL, -}; - -static const struct attribute_group sidetone_attr_group = { - .attrs = (struct attribute **)sidetone_attrs, -}; - -static int __devinit omap_st_add(struct omap_mcbsp *mcbsp, - struct resource *res) -{ - struct omap_mcbsp_st_data *st_data; - int err; - - st_data = kzalloc(sizeof(*mcbsp->st_data), GFP_KERNEL); - if (!st_data) { - err = -ENOMEM; - goto err1; - } - - st_data->io_base_st = ioremap(res->start, resource_size(res)); - if (!st_data->io_base_st) { - err = -ENOMEM; - goto err2; - } - - err = sysfs_create_group(&mcbsp->dev->kobj, &sidetone_attr_group); - if (err) - goto err3; - - mcbsp->st_data = st_data; - return 0; - -err3: - iounmap(st_data->io_base_st); -err2: - kfree(st_data); -err1: - return err; - -} - -static void __devexit omap_st_remove(struct omap_mcbsp *mcbsp) -{ - struct omap_mcbsp_st_data *st_data = mcbsp->st_data; - - sysfs_remove_group(&mcbsp->dev->kobj, &sidetone_attr_group); - iounmap(st_data->io_base_st); - kfree(st_data); -} - -/* - * McBSP1 and McBSP3 are directly mapped on 1610 and 1510. - * 730 has only 2 McBSP, and both of them are MPU peripherals. - */ -static int __devinit omap_mcbsp_probe(struct platform_device *pdev) -{ - struct omap_mcbsp_platform_data *pdata = pdev->dev.platform_data; - struct omap_mcbsp *mcbsp; - int id = pdev->id - 1; - struct resource *res; - int ret = 0; - - if (!pdata) { - dev_err(&pdev->dev, "McBSP device initialized without" - "platform data\n"); - ret = -EINVAL; - goto exit; - } - - dev_dbg(&pdev->dev, "Initializing OMAP McBSP (%d).\n", pdev->id); - - if (id >= omap_mcbsp_count) { - dev_err(&pdev->dev, "Invalid McBSP device id (%d)\n", id); - ret = -EINVAL; - goto exit; - } - - mcbsp = kzalloc(sizeof(struct omap_mcbsp), GFP_KERNEL); - if (!mcbsp) { - ret = -ENOMEM; - goto exit; - } - - spin_lock_init(&mcbsp->lock); - mcbsp->id = id + 1; - mcbsp->free = true; - - res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mpu"); - if (!res) { - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - if (!res) { - dev_err(&pdev->dev, "%s:mcbsp%d has invalid memory" - "resource\n", __func__, pdev->id); - ret = -ENOMEM; - goto exit; - } - } - mcbsp->phys_base = res->start; - mcbsp->reg_cache_size = resource_size(res); - mcbsp->io_base = ioremap(res->start, resource_size(res)); - if (!mcbsp->io_base) { - ret = -ENOMEM; - goto err_ioremap; - } - - res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dma"); - if (!res) - mcbsp->phys_dma_base = mcbsp->phys_base; - else - mcbsp->phys_dma_base = res->start; - - mcbsp->tx_irq = platform_get_irq_byname(pdev, "tx"); - mcbsp->rx_irq = platform_get_irq_byname(pdev, "rx"); - - /* From OMAP4 there will be a single irq line */ - if (mcbsp->tx_irq == -ENXIO) - mcbsp->tx_irq = platform_get_irq(pdev, 0); - - res = platform_get_resource_byname(pdev, IORESOURCE_DMA, "rx"); - if (!res) { - dev_err(&pdev->dev, "%s:mcbsp%d has invalid rx DMA channel\n", - __func__, pdev->id); - ret = -ENODEV; - goto err_res; - } - mcbsp->dma_rx_sync = res->start; - - res = platform_get_resource_byname(pdev, IORESOURCE_DMA, "tx"); - if (!res) { - dev_err(&pdev->dev, "%s:mcbsp%d has invalid tx DMA channel\n", - __func__, pdev->id); - ret = -ENODEV; - goto err_res; - } - mcbsp->dma_tx_sync = res->start; - - mcbsp->fclk = clk_get(&pdev->dev, "fck"); - if (IS_ERR(mcbsp->fclk)) { - ret = PTR_ERR(mcbsp->fclk); - dev_err(&pdev->dev, "unable to get fck: %d\n", ret); - goto err_res; - } - - mcbsp->pdata = pdata; - mcbsp->dev = &pdev->dev; - mcbsp_ptr[id] = mcbsp; - platform_set_drvdata(pdev, mcbsp); - pm_runtime_enable(mcbsp->dev); - - mcbsp->dma_op_mode = MCBSP_DMA_MODE_ELEMENT; - if (mcbsp->pdata->buffer_size) { - /* - * Initially configure the maximum thresholds to a safe value. - * The McBSP FIFO usage with these values should not go under - * 16 locations. - * If the whole FIFO without safety buffer is used, than there - * is a possibility that the DMA will be not able to push the - * new data on time, causing channel shifts in runtime. - */ - mcbsp->max_tx_thres = max_thres(mcbsp) - 0x10; - mcbsp->max_rx_thres = max_thres(mcbsp) - 0x10; - - ret = sysfs_create_group(&mcbsp->dev->kobj, - &additional_attr_group); - if (ret) { - dev_err(mcbsp->dev, - "Unable to create additional controls\n"); - goto err_thres; - } - } else { - mcbsp->max_tx_thres = -EINVAL; - mcbsp->max_rx_thres = -EINVAL; - } - - res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "sidetone"); - if (res) { - ret = omap_st_add(mcbsp, res); - if (ret) { - dev_err(mcbsp->dev, - "Unable to create sidetone controls\n"); - goto err_st; - } - } - - return 0; - -err_st: - if (mcbsp->pdata->buffer_size) - sysfs_remove_group(&mcbsp->dev->kobj, - &additional_attr_group); -err_thres: - clk_put(mcbsp->fclk); -err_res: - iounmap(mcbsp->io_base); -err_ioremap: - kfree(mcbsp); -exit: - return ret; -} - -static int __devexit omap_mcbsp_remove(struct platform_device *pdev) -{ - struct omap_mcbsp *mcbsp = platform_get_drvdata(pdev); - - platform_set_drvdata(pdev, NULL); - if (mcbsp) { - - if (mcbsp->pdata && mcbsp->pdata->ops && - mcbsp->pdata->ops->free) - mcbsp->pdata->ops->free(mcbsp->id); - - if (mcbsp->pdata->buffer_size) - sysfs_remove_group(&mcbsp->dev->kobj, - &additional_attr_group); - - if (mcbsp->st_data) - omap_st_remove(mcbsp); - - clk_put(mcbsp->fclk); - - iounmap(mcbsp->io_base); - kfree(mcbsp); - } - - return 0; -} - -static struct platform_driver omap_mcbsp_driver = { - .probe = omap_mcbsp_probe, - .remove = __devexit_p(omap_mcbsp_remove), - .driver = { - .name = "omap-mcbsp", - }, -}; - -module_platform_driver(omap_mcbsp_driver); - -MODULE_AUTHOR("Samuel Ortiz "); -MODULE_DESCRIPTION("OMAP McBSP core driver"); -MODULE_LICENSE("GPL"); -MODULE_ALIAS("platform:omap-mcbsp"); diff --git a/sound/soc/omap/Kconfig b/sound/soc/omap/Kconfig index 47b23fea20c..27a3a29f7cd 100644 --- a/sound/soc/omap/Kconfig +++ b/sound/soc/omap/Kconfig @@ -5,6 +5,10 @@ config SND_OMAP_SOC config SND_OMAP_SOC_DMIC tristate +config OMAP_MCBSP + tristate + depends on ARCH_OMAP + config SND_OMAP_SOC_MCBSP tristate select OMAP_MCBSP diff --git a/sound/soc/omap/Makefile b/sound/soc/omap/Makefile index 123ac18303e..9f8fbd554eb 100644 --- a/sound/soc/omap/Makefile +++ b/sound/soc/omap/Makefile @@ -7,6 +7,7 @@ snd-soc-omap-hdmi-objs := omap-hdmi.o obj-$(CONFIG_SND_OMAP_SOC) += snd-soc-omap.o obj-$(CONFIG_SND_OMAP_SOC_DMIC) += snd-soc-omap-dmic.o +obj-$(CONFIG_OMAP_MCBSP) += mcbsp.o obj-$(CONFIG_SND_OMAP_SOC_MCBSP) += snd-soc-omap-mcbsp.o obj-$(CONFIG_SND_OMAP_SOC_MCPDM) += snd-soc-omap-mcpdm.o obj-$(CONFIG_SND_OMAP_SOC_HDMI) += snd-soc-omap-hdmi.o diff --git a/sound/soc/omap/mcbsp.c b/sound/soc/omap/mcbsp.c new file mode 100644 index 00000000000..36d83b0c9f0 --- /dev/null +++ b/sound/soc/omap/mcbsp.c @@ -0,0 +1,1364 @@ +/* + * sound/soc/omap/mcbsp.c + * + * Copyright (C) 2004 Nokia Corporation + * Author: Samuel Ortiz + * + * Contact: Jarkko Nikula + * Peter Ujfalusi + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * Multichannel mode not supported. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +struct omap_mcbsp **mcbsp_ptr; +int omap_mcbsp_count; + +#define omap_mcbsp_check_valid_id(id) (id < omap_mcbsp_count) +#define id_to_mcbsp_ptr(id) mcbsp_ptr[id]; + +static void omap_mcbsp_write(struct omap_mcbsp *mcbsp, u16 reg, u32 val) +{ + void __iomem *addr = mcbsp->io_base + reg * mcbsp->pdata->reg_step; + + if (mcbsp->pdata->reg_size == 2) { + ((u16 *)mcbsp->reg_cache)[reg] = (u16)val; + __raw_writew((u16)val, addr); + } else { + ((u32 *)mcbsp->reg_cache)[reg] = val; + __raw_writel(val, addr); + } +} + +static int omap_mcbsp_read(struct omap_mcbsp *mcbsp, u16 reg, bool from_cache) +{ + void __iomem *addr = mcbsp->io_base + reg * mcbsp->pdata->reg_step; + + if (mcbsp->pdata->reg_size == 2) { + return !from_cache ? __raw_readw(addr) : + ((u16 *)mcbsp->reg_cache)[reg]; + } else { + return !from_cache ? __raw_readl(addr) : + ((u32 *)mcbsp->reg_cache)[reg]; + } +} + +static void omap_mcbsp_st_write(struct omap_mcbsp *mcbsp, u16 reg, u32 val) +{ + __raw_writel(val, mcbsp->st_data->io_base_st + reg); +} + +static int omap_mcbsp_st_read(struct omap_mcbsp *mcbsp, u16 reg) +{ + return __raw_readl(mcbsp->st_data->io_base_st + reg); +} + +#define MCBSP_READ(mcbsp, reg) \ + omap_mcbsp_read(mcbsp, OMAP_MCBSP_REG_##reg, 0) +#define MCBSP_WRITE(mcbsp, reg, val) \ + omap_mcbsp_write(mcbsp, OMAP_MCBSP_REG_##reg, val) +#define MCBSP_READ_CACHE(mcbsp, reg) \ + omap_mcbsp_read(mcbsp, OMAP_MCBSP_REG_##reg, 1) + +#define MCBSP_ST_READ(mcbsp, reg) \ + omap_mcbsp_st_read(mcbsp, OMAP_ST_REG_##reg) +#define MCBSP_ST_WRITE(mcbsp, reg, val) \ + omap_mcbsp_st_write(mcbsp, OMAP_ST_REG_##reg, val) + +static void omap_mcbsp_dump_reg(u8 id) +{ + struct omap_mcbsp *mcbsp = id_to_mcbsp_ptr(id); + + dev_dbg(mcbsp->dev, "**** McBSP%d regs ****\n", mcbsp->id); + dev_dbg(mcbsp->dev, "DRR2: 0x%04x\n", + MCBSP_READ(mcbsp, DRR2)); + dev_dbg(mcbsp->dev, "DRR1: 0x%04x\n", + MCBSP_READ(mcbsp, DRR1)); + dev_dbg(mcbsp->dev, "DXR2: 0x%04x\n", + MCBSP_READ(mcbsp, DXR2)); + dev_dbg(mcbsp->dev, "DXR1: 0x%04x\n", + MCBSP_READ(mcbsp, DXR1)); + dev_dbg(mcbsp->dev, "SPCR2: 0x%04x\n", + MCBSP_READ(mcbsp, SPCR2)); + dev_dbg(mcbsp->dev, "SPCR1: 0x%04x\n", + MCBSP_READ(mcbsp, SPCR1)); + dev_dbg(mcbsp->dev, "RCR2: 0x%04x\n", + MCBSP_READ(mcbsp, RCR2)); + dev_dbg(mcbsp->dev, "RCR1: 0x%04x\n", + MCBSP_READ(mcbsp, RCR1)); + dev_dbg(mcbsp->dev, "XCR2: 0x%04x\n", + MCBSP_READ(mcbsp, XCR2)); + dev_dbg(mcbsp->dev, "XCR1: 0x%04x\n", + MCBSP_READ(mcbsp, XCR1)); + dev_dbg(mcbsp->dev, "SRGR2: 0x%04x\n", + MCBSP_READ(mcbsp, SRGR2)); + dev_dbg(mcbsp->dev, "SRGR1: 0x%04x\n", + MCBSP_READ(mcbsp, SRGR1)); + dev_dbg(mcbsp->dev, "PCR0: 0x%04x\n", + MCBSP_READ(mcbsp, PCR0)); + dev_dbg(mcbsp->dev, "***********************\n"); +} + +static irqreturn_t omap_mcbsp_tx_irq_handler(int irq, void *dev_id) +{ + struct omap_mcbsp *mcbsp_tx = dev_id; + u16 irqst_spcr2; + + irqst_spcr2 = MCBSP_READ(mcbsp_tx, SPCR2); + dev_dbg(mcbsp_tx->dev, "TX IRQ callback : 0x%x\n", irqst_spcr2); + + if (irqst_spcr2 & XSYNC_ERR) { + dev_err(mcbsp_tx->dev, "TX Frame Sync Error! : 0x%x\n", + irqst_spcr2); + /* Writing zero to XSYNC_ERR clears the IRQ */ + MCBSP_WRITE(mcbsp_tx, SPCR2, MCBSP_READ_CACHE(mcbsp_tx, SPCR2)); + } + + return IRQ_HANDLED; +} + +static irqreturn_t omap_mcbsp_rx_irq_handler(int irq, void *dev_id) +{ + struct omap_mcbsp *mcbsp_rx = dev_id; + u16 irqst_spcr1; + + irqst_spcr1 = MCBSP_READ(mcbsp_rx, SPCR1); + dev_dbg(mcbsp_rx->dev, "RX IRQ callback : 0x%x\n", irqst_spcr1); + + if (irqst_spcr1 & RSYNC_ERR) { + dev_err(mcbsp_rx->dev, "RX Frame Sync Error! : 0x%x\n", + irqst_spcr1); + /* Writing zero to RSYNC_ERR clears the IRQ */ + MCBSP_WRITE(mcbsp_rx, SPCR1, MCBSP_READ_CACHE(mcbsp_rx, SPCR1)); + } + + return IRQ_HANDLED; +} + +/* + * omap_mcbsp_config simply write a config to the + * appropriate McBSP. + * You either call this function or set the McBSP registers + * by yourself before calling omap_mcbsp_start(). + */ +void omap_mcbsp_config(unsigned int id, const struct omap_mcbsp_reg_cfg *config) +{ + struct omap_mcbsp *mcbsp; + + if (!omap_mcbsp_check_valid_id(id)) { + printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); + return; + } + mcbsp = id_to_mcbsp_ptr(id); + + dev_dbg(mcbsp->dev, "Configuring McBSP%d phys_base: 0x%08lx\n", + mcbsp->id, mcbsp->phys_base); + + /* We write the given config */ + MCBSP_WRITE(mcbsp, SPCR2, config->spcr2); + MCBSP_WRITE(mcbsp, SPCR1, config->spcr1); + MCBSP_WRITE(mcbsp, RCR2, config->rcr2); + MCBSP_WRITE(mcbsp, RCR1, config->rcr1); + MCBSP_WRITE(mcbsp, XCR2, config->xcr2); + MCBSP_WRITE(mcbsp, XCR1, config->xcr1); + MCBSP_WRITE(mcbsp, SRGR2, config->srgr2); + MCBSP_WRITE(mcbsp, SRGR1, config->srgr1); + MCBSP_WRITE(mcbsp, MCR2, config->mcr2); + MCBSP_WRITE(mcbsp, MCR1, config->mcr1); + MCBSP_WRITE(mcbsp, PCR0, config->pcr0); + if (mcbsp->pdata->has_ccr) { + MCBSP_WRITE(mcbsp, XCCR, config->xccr); + MCBSP_WRITE(mcbsp, RCCR, config->rccr); + } +} +EXPORT_SYMBOL(omap_mcbsp_config); + +/** + * omap_mcbsp_dma_params - returns the dma channel number + * @id - mcbsp id + * @stream - indicates the direction of data flow (rx or tx) + * + * Returns the dma channel number for the rx channel or tx channel + * based on the value of @stream for the requested mcbsp given by @id + */ +int omap_mcbsp_dma_ch_params(unsigned int id, unsigned int stream) +{ + struct omap_mcbsp *mcbsp; + + if (!omap_mcbsp_check_valid_id(id)) { + printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); + return -ENODEV; + } + mcbsp = id_to_mcbsp_ptr(id); + + if (stream) + return mcbsp->dma_rx_sync; + else + return mcbsp->dma_tx_sync; +} +EXPORT_SYMBOL(omap_mcbsp_dma_ch_params); + +/** + * omap_mcbsp_dma_reg_params - returns the address of mcbsp data register + * @id - mcbsp id + * @stream - indicates the direction of data flow (rx or tx) + * + * Returns the address of mcbsp data transmit register or data receive register + * to be used by DMA for transferring/receiving data based on the value of + * @stream for the requested mcbsp given by @id + */ +int omap_mcbsp_dma_reg_params(unsigned int id, unsigned int stream) +{ + struct omap_mcbsp *mcbsp; + int data_reg; + + if (!omap_mcbsp_check_valid_id(id)) { + printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); + return -ENODEV; + } + mcbsp = id_to_mcbsp_ptr(id); + + if (mcbsp->pdata->reg_size == 2) { + if (stream) + data_reg = OMAP_MCBSP_REG_DRR1; + else + data_reg = OMAP_MCBSP_REG_DXR1; + } else { + if (stream) + data_reg = OMAP_MCBSP_REG_DRR; + else + data_reg = OMAP_MCBSP_REG_DXR; + } + + return mcbsp->phys_dma_base + data_reg * mcbsp->pdata->reg_step; +} +EXPORT_SYMBOL(omap_mcbsp_dma_reg_params); + +static void omap_st_on(struct omap_mcbsp *mcbsp) +{ + unsigned int w; + + if (mcbsp->pdata->enable_st_clock) + mcbsp->pdata->enable_st_clock(mcbsp->id, 1); + + /* Enable McBSP Sidetone */ + w = MCBSP_READ(mcbsp, SSELCR); + MCBSP_WRITE(mcbsp, SSELCR, w | SIDETONEEN); + + /* Enable Sidetone from Sidetone Core */ + w = MCBSP_ST_READ(mcbsp, SSELCR); + MCBSP_ST_WRITE(mcbsp, SSELCR, w | ST_SIDETONEEN); +} + +static void omap_st_off(struct omap_mcbsp *mcbsp) +{ + unsigned int w; + + w = MCBSP_ST_READ(mcbsp, SSELCR); + MCBSP_ST_WRITE(mcbsp, SSELCR, w & ~(ST_SIDETONEEN)); + + w = MCBSP_READ(mcbsp, SSELCR); + MCBSP_WRITE(mcbsp, SSELCR, w & ~(SIDETONEEN)); + + if (mcbsp->pdata->enable_st_clock) + mcbsp->pdata->enable_st_clock(mcbsp->id, 0); +} + +static void omap_st_fir_write(struct omap_mcbsp *mcbsp, s16 *fir) +{ + u16 val, i; + + val = MCBSP_ST_READ(mcbsp, SSELCR); + + if (val & ST_COEFFWREN) + MCBSP_ST_WRITE(mcbsp, SSELCR, val & ~(ST_COEFFWREN)); + + MCBSP_ST_WRITE(mcbsp, SSELCR, val | ST_COEFFWREN); + + for (i = 0; i < 128; i++) + MCBSP_ST_WRITE(mcbsp, SFIRCR, fir[i]); + + i = 0; + + val = MCBSP_ST_READ(mcbsp, SSELCR); + while (!(val & ST_COEFFWRDONE) && (++i < 1000)) + val = MCBSP_ST_READ(mcbsp, SSELCR); + + MCBSP_ST_WRITE(mcbsp, SSELCR, val & ~(ST_COEFFWREN)); + + if (i == 1000) + dev_err(mcbsp->dev, "McBSP FIR load error!\n"); +} + +static void omap_st_chgain(struct omap_mcbsp *mcbsp) +{ + u16 w; + struct omap_mcbsp_st_data *st_data = mcbsp->st_data; + + w = MCBSP_ST_READ(mcbsp, SSELCR); + + MCBSP_ST_WRITE(mcbsp, SGAINCR, ST_CH0GAIN(st_data->ch0gain) | \ + ST_CH1GAIN(st_data->ch1gain)); +} + +int omap_st_set_chgain(unsigned int id, int channel, s16 chgain) +{ + struct omap_mcbsp *mcbsp; + struct omap_mcbsp_st_data *st_data; + int ret = 0; + + if (!omap_mcbsp_check_valid_id(id)) { + printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); + return -ENODEV; + } + + mcbsp = id_to_mcbsp_ptr(id); + st_data = mcbsp->st_data; + + if (!st_data) + return -ENOENT; + + spin_lock_irq(&mcbsp->lock); + if (channel == 0) + st_data->ch0gain = chgain; + else if (channel == 1) + st_data->ch1gain = chgain; + else + ret = -EINVAL; + + if (st_data->enabled) + omap_st_chgain(mcbsp); + spin_unlock_irq(&mcbsp->lock); + + return ret; +} +EXPORT_SYMBOL(omap_st_set_chgain); + +int omap_st_get_chgain(unsigned int id, int channel, s16 *chgain) +{ + struct omap_mcbsp *mcbsp; + struct omap_mcbsp_st_data *st_data; + int ret = 0; + + if (!omap_mcbsp_check_valid_id(id)) { + printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); + return -ENODEV; + } + + mcbsp = id_to_mcbsp_ptr(id); + st_data = mcbsp->st_data; + + if (!st_data) + return -ENOENT; + + spin_lock_irq(&mcbsp->lock); + if (channel == 0) + *chgain = st_data->ch0gain; + else if (channel == 1) + *chgain = st_data->ch1gain; + else + ret = -EINVAL; + spin_unlock_irq(&mcbsp->lock); + + return ret; +} +EXPORT_SYMBOL(omap_st_get_chgain); + +static int omap_st_start(struct omap_mcbsp *mcbsp) +{ + struct omap_mcbsp_st_data *st_data = mcbsp->st_data; + + if (st_data && st_data->enabled && !st_data->running) { + omap_st_fir_write(mcbsp, st_data->taps); + omap_st_chgain(mcbsp); + + if (!mcbsp->free) { + omap_st_on(mcbsp); + st_data->running = 1; + } + } + + return 0; +} + +int omap_st_enable(unsigned int id) +{ + struct omap_mcbsp *mcbsp; + struct omap_mcbsp_st_data *st_data; + + if (!omap_mcbsp_check_valid_id(id)) { + printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); + return -ENODEV; + } + + mcbsp = id_to_mcbsp_ptr(id); + st_data = mcbsp->st_data; + + if (!st_data) + return -ENODEV; + + spin_lock_irq(&mcbsp->lock); + st_data->enabled = 1; + omap_st_start(mcbsp); + spin_unlock_irq(&mcbsp->lock); + + return 0; +} +EXPORT_SYMBOL(omap_st_enable); + +static int omap_st_stop(struct omap_mcbsp *mcbsp) +{ + struct omap_mcbsp_st_data *st_data = mcbsp->st_data; + + if (st_data && st_data->running) { + if (!mcbsp->free) { + omap_st_off(mcbsp); + st_data->running = 0; + } + } + + return 0; +} + +int omap_st_disable(unsigned int id) +{ + struct omap_mcbsp *mcbsp; + struct omap_mcbsp_st_data *st_data; + int ret = 0; + + if (!omap_mcbsp_check_valid_id(id)) { + printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); + return -ENODEV; + } + + mcbsp = id_to_mcbsp_ptr(id); + st_data = mcbsp->st_data; + + if (!st_data) + return -ENODEV; + + spin_lock_irq(&mcbsp->lock); + omap_st_stop(mcbsp); + st_data->enabled = 0; + spin_unlock_irq(&mcbsp->lock); + + return ret; +} +EXPORT_SYMBOL(omap_st_disable); + +int omap_st_is_enabled(unsigned int id) +{ + struct omap_mcbsp *mcbsp; + struct omap_mcbsp_st_data *st_data; + + if (!omap_mcbsp_check_valid_id(id)) { + printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); + return -ENODEV; + } + + mcbsp = id_to_mcbsp_ptr(id); + st_data = mcbsp->st_data; + + if (!st_data) + return -ENODEV; + + + return st_data->enabled; +} +EXPORT_SYMBOL(omap_st_is_enabled); + +/* + * omap_mcbsp_set_rx_threshold configures the transmit threshold in words. + * The threshold parameter is 1 based, and it is converted (threshold - 1) + * for the THRSH2 register. + */ +void omap_mcbsp_set_tx_threshold(unsigned int id, u16 threshold) +{ + struct omap_mcbsp *mcbsp; + + if (!omap_mcbsp_check_valid_id(id)) { + printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); + return; + } + mcbsp = id_to_mcbsp_ptr(id); + if (mcbsp->pdata->buffer_size == 0) + return; + + if (threshold && threshold <= mcbsp->max_tx_thres) + MCBSP_WRITE(mcbsp, THRSH2, threshold - 1); +} +EXPORT_SYMBOL(omap_mcbsp_set_tx_threshold); + +/* + * omap_mcbsp_set_rx_threshold configures the receive threshold in words. + * The threshold parameter is 1 based, and it is converted (threshold - 1) + * for the THRSH1 register. + */ +void omap_mcbsp_set_rx_threshold(unsigned int id, u16 threshold) +{ + struct omap_mcbsp *mcbsp; + + if (!omap_mcbsp_check_valid_id(id)) { + printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); + return; + } + mcbsp = id_to_mcbsp_ptr(id); + if (mcbsp->pdata->buffer_size == 0) + return; + + if (threshold && threshold <= mcbsp->max_rx_thres) + MCBSP_WRITE(mcbsp, THRSH1, threshold - 1); +} +EXPORT_SYMBOL(omap_mcbsp_set_rx_threshold); + +/* + * omap_mcbsp_get_max_tx_thres just return the current configured + * maximum threshold for transmission + */ +u16 omap_mcbsp_get_max_tx_threshold(unsigned int id) +{ + struct omap_mcbsp *mcbsp; + + if (!omap_mcbsp_check_valid_id(id)) { + printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); + return -ENODEV; + } + mcbsp = id_to_mcbsp_ptr(id); + + return mcbsp->max_tx_thres; +} +EXPORT_SYMBOL(omap_mcbsp_get_max_tx_threshold); + +/* + * omap_mcbsp_get_max_rx_thres just return the current configured + * maximum threshold for reception + */ +u16 omap_mcbsp_get_max_rx_threshold(unsigned int id) +{ + struct omap_mcbsp *mcbsp; + + if (!omap_mcbsp_check_valid_id(id)) { + printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); + return -ENODEV; + } + mcbsp = id_to_mcbsp_ptr(id); + + return mcbsp->max_rx_thres; +} +EXPORT_SYMBOL(omap_mcbsp_get_max_rx_threshold); + +u16 omap_mcbsp_get_fifo_size(unsigned int id) +{ + struct omap_mcbsp *mcbsp; + + if (!omap_mcbsp_check_valid_id(id)) { + printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); + return -ENODEV; + } + mcbsp = id_to_mcbsp_ptr(id); + + return mcbsp->pdata->buffer_size; +} +EXPORT_SYMBOL(omap_mcbsp_get_fifo_size); + +/* + * omap_mcbsp_get_tx_delay returns the number of used slots in the McBSP FIFO + */ +u16 omap_mcbsp_get_tx_delay(unsigned int id) +{ + struct omap_mcbsp *mcbsp; + u16 buffstat; + + if (!omap_mcbsp_check_valid_id(id)) { + printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); + return -ENODEV; + } + mcbsp = id_to_mcbsp_ptr(id); + if (mcbsp->pdata->buffer_size == 0) + return 0; + + /* Returns the number of free locations in the buffer */ + buffstat = MCBSP_READ(mcbsp, XBUFFSTAT); + + /* Number of slots are different in McBSP ports */ + return mcbsp->pdata->buffer_size - buffstat; +} +EXPORT_SYMBOL(omap_mcbsp_get_tx_delay); + +/* + * omap_mcbsp_get_rx_delay returns the number of free slots in the McBSP FIFO + * to reach the threshold value (when the DMA will be triggered to read it) + */ +u16 omap_mcbsp_get_rx_delay(unsigned int id) +{ + struct omap_mcbsp *mcbsp; + u16 buffstat, threshold; + + if (!omap_mcbsp_check_valid_id(id)) { + printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); + return -ENODEV; + } + mcbsp = id_to_mcbsp_ptr(id); + if (mcbsp->pdata->buffer_size == 0) + return 0; + + /* Returns the number of used locations in the buffer */ + buffstat = MCBSP_READ(mcbsp, RBUFFSTAT); + /* RX threshold */ + threshold = MCBSP_READ(mcbsp, THRSH1); + + /* Return the number of location till we reach the threshold limit */ + if (threshold <= buffstat) + return 0; + else + return threshold - buffstat; +} +EXPORT_SYMBOL(omap_mcbsp_get_rx_delay); + +/* + * omap_mcbsp_get_dma_op_mode just return the current configured + * operating mode for the mcbsp channel + */ +int omap_mcbsp_get_dma_op_mode(unsigned int id) +{ + struct omap_mcbsp *mcbsp; + int dma_op_mode; + + if (!omap_mcbsp_check_valid_id(id)) { + printk(KERN_ERR "%s: Invalid id (%u)\n", __func__, id + 1); + return -ENODEV; + } + mcbsp = id_to_mcbsp_ptr(id); + + dma_op_mode = mcbsp->dma_op_mode; + + return dma_op_mode; +} +EXPORT_SYMBOL(omap_mcbsp_get_dma_op_mode); + +int omap_mcbsp_request(unsigned int id) +{ + struct omap_mcbsp *mcbsp; + void *reg_cache; + int err; + + if (!omap_mcbsp_check_valid_id(id)) { + printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); + return -ENODEV; + } + mcbsp = id_to_mcbsp_ptr(id); + + reg_cache = kzalloc(mcbsp->reg_cache_size, GFP_KERNEL); + if (!reg_cache) { + return -ENOMEM; + } + + spin_lock(&mcbsp->lock); + if (!mcbsp->free) { + dev_err(mcbsp->dev, "McBSP%d is currently in use\n", + mcbsp->id); + err = -EBUSY; + goto err_kfree; + } + + mcbsp->free = false; + mcbsp->reg_cache = reg_cache; + spin_unlock(&mcbsp->lock); + + if (mcbsp->pdata && mcbsp->pdata->ops && mcbsp->pdata->ops->request) + mcbsp->pdata->ops->request(id); + + pm_runtime_get_sync(mcbsp->dev); + + /* Enable wakeup behavior */ + if (mcbsp->pdata->has_wakeup) + MCBSP_WRITE(mcbsp, WAKEUPEN, XRDYEN | RRDYEN); + + /* + * Make sure that transmitter, receiver and sample-rate generator are + * not running before activating IRQs. + */ + MCBSP_WRITE(mcbsp, SPCR1, 0); + MCBSP_WRITE(mcbsp, SPCR2, 0); + + err = request_irq(mcbsp->tx_irq, omap_mcbsp_tx_irq_handler, + 0, "McBSP", (void *)mcbsp); + if (err != 0) { + dev_err(mcbsp->dev, "Unable to request TX IRQ %d " + "for McBSP%d\n", mcbsp->tx_irq, + mcbsp->id); + goto err_clk_disable; + } + + if (mcbsp->rx_irq) { + err = request_irq(mcbsp->rx_irq, + omap_mcbsp_rx_irq_handler, + 0, "McBSP", (void *)mcbsp); + if (err != 0) { + dev_err(mcbsp->dev, "Unable to request RX IRQ %d " + "for McBSP%d\n", mcbsp->rx_irq, + mcbsp->id); + goto err_free_irq; + } + } + + return 0; +err_free_irq: + free_irq(mcbsp->tx_irq, (void *)mcbsp); +err_clk_disable: + if (mcbsp->pdata && mcbsp->pdata->ops && mcbsp->pdata->ops->free) + mcbsp->pdata->ops->free(id); + + /* Disable wakeup behavior */ + if (mcbsp->pdata->has_wakeup) + MCBSP_WRITE(mcbsp, WAKEUPEN, 0); + + pm_runtime_put_sync(mcbsp->dev); + + spin_lock(&mcbsp->lock); + mcbsp->free = true; + mcbsp->reg_cache = NULL; +err_kfree: + spin_unlock(&mcbsp->lock); + kfree(reg_cache); + + return err; +} +EXPORT_SYMBOL(omap_mcbsp_request); + +void omap_mcbsp_free(unsigned int id) +{ + struct omap_mcbsp *mcbsp; + void *reg_cache; + + if (!omap_mcbsp_check_valid_id(id)) { + printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); + return; + } + mcbsp = id_to_mcbsp_ptr(id); + + if (mcbsp->pdata && mcbsp->pdata->ops && mcbsp->pdata->ops->free) + mcbsp->pdata->ops->free(id); + + /* Disable wakeup behavior */ + if (mcbsp->pdata->has_wakeup) + MCBSP_WRITE(mcbsp, WAKEUPEN, 0); + + pm_runtime_put_sync(mcbsp->dev); + + if (mcbsp->rx_irq) + free_irq(mcbsp->rx_irq, (void *)mcbsp); + free_irq(mcbsp->tx_irq, (void *)mcbsp); + + reg_cache = mcbsp->reg_cache; + + spin_lock(&mcbsp->lock); + if (mcbsp->free) + dev_err(mcbsp->dev, "McBSP%d was not reserved\n", mcbsp->id); + else + mcbsp->free = true; + mcbsp->reg_cache = NULL; + spin_unlock(&mcbsp->lock); + + if (reg_cache) + kfree(reg_cache); +} +EXPORT_SYMBOL(omap_mcbsp_free); + +/* + * Here we start the McBSP, by enabling transmitter, receiver or both. + * If no transmitter or receiver is active prior calling, then sample-rate + * generator and frame sync are started. + */ +void omap_mcbsp_start(unsigned int id, int tx, int rx) +{ + struct omap_mcbsp *mcbsp; + int enable_srg = 0; + u16 w; + + if (!omap_mcbsp_check_valid_id(id)) { + printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); + return; + } + mcbsp = id_to_mcbsp_ptr(id); + + if (mcbsp->st_data) + omap_st_start(mcbsp); + + /* Only enable SRG, if McBSP is master */ + w = MCBSP_READ_CACHE(mcbsp, PCR0); + if (w & (FSXM | FSRM | CLKXM | CLKRM)) + enable_srg = !((MCBSP_READ_CACHE(mcbsp, SPCR2) | + MCBSP_READ_CACHE(mcbsp, SPCR1)) & 1); + + if (enable_srg) { + /* Start the sample generator */ + w = MCBSP_READ_CACHE(mcbsp, SPCR2); + MCBSP_WRITE(mcbsp, SPCR2, w | (1 << 6)); + } + + /* Enable transmitter and receiver */ + tx &= 1; + w = MCBSP_READ_CACHE(mcbsp, SPCR2); + MCBSP_WRITE(mcbsp, SPCR2, w | tx); + + rx &= 1; + w = MCBSP_READ_CACHE(mcbsp, SPCR1); + MCBSP_WRITE(mcbsp, SPCR1, w | rx); + + /* + * Worst case: CLKSRG*2 = 8000khz: (1/8000) * 2 * 2 usec + * REVISIT: 100us may give enough time for two CLKSRG, however + * due to some unknown PM related, clock gating etc. reason it + * is now at 500us. + */ + udelay(500); + + if (enable_srg) { + /* Start frame sync */ + w = MCBSP_READ_CACHE(mcbsp, SPCR2); + MCBSP_WRITE(mcbsp, SPCR2, w | (1 << 7)); + } + + if (mcbsp->pdata->has_ccr) { + /* Release the transmitter and receiver */ + w = MCBSP_READ_CACHE(mcbsp, XCCR); + w &= ~(tx ? XDISABLE : 0); + MCBSP_WRITE(mcbsp, XCCR, w); + w = MCBSP_READ_CACHE(mcbsp, RCCR); + w &= ~(rx ? RDISABLE : 0); + MCBSP_WRITE(mcbsp, RCCR, w); + } + + /* Dump McBSP Regs */ + omap_mcbsp_dump_reg(id); +} +EXPORT_SYMBOL(omap_mcbsp_start); + +void omap_mcbsp_stop(unsigned int id, int tx, int rx) +{ + struct omap_mcbsp *mcbsp; + int idle; + u16 w; + + if (!omap_mcbsp_check_valid_id(id)) { + printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); + return; + } + + mcbsp = id_to_mcbsp_ptr(id); + + /* Reset transmitter */ + tx &= 1; + if (mcbsp->pdata->has_ccr) { + w = MCBSP_READ_CACHE(mcbsp, XCCR); + w |= (tx ? XDISABLE : 0); + MCBSP_WRITE(mcbsp, XCCR, w); + } + w = MCBSP_READ_CACHE(mcbsp, SPCR2); + MCBSP_WRITE(mcbsp, SPCR2, w & ~tx); + + /* Reset receiver */ + rx &= 1; + if (mcbsp->pdata->has_ccr) { + w = MCBSP_READ_CACHE(mcbsp, RCCR); + w |= (rx ? RDISABLE : 0); + MCBSP_WRITE(mcbsp, RCCR, w); + } + w = MCBSP_READ_CACHE(mcbsp, SPCR1); + MCBSP_WRITE(mcbsp, SPCR1, w & ~rx); + + idle = !((MCBSP_READ_CACHE(mcbsp, SPCR2) | + MCBSP_READ_CACHE(mcbsp, SPCR1)) & 1); + + if (idle) { + /* Reset the sample rate generator */ + w = MCBSP_READ_CACHE(mcbsp, SPCR2); + MCBSP_WRITE(mcbsp, SPCR2, w & ~(1 << 6)); + } + + if (mcbsp->st_data) + omap_st_stop(mcbsp); +} +EXPORT_SYMBOL(omap_mcbsp_stop); + +int omap2_mcbsp_set_clks_src(u8 id, u8 fck_src_id) +{ + struct omap_mcbsp *mcbsp; + const char *src; + + if (!omap_mcbsp_check_valid_id(id)) { + pr_err("%s: Invalid id (%d)\n", __func__, id + 1); + return -EINVAL; + } + mcbsp = id_to_mcbsp_ptr(id); + + if (fck_src_id == MCBSP_CLKS_PAD_SRC) + src = "clks_ext"; + else if (fck_src_id == MCBSP_CLKS_PRCM_SRC) + src = "clks_fclk"; + else + return -EINVAL; + + if (mcbsp->pdata->set_clk_src) + return mcbsp->pdata->set_clk_src(mcbsp->dev, mcbsp->fclk, src); + else + return -EINVAL; +} +EXPORT_SYMBOL(omap2_mcbsp_set_clks_src); + +void omap2_mcbsp1_mux_clkr_src(u8 mux) +{ + struct omap_mcbsp *mcbsp; + const char *src; + + if (mux == CLKR_SRC_CLKR) + src = "clkr"; + else if (mux == CLKR_SRC_CLKX) + src = "clkx"; + else + return; + + mcbsp = id_to_mcbsp_ptr(0); + if (mcbsp->pdata->mux_signal) + mcbsp->pdata->mux_signal(mcbsp->dev, "clkr", src); +} +EXPORT_SYMBOL(omap2_mcbsp1_mux_clkr_src); + +void omap2_mcbsp1_mux_fsr_src(u8 mux) +{ + struct omap_mcbsp *mcbsp; + const char *src; + + if (mux == FSR_SRC_FSR) + src = "fsr"; + else if (mux == FSR_SRC_FSX) + src = "fsx"; + else + return; + + mcbsp = id_to_mcbsp_ptr(0); + if (mcbsp->pdata->mux_signal) + mcbsp->pdata->mux_signal(mcbsp->dev, "fsr", src); +} +EXPORT_SYMBOL(omap2_mcbsp1_mux_fsr_src); + +#define max_thres(m) (mcbsp->pdata->buffer_size) +#define valid_threshold(m, val) ((val) <= max_thres(m)) +#define THRESHOLD_PROP_BUILDER(prop) \ +static ssize_t prop##_show(struct device *dev, \ + struct device_attribute *attr, char *buf) \ +{ \ + struct omap_mcbsp *mcbsp = dev_get_drvdata(dev); \ + \ + return sprintf(buf, "%u\n", mcbsp->prop); \ +} \ + \ +static ssize_t prop##_store(struct device *dev, \ + struct device_attribute *attr, \ + const char *buf, size_t size) \ +{ \ + struct omap_mcbsp *mcbsp = dev_get_drvdata(dev); \ + unsigned long val; \ + int status; \ + \ + status = strict_strtoul(buf, 0, &val); \ + if (status) \ + return status; \ + \ + if (!valid_threshold(mcbsp, val)) \ + return -EDOM; \ + \ + mcbsp->prop = val; \ + return size; \ +} \ + \ +static DEVICE_ATTR(prop, 0644, prop##_show, prop##_store); + +THRESHOLD_PROP_BUILDER(max_tx_thres); +THRESHOLD_PROP_BUILDER(max_rx_thres); + +static const char *dma_op_modes[] = { + "element", "threshold", "frame", +}; + +static ssize_t dma_op_mode_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct omap_mcbsp *mcbsp = dev_get_drvdata(dev); + int dma_op_mode, i = 0; + ssize_t len = 0; + const char * const *s; + + dma_op_mode = mcbsp->dma_op_mode; + + for (s = &dma_op_modes[i]; i < ARRAY_SIZE(dma_op_modes); s++, i++) { + if (dma_op_mode == i) + len += sprintf(buf + len, "[%s] ", *s); + else + len += sprintf(buf + len, "%s ", *s); + } + len += sprintf(buf + len, "\n"); + + return len; +} + +static ssize_t dma_op_mode_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t size) +{ + struct omap_mcbsp *mcbsp = dev_get_drvdata(dev); + const char * const *s; + int i = 0; + + for (s = &dma_op_modes[i]; i < ARRAY_SIZE(dma_op_modes); s++, i++) + if (sysfs_streq(buf, *s)) + break; + + if (i == ARRAY_SIZE(dma_op_modes)) + return -EINVAL; + + spin_lock_irq(&mcbsp->lock); + if (!mcbsp->free) { + size = -EBUSY; + goto unlock; + } + mcbsp->dma_op_mode = i; + +unlock: + spin_unlock_irq(&mcbsp->lock); + + return size; +} + +static DEVICE_ATTR(dma_op_mode, 0644, dma_op_mode_show, dma_op_mode_store); + +static const struct attribute *additional_attrs[] = { + &dev_attr_max_tx_thres.attr, + &dev_attr_max_rx_thres.attr, + &dev_attr_dma_op_mode.attr, + NULL, +}; + +static const struct attribute_group additional_attr_group = { + .attrs = (struct attribute **)additional_attrs, +}; + +static ssize_t st_taps_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct omap_mcbsp *mcbsp = dev_get_drvdata(dev); + struct omap_mcbsp_st_data *st_data = mcbsp->st_data; + ssize_t status = 0; + int i; + + spin_lock_irq(&mcbsp->lock); + for (i = 0; i < st_data->nr_taps; i++) + status += sprintf(&buf[status], (i ? ", %d" : "%d"), + st_data->taps[i]); + if (i) + status += sprintf(&buf[status], "\n"); + spin_unlock_irq(&mcbsp->lock); + + return status; +} + +static ssize_t st_taps_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t size) +{ + struct omap_mcbsp *mcbsp = dev_get_drvdata(dev); + struct omap_mcbsp_st_data *st_data = mcbsp->st_data; + int val, tmp, status, i = 0; + + spin_lock_irq(&mcbsp->lock); + memset(st_data->taps, 0, sizeof(st_data->taps)); + st_data->nr_taps = 0; + + do { + status = sscanf(buf, "%d%n", &val, &tmp); + if (status < 0 || status == 0) { + size = -EINVAL; + goto out; + } + if (val < -32768 || val > 32767) { + size = -EINVAL; + goto out; + } + st_data->taps[i++] = val; + buf += tmp; + if (*buf != ',') + break; + buf++; + } while (1); + + st_data->nr_taps = i; + +out: + spin_unlock_irq(&mcbsp->lock); + + return size; +} + +static DEVICE_ATTR(st_taps, 0644, st_taps_show, st_taps_store); + +static const struct attribute *sidetone_attrs[] = { + &dev_attr_st_taps.attr, + NULL, +}; + +static const struct attribute_group sidetone_attr_group = { + .attrs = (struct attribute **)sidetone_attrs, +}; + +static int __devinit omap_st_add(struct omap_mcbsp *mcbsp, + struct resource *res) +{ + struct omap_mcbsp_st_data *st_data; + int err; + + st_data = kzalloc(sizeof(*mcbsp->st_data), GFP_KERNEL); + if (!st_data) { + err = -ENOMEM; + goto err1; + } + + st_data->io_base_st = ioremap(res->start, resource_size(res)); + if (!st_data->io_base_st) { + err = -ENOMEM; + goto err2; + } + + err = sysfs_create_group(&mcbsp->dev->kobj, &sidetone_attr_group); + if (err) + goto err3; + + mcbsp->st_data = st_data; + return 0; + +err3: + iounmap(st_data->io_base_st); +err2: + kfree(st_data); +err1: + return err; + +} + +static void __devexit omap_st_remove(struct omap_mcbsp *mcbsp) +{ + struct omap_mcbsp_st_data *st_data = mcbsp->st_data; + + sysfs_remove_group(&mcbsp->dev->kobj, &sidetone_attr_group); + iounmap(st_data->io_base_st); + kfree(st_data); +} + +/* + * McBSP1 and McBSP3 are directly mapped on 1610 and 1510. + * 730 has only 2 McBSP, and both of them are MPU peripherals. + */ +static int __devinit omap_mcbsp_probe(struct platform_device *pdev) +{ + struct omap_mcbsp_platform_data *pdata = pdev->dev.platform_data; + struct omap_mcbsp *mcbsp; + int id = pdev->id - 1; + struct resource *res; + int ret = 0; + + if (!pdata) { + dev_err(&pdev->dev, "McBSP device initialized without" + "platform data\n"); + ret = -EINVAL; + goto exit; + } + + dev_dbg(&pdev->dev, "Initializing OMAP McBSP (%d).\n", pdev->id); + + if (id >= omap_mcbsp_count) { + dev_err(&pdev->dev, "Invalid McBSP device id (%d)\n", id); + ret = -EINVAL; + goto exit; + } + + mcbsp = kzalloc(sizeof(struct omap_mcbsp), GFP_KERNEL); + if (!mcbsp) { + ret = -ENOMEM; + goto exit; + } + + spin_lock_init(&mcbsp->lock); + mcbsp->id = id + 1; + mcbsp->free = true; + + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mpu"); + if (!res) { + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!res) { + dev_err(&pdev->dev, "%s:mcbsp%d has invalid memory" + "resource\n", __func__, pdev->id); + ret = -ENOMEM; + goto exit; + } + } + mcbsp->phys_base = res->start; + mcbsp->reg_cache_size = resource_size(res); + mcbsp->io_base = ioremap(res->start, resource_size(res)); + if (!mcbsp->io_base) { + ret = -ENOMEM; + goto err_ioremap; + } + + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dma"); + if (!res) + mcbsp->phys_dma_base = mcbsp->phys_base; + else + mcbsp->phys_dma_base = res->start; + + mcbsp->tx_irq = platform_get_irq_byname(pdev, "tx"); + mcbsp->rx_irq = platform_get_irq_byname(pdev, "rx"); + + /* From OMAP4 there will be a single irq line */ + if (mcbsp->tx_irq == -ENXIO) + mcbsp->tx_irq = platform_get_irq(pdev, 0); + + res = platform_get_resource_byname(pdev, IORESOURCE_DMA, "rx"); + if (!res) { + dev_err(&pdev->dev, "%s:mcbsp%d has invalid rx DMA channel\n", + __func__, pdev->id); + ret = -ENODEV; + goto err_res; + } + mcbsp->dma_rx_sync = res->start; + + res = platform_get_resource_byname(pdev, IORESOURCE_DMA, "tx"); + if (!res) { + dev_err(&pdev->dev, "%s:mcbsp%d has invalid tx DMA channel\n", + __func__, pdev->id); + ret = -ENODEV; + goto err_res; + } + mcbsp->dma_tx_sync = res->start; + + mcbsp->fclk = clk_get(&pdev->dev, "fck"); + if (IS_ERR(mcbsp->fclk)) { + ret = PTR_ERR(mcbsp->fclk); + dev_err(&pdev->dev, "unable to get fck: %d\n", ret); + goto err_res; + } + + mcbsp->pdata = pdata; + mcbsp->dev = &pdev->dev; + mcbsp_ptr[id] = mcbsp; + platform_set_drvdata(pdev, mcbsp); + pm_runtime_enable(mcbsp->dev); + + mcbsp->dma_op_mode = MCBSP_DMA_MODE_ELEMENT; + if (mcbsp->pdata->buffer_size) { + /* + * Initially configure the maximum thresholds to a safe value. + * The McBSP FIFO usage with these values should not go under + * 16 locations. + * If the whole FIFO without safety buffer is used, than there + * is a possibility that the DMA will be not able to push the + * new data on time, causing channel shifts in runtime. + */ + mcbsp->max_tx_thres = max_thres(mcbsp) - 0x10; + mcbsp->max_rx_thres = max_thres(mcbsp) - 0x10; + + ret = sysfs_create_group(&mcbsp->dev->kobj, + &additional_attr_group); + if (ret) { + dev_err(mcbsp->dev, + "Unable to create additional controls\n"); + goto err_thres; + } + } else { + mcbsp->max_tx_thres = -EINVAL; + mcbsp->max_rx_thres = -EINVAL; + } + + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "sidetone"); + if (res) { + ret = omap_st_add(mcbsp, res); + if (ret) { + dev_err(mcbsp->dev, + "Unable to create sidetone controls\n"); + goto err_st; + } + } + + return 0; + +err_st: + if (mcbsp->pdata->buffer_size) + sysfs_remove_group(&mcbsp->dev->kobj, + &additional_attr_group); +err_thres: + clk_put(mcbsp->fclk); +err_res: + iounmap(mcbsp->io_base); +err_ioremap: + kfree(mcbsp); +exit: + return ret; +} + +static int __devexit omap_mcbsp_remove(struct platform_device *pdev) +{ + struct omap_mcbsp *mcbsp = platform_get_drvdata(pdev); + + platform_set_drvdata(pdev, NULL); + if (mcbsp) { + + if (mcbsp->pdata && mcbsp->pdata->ops && + mcbsp->pdata->ops->free) + mcbsp->pdata->ops->free(mcbsp->id); + + if (mcbsp->pdata->buffer_size) + sysfs_remove_group(&mcbsp->dev->kobj, + &additional_attr_group); + + if (mcbsp->st_data) + omap_st_remove(mcbsp); + + clk_put(mcbsp->fclk); + + iounmap(mcbsp->io_base); + kfree(mcbsp); + } + + return 0; +} + +static struct platform_driver omap_mcbsp_driver = { + .probe = omap_mcbsp_probe, + .remove = __devexit_p(omap_mcbsp_remove), + .driver = { + .name = "omap-mcbsp", + }, +}; + +module_platform_driver(omap_mcbsp_driver); + +MODULE_AUTHOR("Samuel Ortiz "); +MODULE_DESCRIPTION("OMAP McBSP core driver"); +MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform:omap-mcbsp"); -- cgit v1.2.3 From 219f43164e8c611c6b8e7b628def9183098b430b Mon Sep 17 00:00:00 2001 From: Peter Ujfalusi Date: Fri, 3 Feb 2012 13:11:47 +0200 Subject: ASoC: OMAP: McBSP: Consolidate plat/mcbsp.h content Move most of the content of the plat/mcbsp.h header file under sound/soc/omap/ to help further cleanups. Signed-off-by: Peter Ujfalusi Tested-by: Grazvydas Ignotas Tested-by: Janusz Krzysztofik Acked-by: Mark Brown Acked-by: Jarkko Nikula Signed-off-by: Liam Girdwood --- arch/arm/plat-omap/include/plat/mcbsp.h | 273 ----------------------------- sound/soc/omap/mcbsp.c | 2 + sound/soc/omap/mcbsp.h | 292 ++++++++++++++++++++++++++++++++ sound/soc/omap/omap-mcbsp.c | 10 ++ 4 files changed, 304 insertions(+), 273 deletions(-) create mode 100644 sound/soc/omap/mcbsp.h (limited to 'arch/arm/plat-omap') diff --git a/arch/arm/plat-omap/include/plat/mcbsp.h b/arch/arm/plat-omap/include/plat/mcbsp.h index 7e4f893c271..1a9e98ff6c8 100644 --- a/arch/arm/plat-omap/include/plat/mcbsp.h +++ b/arch/arm/plat-omap/include/plat/mcbsp.h @@ -38,210 +38,6 @@ static struct platform_device omap_mcbsp##port_nr = { \ #define MCBSP_CONFIG_TYPE3 0x3 #define MCBSP_CONFIG_TYPE4 0x4 -/* McBSP register numbers. Register address offset = num * reg_step */ -enum { - /* Common registers */ - OMAP_MCBSP_REG_SPCR2 = 4, - OMAP_MCBSP_REG_SPCR1, - OMAP_MCBSP_REG_RCR2, - OMAP_MCBSP_REG_RCR1, - OMAP_MCBSP_REG_XCR2, - OMAP_MCBSP_REG_XCR1, - OMAP_MCBSP_REG_SRGR2, - OMAP_MCBSP_REG_SRGR1, - OMAP_MCBSP_REG_MCR2, - OMAP_MCBSP_REG_MCR1, - OMAP_MCBSP_REG_RCERA, - OMAP_MCBSP_REG_RCERB, - OMAP_MCBSP_REG_XCERA, - OMAP_MCBSP_REG_XCERB, - OMAP_MCBSP_REG_PCR0, - OMAP_MCBSP_REG_RCERC, - OMAP_MCBSP_REG_RCERD, - OMAP_MCBSP_REG_XCERC, - OMAP_MCBSP_REG_XCERD, - OMAP_MCBSP_REG_RCERE, - OMAP_MCBSP_REG_RCERF, - OMAP_MCBSP_REG_XCERE, - OMAP_MCBSP_REG_XCERF, - OMAP_MCBSP_REG_RCERG, - OMAP_MCBSP_REG_RCERH, - OMAP_MCBSP_REG_XCERG, - OMAP_MCBSP_REG_XCERH, - - /* OMAP1-OMAP2420 registers */ - OMAP_MCBSP_REG_DRR2 = 0, - OMAP_MCBSP_REG_DRR1, - OMAP_MCBSP_REG_DXR2, - OMAP_MCBSP_REG_DXR1, - - /* OMAP2430 and onwards */ - OMAP_MCBSP_REG_DRR = 0, - OMAP_MCBSP_REG_DXR = 2, - OMAP_MCBSP_REG_SYSCON = 35, - OMAP_MCBSP_REG_THRSH2, - OMAP_MCBSP_REG_THRSH1, - OMAP_MCBSP_REG_IRQST = 40, - OMAP_MCBSP_REG_IRQEN, - OMAP_MCBSP_REG_WAKEUPEN, - OMAP_MCBSP_REG_XCCR, - OMAP_MCBSP_REG_RCCR, - OMAP_MCBSP_REG_XBUFFSTAT, - OMAP_MCBSP_REG_RBUFFSTAT, - OMAP_MCBSP_REG_SSELCR, -}; - -/* OMAP3 sidetone control registers */ -#define OMAP_ST_REG_REV 0x00 -#define OMAP_ST_REG_SYSCONFIG 0x10 -#define OMAP_ST_REG_IRQSTATUS 0x18 -#define OMAP_ST_REG_IRQENABLE 0x1C -#define OMAP_ST_REG_SGAINCR 0x24 -#define OMAP_ST_REG_SFIRCR 0x28 -#define OMAP_ST_REG_SSELCR 0x2C - -/************************** McBSP SPCR1 bit definitions ***********************/ -#define RRST 0x0001 -#define RRDY 0x0002 -#define RFULL 0x0004 -#define RSYNC_ERR 0x0008 -#define RINTM(value) ((value)<<4) /* bits 4:5 */ -#define ABIS 0x0040 -#define DXENA 0x0080 -#define CLKSTP(value) ((value)<<11) /* bits 11:12 */ -#define RJUST(value) ((value)<<13) /* bits 13:14 */ -#define ALB 0x8000 -#define DLB 0x8000 - -/************************** McBSP SPCR2 bit definitions ***********************/ -#define XRST 0x0001 -#define XRDY 0x0002 -#define XEMPTY 0x0004 -#define XSYNC_ERR 0x0008 -#define XINTM(value) ((value)<<4) /* bits 4:5 */ -#define GRST 0x0040 -#define FRST 0x0080 -#define SOFT 0x0100 -#define FREE 0x0200 - -/************************** McBSP PCR bit definitions *************************/ -#define CLKRP 0x0001 -#define CLKXP 0x0002 -#define FSRP 0x0004 -#define FSXP 0x0008 -#define DR_STAT 0x0010 -#define DX_STAT 0x0020 -#define CLKS_STAT 0x0040 -#define SCLKME 0x0080 -#define CLKRM 0x0100 -#define CLKXM 0x0200 -#define FSRM 0x0400 -#define FSXM 0x0800 -#define RIOEN 0x1000 -#define XIOEN 0x2000 -#define IDLE_EN 0x4000 - -/************************** McBSP RCR1 bit definitions ************************/ -#define RWDLEN1(value) ((value)<<5) /* Bits 5:7 */ -#define RFRLEN1(value) ((value)<<8) /* Bits 8:14 */ - -/************************** McBSP XCR1 bit definitions ************************/ -#define XWDLEN1(value) ((value)<<5) /* Bits 5:7 */ -#define XFRLEN1(value) ((value)<<8) /* Bits 8:14 */ - -/*************************** McBSP RCR2 bit definitions ***********************/ -#define RDATDLY(value) (value) /* Bits 0:1 */ -#define RFIG 0x0004 -#define RCOMPAND(value) ((value)<<3) /* Bits 3:4 */ -#define RWDLEN2(value) ((value)<<5) /* Bits 5:7 */ -#define RFRLEN2(value) ((value)<<8) /* Bits 8:14 */ -#define RPHASE 0x8000 - -/*************************** McBSP XCR2 bit definitions ***********************/ -#define XDATDLY(value) (value) /* Bits 0:1 */ -#define XFIG 0x0004 -#define XCOMPAND(value) ((value)<<3) /* Bits 3:4 */ -#define XWDLEN2(value) ((value)<<5) /* Bits 5:7 */ -#define XFRLEN2(value) ((value)<<8) /* Bits 8:14 */ -#define XPHASE 0x8000 - -/************************* McBSP SRGR1 bit definitions ************************/ -#define CLKGDV(value) (value) /* Bits 0:7 */ -#define FWID(value) ((value)<<8) /* Bits 8:15 */ - -/************************* McBSP SRGR2 bit definitions ************************/ -#define FPER(value) (value) /* Bits 0:11 */ -#define FSGM 0x1000 -#define CLKSM 0x2000 -#define CLKSP 0x4000 -#define GSYNC 0x8000 - -/************************* McBSP MCR1 bit definitions *************************/ -#define RMCM 0x0001 -#define RCBLK(value) ((value)<<2) /* Bits 2:4 */ -#define RPABLK(value) ((value)<<5) /* Bits 5:6 */ -#define RPBBLK(value) ((value)<<7) /* Bits 7:8 */ - -/************************* McBSP MCR2 bit definitions *************************/ -#define XMCM(value) (value) /* Bits 0:1 */ -#define XCBLK(value) ((value)<<2) /* Bits 2:4 */ -#define XPABLK(value) ((value)<<5) /* Bits 5:6 */ -#define XPBBLK(value) ((value)<<7) /* Bits 7:8 */ - -/*********************** McBSP XCCR bit definitions *************************/ -#define EXTCLKGATE 0x8000 -#define PPCONNECT 0x4000 -#define DXENDLY(value) ((value)<<12) /* Bits 12:13 */ -#define XFULL_CYCLE 0x0800 -#define DILB 0x0020 -#define XDMAEN 0x0008 -#define XDISABLE 0x0001 - -/********************** McBSP RCCR bit definitions *************************/ -#define RFULL_CYCLE 0x0800 -#define RDMAEN 0x0008 -#define RDISABLE 0x0001 - -/********************** McBSP SYSCONFIG bit definitions ********************/ -#define CLOCKACTIVITY(value) ((value)<<8) -#define SIDLEMODE(value) ((value)<<3) -#define ENAWAKEUP 0x0004 -#define SOFTRST 0x0002 - -/********************** McBSP SSELCR bit definitions ***********************/ -#define SIDETONEEN 0x0400 - -/********************** McBSP Sidetone SYSCONFIG bit definitions ***********/ -#define ST_AUTOIDLE 0x0001 - -/********************** McBSP Sidetone SGAINCR bit definitions *************/ -#define ST_CH1GAIN(value) ((value<<16)) /* Bits 16:31 */ -#define ST_CH0GAIN(value) (value) /* Bits 0:15 */ - -/********************** McBSP Sidetone SFIRCR bit definitions **************/ -#define ST_FIRCOEFF(value) (value) /* Bits 0:15 */ - -/********************** McBSP Sidetone SSELCR bit definitions **************/ -#define ST_COEFFWRDONE 0x0004 -#define ST_COEFFWREN 0x0002 -#define ST_SIDETONEEN 0x0001 - -/********************** McBSP DMA operating modes **************************/ -#define MCBSP_DMA_MODE_ELEMENT 0 -#define MCBSP_DMA_MODE_THRESHOLD 1 -#define MCBSP_DMA_MODE_FRAME 2 - -/********************** McBSP WAKEUPEN bit definitions *********************/ -#define XEMPTYEOFEN 0x4000 -#define XRDYEN 0x0400 -#define XEOFEN 0x0200 -#define XFSXEN 0x0100 -#define XSYNCERREN 0x0080 -#define RRDYEN 0x0008 -#define REOFEN 0x0004 -#define RFSREN 0x0002 -#define RSYNCERREN 0x0001 - /* CLKR signal muxing options */ #define CLKR_SRC_CLKR 0 #define CLKR_SRC_CLKX 1 @@ -254,44 +50,6 @@ enum { #define MCBSP_CLKS_PRCM_SRC 0 #define MCBSP_CLKS_PAD_SRC 1 -/* we don't do multichannel for now */ -struct omap_mcbsp_reg_cfg { - u16 spcr2; - u16 spcr1; - u16 rcr2; - u16 rcr1; - u16 xcr2; - u16 xcr1; - u16 srgr2; - u16 srgr1; - u16 mcr2; - u16 mcr1; - u16 pcr0; - u16 rcerc; - u16 rcerd; - u16 xcerc; - u16 xcerd; - u16 rcere; - u16 rcerf; - u16 xcere; - u16 xcerf; - u16 rcerg; - u16 rcerh; - u16 xcerg; - u16 xcerh; - u16 xccr; - u16 rccr; -}; - -typedef enum { - OMAP_MCBSP_WORD_8 = 0, - OMAP_MCBSP_WORD_12, - OMAP_MCBSP_WORD_16, - OMAP_MCBSP_WORD_20, - OMAP_MCBSP_WORD_24, - OMAP_MCBSP_WORD_32, -} omap_mcbsp_word_length; - /* Platform specific configuration */ struct omap_mcbsp_ops { void (*request)(unsigned int); @@ -360,35 +118,4 @@ struct omap_mcbsp_dev_attr { extern struct omap_mcbsp **mcbsp_ptr; extern int omap_mcbsp_count; -void omap_mcbsp_config(unsigned int id, const struct omap_mcbsp_reg_cfg * config); -void omap_mcbsp_set_tx_threshold(unsigned int id, u16 threshold); -void omap_mcbsp_set_rx_threshold(unsigned int id, u16 threshold); -u16 omap_mcbsp_get_max_tx_threshold(unsigned int id); -u16 omap_mcbsp_get_max_rx_threshold(unsigned int id); -u16 omap_mcbsp_get_fifo_size(unsigned int id); -u16 omap_mcbsp_get_tx_delay(unsigned int id); -u16 omap_mcbsp_get_rx_delay(unsigned int id); -int omap_mcbsp_get_dma_op_mode(unsigned int id); -int omap_mcbsp_request(unsigned int id); -void omap_mcbsp_free(unsigned int id); -void omap_mcbsp_start(unsigned int id, int tx, int rx); -void omap_mcbsp_stop(unsigned int id, int tx, int rx); - -/* McBSP functional clock source changing function */ -extern int omap2_mcbsp_set_clks_src(u8 id, u8 fck_src_id); - -/* McBSP signal muxing API */ -void omap2_mcbsp1_mux_clkr_src(u8 mux); -void omap2_mcbsp1_mux_fsr_src(u8 mux); - -int omap_mcbsp_dma_ch_params(unsigned int id, unsigned int stream); -int omap_mcbsp_dma_reg_params(unsigned int id, unsigned int stream); - -/* Sidetone specific API */ -int omap_st_set_chgain(unsigned int id, int channel, s16 chgain); -int omap_st_get_chgain(unsigned int id, int channel, s16 *chgain); -int omap_st_enable(unsigned int id); -int omap_st_disable(unsigned int id); -int omap_st_is_enabled(unsigned int id); - #endif diff --git a/sound/soc/omap/mcbsp.c b/sound/soc/omap/mcbsp.c index 36d83b0c9f0..20d46bf3626 100644 --- a/sound/soc/omap/mcbsp.c +++ b/sound/soc/omap/mcbsp.c @@ -28,6 +28,8 @@ #include #include +#include "mcbsp.h" + struct omap_mcbsp **mcbsp_ptr; int omap_mcbsp_count; diff --git a/sound/soc/omap/mcbsp.h b/sound/soc/omap/mcbsp.h new file mode 100644 index 00000000000..5590ab271ee --- /dev/null +++ b/sound/soc/omap/mcbsp.h @@ -0,0 +1,292 @@ +/* + * sound/soc/omap/mcbsp.h + * + * OMAP Multi-Channel Buffered Serial Port + * + * Contact: Jarkko Nikula + * Peter Ujfalusi + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + */ +#ifndef __ASOC_MCBSP_H +#define __ASOC_MCBSP_H + +/* McBSP register numbers. Register address offset = num * reg_step */ +enum { + /* Common registers */ + OMAP_MCBSP_REG_SPCR2 = 4, + OMAP_MCBSP_REG_SPCR1, + OMAP_MCBSP_REG_RCR2, + OMAP_MCBSP_REG_RCR1, + OMAP_MCBSP_REG_XCR2, + OMAP_MCBSP_REG_XCR1, + OMAP_MCBSP_REG_SRGR2, + OMAP_MCBSP_REG_SRGR1, + OMAP_MCBSP_REG_MCR2, + OMAP_MCBSP_REG_MCR1, + OMAP_MCBSP_REG_RCERA, + OMAP_MCBSP_REG_RCERB, + OMAP_MCBSP_REG_XCERA, + OMAP_MCBSP_REG_XCERB, + OMAP_MCBSP_REG_PCR0, + OMAP_MCBSP_REG_RCERC, + OMAP_MCBSP_REG_RCERD, + OMAP_MCBSP_REG_XCERC, + OMAP_MCBSP_REG_XCERD, + OMAP_MCBSP_REG_RCERE, + OMAP_MCBSP_REG_RCERF, + OMAP_MCBSP_REG_XCERE, + OMAP_MCBSP_REG_XCERF, + OMAP_MCBSP_REG_RCERG, + OMAP_MCBSP_REG_RCERH, + OMAP_MCBSP_REG_XCERG, + OMAP_MCBSP_REG_XCERH, + + /* OMAP1-OMAP2420 registers */ + OMAP_MCBSP_REG_DRR2 = 0, + OMAP_MCBSP_REG_DRR1, + OMAP_MCBSP_REG_DXR2, + OMAP_MCBSP_REG_DXR1, + + /* OMAP2430 and onwards */ + OMAP_MCBSP_REG_DRR = 0, + OMAP_MCBSP_REG_DXR = 2, + OMAP_MCBSP_REG_SYSCON = 35, + OMAP_MCBSP_REG_THRSH2, + OMAP_MCBSP_REG_THRSH1, + OMAP_MCBSP_REG_IRQST = 40, + OMAP_MCBSP_REG_IRQEN, + OMAP_MCBSP_REG_WAKEUPEN, + OMAP_MCBSP_REG_XCCR, + OMAP_MCBSP_REG_RCCR, + OMAP_MCBSP_REG_XBUFFSTAT, + OMAP_MCBSP_REG_RBUFFSTAT, + OMAP_MCBSP_REG_SSELCR, +}; + +/* OMAP3 sidetone control registers */ +#define OMAP_ST_REG_REV 0x00 +#define OMAP_ST_REG_SYSCONFIG 0x10 +#define OMAP_ST_REG_IRQSTATUS 0x18 +#define OMAP_ST_REG_IRQENABLE 0x1C +#define OMAP_ST_REG_SGAINCR 0x24 +#define OMAP_ST_REG_SFIRCR 0x28 +#define OMAP_ST_REG_SSELCR 0x2C + +/************************** McBSP SPCR1 bit definitions ***********************/ +#define RRST 0x0001 +#define RRDY 0x0002 +#define RFULL 0x0004 +#define RSYNC_ERR 0x0008 +#define RINTM(value) ((value)<<4) /* bits 4:5 */ +#define ABIS 0x0040 +#define DXENA 0x0080 +#define CLKSTP(value) ((value)<<11) /* bits 11:12 */ +#define RJUST(value) ((value)<<13) /* bits 13:14 */ +#define ALB 0x8000 +#define DLB 0x8000 + +/************************** McBSP SPCR2 bit definitions ***********************/ +#define XRST 0x0001 +#define XRDY 0x0002 +#define XEMPTY 0x0004 +#define XSYNC_ERR 0x0008 +#define XINTM(value) ((value)<<4) /* bits 4:5 */ +#define GRST 0x0040 +#define FRST 0x0080 +#define SOFT 0x0100 +#define FREE 0x0200 + +/************************** McBSP PCR bit definitions *************************/ +#define CLKRP 0x0001 +#define CLKXP 0x0002 +#define FSRP 0x0004 +#define FSXP 0x0008 +#define DR_STAT 0x0010 +#define DX_STAT 0x0020 +#define CLKS_STAT 0x0040 +#define SCLKME 0x0080 +#define CLKRM 0x0100 +#define CLKXM 0x0200 +#define FSRM 0x0400 +#define FSXM 0x0800 +#define RIOEN 0x1000 +#define XIOEN 0x2000 +#define IDLE_EN 0x4000 + +/************************** McBSP RCR1 bit definitions ************************/ +#define RWDLEN1(value) ((value)<<5) /* Bits 5:7 */ +#define RFRLEN1(value) ((value)<<8) /* Bits 8:14 */ + +/************************** McBSP XCR1 bit definitions ************************/ +#define XWDLEN1(value) ((value)<<5) /* Bits 5:7 */ +#define XFRLEN1(value) ((value)<<8) /* Bits 8:14 */ + +/*************************** McBSP RCR2 bit definitions ***********************/ +#define RDATDLY(value) (value) /* Bits 0:1 */ +#define RFIG 0x0004 +#define RCOMPAND(value) ((value)<<3) /* Bits 3:4 */ +#define RWDLEN2(value) ((value)<<5) /* Bits 5:7 */ +#define RFRLEN2(value) ((value)<<8) /* Bits 8:14 */ +#define RPHASE 0x8000 + +/*************************** McBSP XCR2 bit definitions ***********************/ +#define XDATDLY(value) (value) /* Bits 0:1 */ +#define XFIG 0x0004 +#define XCOMPAND(value) ((value)<<3) /* Bits 3:4 */ +#define XWDLEN2(value) ((value)<<5) /* Bits 5:7 */ +#define XFRLEN2(value) ((value)<<8) /* Bits 8:14 */ +#define XPHASE 0x8000 + +/************************* McBSP SRGR1 bit definitions ************************/ +#define CLKGDV(value) (value) /* Bits 0:7 */ +#define FWID(value) ((value)<<8) /* Bits 8:15 */ + +/************************* McBSP SRGR2 bit definitions ************************/ +#define FPER(value) (value) /* Bits 0:11 */ +#define FSGM 0x1000 +#define CLKSM 0x2000 +#define CLKSP 0x4000 +#define GSYNC 0x8000 + +/************************* McBSP MCR1 bit definitions *************************/ +#define RMCM 0x0001 +#define RCBLK(value) ((value)<<2) /* Bits 2:4 */ +#define RPABLK(value) ((value)<<5) /* Bits 5:6 */ +#define RPBBLK(value) ((value)<<7) /* Bits 7:8 */ + +/************************* McBSP MCR2 bit definitions *************************/ +#define XMCM(value) (value) /* Bits 0:1 */ +#define XCBLK(value) ((value)<<2) /* Bits 2:4 */ +#define XPABLK(value) ((value)<<5) /* Bits 5:6 */ +#define XPBBLK(value) ((value)<<7) /* Bits 7:8 */ + +/*********************** McBSP XCCR bit definitions *************************/ +#define EXTCLKGATE 0x8000 +#define PPCONNECT 0x4000 +#define DXENDLY(value) ((value)<<12) /* Bits 12:13 */ +#define XFULL_CYCLE 0x0800 +#define DILB 0x0020 +#define XDMAEN 0x0008 +#define XDISABLE 0x0001 + +/********************** McBSP RCCR bit definitions *************************/ +#define RFULL_CYCLE 0x0800 +#define RDMAEN 0x0008 +#define RDISABLE 0x0001 + +/********************** McBSP SYSCONFIG bit definitions ********************/ +#define CLOCKACTIVITY(value) ((value)<<8) +#define SIDLEMODE(value) ((value)<<3) +#define ENAWAKEUP 0x0004 +#define SOFTRST 0x0002 + +/********************** McBSP SSELCR bit definitions ***********************/ +#define SIDETONEEN 0x0400 + +/********************** McBSP Sidetone SYSCONFIG bit definitions ***********/ +#define ST_AUTOIDLE 0x0001 + +/********************** McBSP Sidetone SGAINCR bit definitions *************/ +#define ST_CH1GAIN(value) ((value<<16)) /* Bits 16:31 */ +#define ST_CH0GAIN(value) (value) /* Bits 0:15 */ + +/********************** McBSP Sidetone SFIRCR bit definitions **************/ +#define ST_FIRCOEFF(value) (value) /* Bits 0:15 */ + +/********************** McBSP Sidetone SSELCR bit definitions **************/ +#define ST_COEFFWRDONE 0x0004 +#define ST_COEFFWREN 0x0002 +#define ST_SIDETONEEN 0x0001 + +/********************** McBSP DMA operating modes **************************/ +#define MCBSP_DMA_MODE_ELEMENT 0 +#define MCBSP_DMA_MODE_THRESHOLD 1 +#define MCBSP_DMA_MODE_FRAME 2 + +/********************** McBSP WAKEUPEN bit definitions *********************/ +#define XEMPTYEOFEN 0x4000 +#define XRDYEN 0x0400 +#define XEOFEN 0x0200 +#define XFSXEN 0x0100 +#define XSYNCERREN 0x0080 +#define RRDYEN 0x0008 +#define REOFEN 0x0004 +#define RFSREN 0x0002 +#define RSYNCERREN 0x0001 + +/* we don't do multichannel for now */ +struct omap_mcbsp_reg_cfg { + u16 spcr2; + u16 spcr1; + u16 rcr2; + u16 rcr1; + u16 xcr2; + u16 xcr1; + u16 srgr2; + u16 srgr1; + u16 mcr2; + u16 mcr1; + u16 pcr0; + u16 rcerc; + u16 rcerd; + u16 xcerc; + u16 xcerd; + u16 rcere; + u16 rcerf; + u16 xcere; + u16 xcerf; + u16 rcerg; + u16 rcerh; + u16 xcerg; + u16 xcerh; + u16 xccr; + u16 rccr; +}; + +void omap_mcbsp_config(unsigned int id, + const struct omap_mcbsp_reg_cfg *config); +void omap_mcbsp_set_tx_threshold(unsigned int id, u16 threshold); +void omap_mcbsp_set_rx_threshold(unsigned int id, u16 threshold); +u16 omap_mcbsp_get_max_tx_threshold(unsigned int id); +u16 omap_mcbsp_get_max_rx_threshold(unsigned int id); +u16 omap_mcbsp_get_fifo_size(unsigned int id); +u16 omap_mcbsp_get_tx_delay(unsigned int id); +u16 omap_mcbsp_get_rx_delay(unsigned int id); +int omap_mcbsp_get_dma_op_mode(unsigned int id); +int omap_mcbsp_request(unsigned int id); +void omap_mcbsp_free(unsigned int id); +void omap_mcbsp_start(unsigned int id, int tx, int rx); +void omap_mcbsp_stop(unsigned int id, int tx, int rx); + +/* McBSP functional clock source changing function */ +int omap2_mcbsp_set_clks_src(u8 id, u8 fck_src_id); + +/* McBSP signal muxing API */ +void omap2_mcbsp1_mux_clkr_src(u8 mux); +void omap2_mcbsp1_mux_fsr_src(u8 mux); + +int omap_mcbsp_dma_ch_params(unsigned int id, unsigned int stream); +int omap_mcbsp_dma_reg_params(unsigned int id, unsigned int stream); + +/* Sidetone specific API */ +int omap_st_set_chgain(unsigned int id, int channel, s16 chgain); +int omap_st_get_chgain(unsigned int id, int channel, s16 *chgain); +int omap_st_enable(unsigned int id); +int omap_st_disable(unsigned int id); +int omap_st_is_enabled(unsigned int id); + +#endif /* __ASOC_MCBSP_H */ diff --git a/sound/soc/omap/omap-mcbsp.c b/sound/soc/omap/omap-mcbsp.c index 1287b870f22..f1318c1d4e1 100644 --- a/sound/soc/omap/omap-mcbsp.c +++ b/sound/soc/omap/omap-mcbsp.c @@ -33,6 +33,7 @@ #include #include +#include "mcbsp.h" #include "omap-mcbsp.h" #include "omap-pcm.h" @@ -46,6 +47,15 @@ .private_value = (unsigned long) &(struct soc_mixer_control) \ {.min = xmin, .max = xmax} } +enum { + OMAP_MCBSP_WORD_8 = 0, + OMAP_MCBSP_WORD_12, + OMAP_MCBSP_WORD_16, + OMAP_MCBSP_WORD_20, + OMAP_MCBSP_WORD_24, + OMAP_MCBSP_WORD_32, +}; + struct omap_mcbsp_data { unsigned int bus_id; struct omap_mcbsp_reg_cfg regs; -- cgit v1.2.3 From 45656b44f6d1968d838f3abcf3a264ee9fa2fc62 Mon Sep 17 00:00:00 2001 From: Peter Ujfalusi Date: Tue, 14 Feb 2012 18:20:58 +0200 Subject: ASoC: omap-mcbsp: Create a single driver for McBSP The OMAP McBSP driver stack used to contain two different drivers. One of them was used as kind low-level access to the IP, while the other driver was the ASoC DAI driver. There were global, shared structures, in different places, the McBSP instances are reffered with id numbers (sometimes 0 based, in other cases 1 based id numbers). Create one single driver for OMAP McBSP with name: omap-mcbsp. Convert the old omap-mcbsp driver initially to be a library for the omap-mcbsp DAI driver. With this change we can get rid of all global variables, structures. Further cleanup is coming... Signed-off-by: Peter Ujfalusi Tested-by: Grazvydas Ignotas Tested-by: Janusz Krzysztofik Acked-by: Mark Brown Acked-by: Jarkko Nikula Signed-off-by: Liam Girdwood --- arch/arm/mach-omap1/mcbsp.c | 12 -- arch/arm/mach-omap2/mcbsp.c | 6 - arch/arm/plat-omap/include/plat/mcbsp.h | 40 ----- sound/soc/omap/am3517evm.c | 2 +- sound/soc/omap/ams-delta.c | 2 +- sound/soc/omap/igep0020.c | 2 +- sound/soc/omap/mcbsp.c | 284 +++++--------------------------- sound/soc/omap/mcbsp.h | 104 +++++++++--- sound/soc/omap/n810.c | 2 +- sound/soc/omap/omap-mcbsp.c | 201 +++++++++++----------- sound/soc/omap/omap-mcbsp.h | 2 +- sound/soc/omap/omap-pcm.h | 2 + sound/soc/omap/omap3beagle.c | 2 +- sound/soc/omap/omap3evm.c | 2 +- sound/soc/omap/omap3pandora.c | 4 +- sound/soc/omap/osk5912.c | 2 +- sound/soc/omap/overo.c | 2 +- sound/soc/omap/rx51.c | 4 +- sound/soc/omap/sdp3430.c | 4 +- sound/soc/omap/zoom2.c | 4 +- 20 files changed, 234 insertions(+), 449 deletions(-) (limited to 'arch/arm/plat-omap') diff --git a/arch/arm/mach-omap1/mcbsp.c b/arch/arm/mach-omap1/mcbsp.c index fe11e135730..3e8410a9999 100644 --- a/arch/arm/mach-omap1/mcbsp.c +++ b/arch/arm/mach-omap1/mcbsp.c @@ -419,18 +419,6 @@ static int __init omap1_mcbsp_init(void) if (!cpu_class_is_omap1()) return -ENODEV; - if (cpu_is_omap7xx()) - omap_mcbsp_count = OMAP7XX_MCBSP_COUNT; - else if (cpu_is_omap15xx()) - omap_mcbsp_count = OMAP15XX_MCBSP_COUNT; - else if (cpu_is_omap16xx()) - omap_mcbsp_count = OMAP16XX_MCBSP_COUNT; - - mcbsp_ptr = kzalloc(omap_mcbsp_count * sizeof(struct omap_mcbsp *), - GFP_KERNEL); - if (!mcbsp_ptr) - return -ENOMEM; - if (cpu_is_omap7xx()) omap_mcbsp_register_board_cfg(omap7xx_mcbsp_res_0, OMAP7XX_MCBSP_RES_SZ, diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c index b36d443a6fd..49ff5b80454 100644 --- a/arch/arm/mach-omap2/mcbsp.c +++ b/arch/arm/mach-omap2/mcbsp.c @@ -180,7 +180,6 @@ static int omap_init_mcbsp(struct omap_hwmod *oh, void *unused) name, oh->name); return PTR_ERR(pdev); } - omap_mcbsp_count++; return 0; } @@ -188,11 +187,6 @@ static int __init omap2_mcbsp_init(void) { omap_hwmod_for_each_by_class("mcbsp", omap_init_mcbsp, NULL); - mcbsp_ptr = kzalloc(omap_mcbsp_count * sizeof(struct omap_mcbsp *), - GFP_KERNEL); - if (!mcbsp_ptr) - return -ENOMEM; - return 0; } arch_initcall(omap2_mcbsp_init); diff --git a/arch/arm/plat-omap/include/plat/mcbsp.h b/arch/arm/plat-omap/include/plat/mcbsp.h index 1a9e98ff6c8..437e375f05b 100644 --- a/arch/arm/plat-omap/include/plat/mcbsp.h +++ b/arch/arm/plat-omap/include/plat/mcbsp.h @@ -70,43 +70,6 @@ struct omap_mcbsp_platform_data { int (*mux_signal)(struct device *dev, const char *signal, const char *src); }; -struct omap_mcbsp_st_data { - void __iomem *io_base_st; - bool running; - bool enabled; - s16 taps[128]; /* Sidetone filter coefficients */ - int nr_taps; /* Number of filter coefficients in use */ - s16 ch0gain; - s16 ch1gain; -}; - -struct omap_mcbsp { - struct device *dev; - unsigned long phys_base; - unsigned long phys_dma_base; - void __iomem *io_base; - u8 id; - u8 free; - - int rx_irq; - int tx_irq; - - /* DMA stuff */ - u8 dma_rx_sync; - u8 dma_tx_sync; - - /* Protect the field .free, while checking if the mcbsp is in use */ - spinlock_t lock; - struct omap_mcbsp_platform_data *pdata; - struct clk *fclk; - struct omap_mcbsp_st_data *st_data; - int dma_op_mode; - u16 max_tx_thres; - u16 max_rx_thres; - void *reg_cache; - int reg_cache_size; -}; - /** * omap_mcbsp_dev_attr - OMAP McBSP device attributes for omap_hwmod * @sidetone: name of the sidetone device @@ -115,7 +78,4 @@ struct omap_mcbsp_dev_attr { const char *sidetone; }; -extern struct omap_mcbsp **mcbsp_ptr; -extern int omap_mcbsp_count; - #endif diff --git a/sound/soc/omap/am3517evm.c b/sound/soc/omap/am3517evm.c index add4866d7e6..009533ab8d1 100644 --- a/sound/soc/omap/am3517evm.c +++ b/sound/soc/omap/am3517evm.c @@ -95,7 +95,7 @@ static const struct snd_soc_dapm_route audio_map[] = { static struct snd_soc_dai_link am3517evm_dai = { .name = "TLV320AIC23", .stream_name = "AIC23", - .cpu_dai_name ="omap-mcbsp-dai.0", + .cpu_dai_name = "omap-mcbsp.1", .codec_dai_name = "tlv320aic23-hifi", .platform_name = "omap-pcm-audio", .codec_name = "tlv320aic23-codec.2-001a", diff --git a/sound/soc/omap/ams-delta.c b/sound/soc/omap/ams-delta.c index 78563bbbbf0..49fe63ce51f 100644 --- a/sound/soc/omap/ams-delta.c +++ b/sound/soc/omap/ams-delta.c @@ -584,7 +584,7 @@ static int ams_delta_cx20442_init(struct snd_soc_pcm_runtime *rtd) static struct snd_soc_dai_link ams_delta_dai_link = { .name = "CX20442", .stream_name = "CX20442", - .cpu_dai_name ="omap-mcbsp-dai.0", + .cpu_dai_name = "omap-mcbsp.1", .codec_dai_name = "cx20442-voice", .init = ams_delta_cx20442_init, .platform_name = "omap-pcm-audio", diff --git a/sound/soc/omap/igep0020.c b/sound/soc/omap/igep0020.c index ccae58a1339..e8357819175 100644 --- a/sound/soc/omap/igep0020.c +++ b/sound/soc/omap/igep0020.c @@ -60,7 +60,7 @@ static struct snd_soc_ops igep2_ops = { static struct snd_soc_dai_link igep2_dai = { .name = "TWL4030", .stream_name = "TWL4030", - .cpu_dai_name = "omap-mcbsp-dai.1", + .cpu_dai_name = "omap-mcbsp.2", .codec_dai_name = "twl4030-hifi", .platform_name = "omap-pcm-audio", .codec_name = "twl4030-codec", diff --git a/sound/soc/omap/mcbsp.c b/sound/soc/omap/mcbsp.c index 20d46bf3626..be92a28e19e 100644 --- a/sound/soc/omap/mcbsp.c +++ b/sound/soc/omap/mcbsp.c @@ -30,12 +30,6 @@ #include "mcbsp.h" -struct omap_mcbsp **mcbsp_ptr; -int omap_mcbsp_count; - -#define omap_mcbsp_check_valid_id(id) (id < omap_mcbsp_count) -#define id_to_mcbsp_ptr(id) mcbsp_ptr[id]; - static void omap_mcbsp_write(struct omap_mcbsp *mcbsp, u16 reg, u32 val) { void __iomem *addr = mcbsp->io_base + reg * mcbsp->pdata->reg_step; @@ -84,10 +78,8 @@ static int omap_mcbsp_st_read(struct omap_mcbsp *mcbsp, u16 reg) #define MCBSP_ST_WRITE(mcbsp, reg, val) \ omap_mcbsp_st_write(mcbsp, OMAP_ST_REG_##reg, val) -static void omap_mcbsp_dump_reg(u8 id) +static void omap_mcbsp_dump_reg(struct omap_mcbsp *mcbsp) { - struct omap_mcbsp *mcbsp = id_to_mcbsp_ptr(id); - dev_dbg(mcbsp->dev, "**** McBSP%d regs ****\n", mcbsp->id); dev_dbg(mcbsp->dev, "DRR2: 0x%04x\n", MCBSP_READ(mcbsp, DRR2)); @@ -160,16 +152,9 @@ static irqreturn_t omap_mcbsp_rx_irq_handler(int irq, void *dev_id) * You either call this function or set the McBSP registers * by yourself before calling omap_mcbsp_start(). */ -void omap_mcbsp_config(unsigned int id, const struct omap_mcbsp_reg_cfg *config) +void omap_mcbsp_config(struct omap_mcbsp *mcbsp, + const struct omap_mcbsp_reg_cfg *config) { - struct omap_mcbsp *mcbsp; - - if (!omap_mcbsp_check_valid_id(id)) { - printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); - return; - } - mcbsp = id_to_mcbsp_ptr(id); - dev_dbg(mcbsp->dev, "Configuring McBSP%d phys_base: 0x%08lx\n", mcbsp->id, mcbsp->phys_base); @@ -190,7 +175,6 @@ void omap_mcbsp_config(unsigned int id, const struct omap_mcbsp_reg_cfg *config) MCBSP_WRITE(mcbsp, RCCR, config->rccr); } } -EXPORT_SYMBOL(omap_mcbsp_config); /** * omap_mcbsp_dma_params - returns the dma channel number @@ -200,22 +184,13 @@ EXPORT_SYMBOL(omap_mcbsp_config); * Returns the dma channel number for the rx channel or tx channel * based on the value of @stream for the requested mcbsp given by @id */ -int omap_mcbsp_dma_ch_params(unsigned int id, unsigned int stream) +int omap_mcbsp_dma_ch_params(struct omap_mcbsp *mcbsp, unsigned int stream) { - struct omap_mcbsp *mcbsp; - - if (!omap_mcbsp_check_valid_id(id)) { - printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); - return -ENODEV; - } - mcbsp = id_to_mcbsp_ptr(id); - if (stream) return mcbsp->dma_rx_sync; else return mcbsp->dma_tx_sync; } -EXPORT_SYMBOL(omap_mcbsp_dma_ch_params); /** * omap_mcbsp_dma_reg_params - returns the address of mcbsp data register @@ -226,17 +201,10 @@ EXPORT_SYMBOL(omap_mcbsp_dma_ch_params); * to be used by DMA for transferring/receiving data based on the value of * @stream for the requested mcbsp given by @id */ -int omap_mcbsp_dma_reg_params(unsigned int id, unsigned int stream) +int omap_mcbsp_dma_reg_params(struct omap_mcbsp *mcbsp, unsigned int stream) { - struct omap_mcbsp *mcbsp; int data_reg; - if (!omap_mcbsp_check_valid_id(id)) { - printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); - return -ENODEV; - } - mcbsp = id_to_mcbsp_ptr(id); - if (mcbsp->pdata->reg_size == 2) { if (stream) data_reg = OMAP_MCBSP_REG_DRR1; @@ -251,7 +219,6 @@ int omap_mcbsp_dma_reg_params(unsigned int id, unsigned int stream) return mcbsp->phys_dma_base + data_reg * mcbsp->pdata->reg_step; } -EXPORT_SYMBOL(omap_mcbsp_dma_reg_params); static void omap_st_on(struct omap_mcbsp *mcbsp) { @@ -320,18 +287,11 @@ static void omap_st_chgain(struct omap_mcbsp *mcbsp) ST_CH1GAIN(st_data->ch1gain)); } -int omap_st_set_chgain(unsigned int id, int channel, s16 chgain) +int omap_st_set_chgain(struct omap_mcbsp *mcbsp, int channel, s16 chgain) { - struct omap_mcbsp *mcbsp; struct omap_mcbsp_st_data *st_data; int ret = 0; - if (!omap_mcbsp_check_valid_id(id)) { - printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); - return -ENODEV; - } - - mcbsp = id_to_mcbsp_ptr(id); st_data = mcbsp->st_data; if (!st_data) @@ -351,20 +311,12 @@ int omap_st_set_chgain(unsigned int id, int channel, s16 chgain) return ret; } -EXPORT_SYMBOL(omap_st_set_chgain); -int omap_st_get_chgain(unsigned int id, int channel, s16 *chgain) +int omap_st_get_chgain(struct omap_mcbsp *mcbsp, int channel, s16 *chgain) { - struct omap_mcbsp *mcbsp; struct omap_mcbsp_st_data *st_data; int ret = 0; - if (!omap_mcbsp_check_valid_id(id)) { - printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); - return -ENODEV; - } - - mcbsp = id_to_mcbsp_ptr(id); st_data = mcbsp->st_data; if (!st_data) @@ -381,7 +333,6 @@ int omap_st_get_chgain(unsigned int id, int channel, s16 *chgain) return ret; } -EXPORT_SYMBOL(omap_st_get_chgain); static int omap_st_start(struct omap_mcbsp *mcbsp) { @@ -400,17 +351,10 @@ static int omap_st_start(struct omap_mcbsp *mcbsp) return 0; } -int omap_st_enable(unsigned int id) +int omap_st_enable(struct omap_mcbsp *mcbsp) { - struct omap_mcbsp *mcbsp; struct omap_mcbsp_st_data *st_data; - if (!omap_mcbsp_check_valid_id(id)) { - printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); - return -ENODEV; - } - - mcbsp = id_to_mcbsp_ptr(id); st_data = mcbsp->st_data; if (!st_data) @@ -423,7 +367,6 @@ int omap_st_enable(unsigned int id) return 0; } -EXPORT_SYMBOL(omap_st_enable); static int omap_st_stop(struct omap_mcbsp *mcbsp) { @@ -439,18 +382,11 @@ static int omap_st_stop(struct omap_mcbsp *mcbsp) return 0; } -int omap_st_disable(unsigned int id) +int omap_st_disable(struct omap_mcbsp *mcbsp) { - struct omap_mcbsp *mcbsp; struct omap_mcbsp_st_data *st_data; int ret = 0; - if (!omap_mcbsp_check_valid_id(id)) { - printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); - return -ENODEV; - } - - mcbsp = id_to_mcbsp_ptr(id); st_data = mcbsp->st_data; if (!st_data) @@ -463,19 +399,11 @@ int omap_st_disable(unsigned int id) return ret; } -EXPORT_SYMBOL(omap_st_disable); -int omap_st_is_enabled(unsigned int id) +int omap_st_is_enabled(struct omap_mcbsp *mcbsp) { - struct omap_mcbsp *mcbsp; struct omap_mcbsp_st_data *st_data; - if (!omap_mcbsp_check_valid_id(id)) { - printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); - return -ENODEV; - } - - mcbsp = id_to_mcbsp_ptr(id); st_data = mcbsp->st_data; if (!st_data) @@ -484,115 +412,65 @@ int omap_st_is_enabled(unsigned int id) return st_data->enabled; } -EXPORT_SYMBOL(omap_st_is_enabled); /* * omap_mcbsp_set_rx_threshold configures the transmit threshold in words. * The threshold parameter is 1 based, and it is converted (threshold - 1) * for the THRSH2 register. */ -void omap_mcbsp_set_tx_threshold(unsigned int id, u16 threshold) +void omap_mcbsp_set_tx_threshold(struct omap_mcbsp *mcbsp, u16 threshold) { - struct omap_mcbsp *mcbsp; - - if (!omap_mcbsp_check_valid_id(id)) { - printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); - return; - } - mcbsp = id_to_mcbsp_ptr(id); if (mcbsp->pdata->buffer_size == 0) return; if (threshold && threshold <= mcbsp->max_tx_thres) MCBSP_WRITE(mcbsp, THRSH2, threshold - 1); } -EXPORT_SYMBOL(omap_mcbsp_set_tx_threshold); /* * omap_mcbsp_set_rx_threshold configures the receive threshold in words. * The threshold parameter is 1 based, and it is converted (threshold - 1) * for the THRSH1 register. */ -void omap_mcbsp_set_rx_threshold(unsigned int id, u16 threshold) +void omap_mcbsp_set_rx_threshold(struct omap_mcbsp *mcbsp, u16 threshold) { - struct omap_mcbsp *mcbsp; - - if (!omap_mcbsp_check_valid_id(id)) { - printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); - return; - } - mcbsp = id_to_mcbsp_ptr(id); if (mcbsp->pdata->buffer_size == 0) return; if (threshold && threshold <= mcbsp->max_rx_thres) MCBSP_WRITE(mcbsp, THRSH1, threshold - 1); } -EXPORT_SYMBOL(omap_mcbsp_set_rx_threshold); /* * omap_mcbsp_get_max_tx_thres just return the current configured * maximum threshold for transmission */ -u16 omap_mcbsp_get_max_tx_threshold(unsigned int id) +u16 omap_mcbsp_get_max_tx_threshold(struct omap_mcbsp *mcbsp) { - struct omap_mcbsp *mcbsp; - - if (!omap_mcbsp_check_valid_id(id)) { - printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); - return -ENODEV; - } - mcbsp = id_to_mcbsp_ptr(id); - return mcbsp->max_tx_thres; } -EXPORT_SYMBOL(omap_mcbsp_get_max_tx_threshold); /* * omap_mcbsp_get_max_rx_thres just return the current configured * maximum threshold for reception */ -u16 omap_mcbsp_get_max_rx_threshold(unsigned int id) +u16 omap_mcbsp_get_max_rx_threshold(struct omap_mcbsp *mcbsp) { - struct omap_mcbsp *mcbsp; - - if (!omap_mcbsp_check_valid_id(id)) { - printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); - return -ENODEV; - } - mcbsp = id_to_mcbsp_ptr(id); - return mcbsp->max_rx_thres; } -EXPORT_SYMBOL(omap_mcbsp_get_max_rx_threshold); -u16 omap_mcbsp_get_fifo_size(unsigned int id) +u16 omap_mcbsp_get_fifo_size(struct omap_mcbsp *mcbsp) { - struct omap_mcbsp *mcbsp; - - if (!omap_mcbsp_check_valid_id(id)) { - printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); - return -ENODEV; - } - mcbsp = id_to_mcbsp_ptr(id); - return mcbsp->pdata->buffer_size; } -EXPORT_SYMBOL(omap_mcbsp_get_fifo_size); /* * omap_mcbsp_get_tx_delay returns the number of used slots in the McBSP FIFO */ -u16 omap_mcbsp_get_tx_delay(unsigned int id) +u16 omap_mcbsp_get_tx_delay(struct omap_mcbsp *mcbsp) { - struct omap_mcbsp *mcbsp; u16 buffstat; - if (!omap_mcbsp_check_valid_id(id)) { - printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); - return -ENODEV; - } - mcbsp = id_to_mcbsp_ptr(id); if (mcbsp->pdata->buffer_size == 0) return 0; @@ -602,22 +480,15 @@ u16 omap_mcbsp_get_tx_delay(unsigned int id) /* Number of slots are different in McBSP ports */ return mcbsp->pdata->buffer_size - buffstat; } -EXPORT_SYMBOL(omap_mcbsp_get_tx_delay); /* * omap_mcbsp_get_rx_delay returns the number of free slots in the McBSP FIFO * to reach the threshold value (when the DMA will be triggered to read it) */ -u16 omap_mcbsp_get_rx_delay(unsigned int id) +u16 omap_mcbsp_get_rx_delay(struct omap_mcbsp *mcbsp) { - struct omap_mcbsp *mcbsp; u16 buffstat, threshold; - if (!omap_mcbsp_check_valid_id(id)) { - printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); - return -ENODEV; - } - mcbsp = id_to_mcbsp_ptr(id); if (mcbsp->pdata->buffer_size == 0) return 0; @@ -632,41 +503,25 @@ u16 omap_mcbsp_get_rx_delay(unsigned int id) else return threshold - buffstat; } -EXPORT_SYMBOL(omap_mcbsp_get_rx_delay); /* * omap_mcbsp_get_dma_op_mode just return the current configured * operating mode for the mcbsp channel */ -int omap_mcbsp_get_dma_op_mode(unsigned int id) +int omap_mcbsp_get_dma_op_mode(struct omap_mcbsp *mcbsp) { - struct omap_mcbsp *mcbsp; int dma_op_mode; - if (!omap_mcbsp_check_valid_id(id)) { - printk(KERN_ERR "%s: Invalid id (%u)\n", __func__, id + 1); - return -ENODEV; - } - mcbsp = id_to_mcbsp_ptr(id); - dma_op_mode = mcbsp->dma_op_mode; return dma_op_mode; } -EXPORT_SYMBOL(omap_mcbsp_get_dma_op_mode); -int omap_mcbsp_request(unsigned int id) +int omap_mcbsp_request(struct omap_mcbsp *mcbsp) { - struct omap_mcbsp *mcbsp; void *reg_cache; int err; - if (!omap_mcbsp_check_valid_id(id)) { - printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); - return -ENODEV; - } - mcbsp = id_to_mcbsp_ptr(id); - reg_cache = kzalloc(mcbsp->reg_cache_size, GFP_KERNEL); if (!reg_cache) { return -ENOMEM; @@ -685,9 +540,7 @@ int omap_mcbsp_request(unsigned int id) spin_unlock(&mcbsp->lock); if (mcbsp->pdata && mcbsp->pdata->ops && mcbsp->pdata->ops->request) - mcbsp->pdata->ops->request(id); - - pm_runtime_get_sync(mcbsp->dev); + mcbsp->pdata->ops->request(mcbsp->id - 1); /* Enable wakeup behavior */ if (mcbsp->pdata->has_wakeup) @@ -726,14 +579,12 @@ err_free_irq: free_irq(mcbsp->tx_irq, (void *)mcbsp); err_clk_disable: if (mcbsp->pdata && mcbsp->pdata->ops && mcbsp->pdata->ops->free) - mcbsp->pdata->ops->free(id); + mcbsp->pdata->ops->free(mcbsp->id - 1); /* Disable wakeup behavior */ if (mcbsp->pdata->has_wakeup) MCBSP_WRITE(mcbsp, WAKEUPEN, 0); - pm_runtime_put_sync(mcbsp->dev); - spin_lock(&mcbsp->lock); mcbsp->free = true; mcbsp->reg_cache = NULL; @@ -743,28 +594,18 @@ err_kfree: return err; } -EXPORT_SYMBOL(omap_mcbsp_request); -void omap_mcbsp_free(unsigned int id) +void omap_mcbsp_free(struct omap_mcbsp *mcbsp) { - struct omap_mcbsp *mcbsp; void *reg_cache; - if (!omap_mcbsp_check_valid_id(id)) { - printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); - return; - } - mcbsp = id_to_mcbsp_ptr(id); - if (mcbsp->pdata && mcbsp->pdata->ops && mcbsp->pdata->ops->free) - mcbsp->pdata->ops->free(id); + mcbsp->pdata->ops->free(mcbsp->id - 1); /* Disable wakeup behavior */ if (mcbsp->pdata->has_wakeup) MCBSP_WRITE(mcbsp, WAKEUPEN, 0); - pm_runtime_put_sync(mcbsp->dev); - if (mcbsp->rx_irq) free_irq(mcbsp->rx_irq, (void *)mcbsp); free_irq(mcbsp->tx_irq, (void *)mcbsp); @@ -782,25 +623,17 @@ void omap_mcbsp_free(unsigned int id) if (reg_cache) kfree(reg_cache); } -EXPORT_SYMBOL(omap_mcbsp_free); /* * Here we start the McBSP, by enabling transmitter, receiver or both. * If no transmitter or receiver is active prior calling, then sample-rate * generator and frame sync are started. */ -void omap_mcbsp_start(unsigned int id, int tx, int rx) +void omap_mcbsp_start(struct omap_mcbsp *mcbsp, int tx, int rx) { - struct omap_mcbsp *mcbsp; int enable_srg = 0; u16 w; - if (!omap_mcbsp_check_valid_id(id)) { - printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); - return; - } - mcbsp = id_to_mcbsp_ptr(id); - if (mcbsp->st_data) omap_st_start(mcbsp); @@ -850,23 +683,14 @@ void omap_mcbsp_start(unsigned int id, int tx, int rx) } /* Dump McBSP Regs */ - omap_mcbsp_dump_reg(id); + omap_mcbsp_dump_reg(mcbsp); } -EXPORT_SYMBOL(omap_mcbsp_start); -void omap_mcbsp_stop(unsigned int id, int tx, int rx) +void omap_mcbsp_stop(struct omap_mcbsp *mcbsp, int tx, int rx) { - struct omap_mcbsp *mcbsp; int idle; u16 w; - if (!omap_mcbsp_check_valid_id(id)) { - printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); - return; - } - - mcbsp = id_to_mcbsp_ptr(id); - /* Reset transmitter */ tx &= 1; if (mcbsp->pdata->has_ccr) { @@ -899,19 +723,11 @@ void omap_mcbsp_stop(unsigned int id, int tx, int rx) if (mcbsp->st_data) omap_st_stop(mcbsp); } -EXPORT_SYMBOL(omap_mcbsp_stop); -int omap2_mcbsp_set_clks_src(u8 id, u8 fck_src_id) +int omap2_mcbsp_set_clks_src(struct omap_mcbsp *mcbsp, u8 fck_src_id) { - struct omap_mcbsp *mcbsp; const char *src; - if (!omap_mcbsp_check_valid_id(id)) { - pr_err("%s: Invalid id (%d)\n", __func__, id + 1); - return -EINVAL; - } - mcbsp = id_to_mcbsp_ptr(id); - if (fck_src_id == MCBSP_CLKS_PAD_SRC) src = "clks_ext"; else if (fck_src_id == MCBSP_CLKS_PRCM_SRC) @@ -924,13 +740,14 @@ int omap2_mcbsp_set_clks_src(u8 id, u8 fck_src_id) else return -EINVAL; } -EXPORT_SYMBOL(omap2_mcbsp_set_clks_src); -void omap2_mcbsp1_mux_clkr_src(u8 mux) +void omap2_mcbsp1_mux_clkr_src(struct omap_mcbsp *mcbsp, u8 mux) { - struct omap_mcbsp *mcbsp; const char *src; + if (mcbsp->id != 1) + return; + if (mux == CLKR_SRC_CLKR) src = "clkr"; else if (mux == CLKR_SRC_CLKX) @@ -938,17 +755,17 @@ void omap2_mcbsp1_mux_clkr_src(u8 mux) else return; - mcbsp = id_to_mcbsp_ptr(0); if (mcbsp->pdata->mux_signal) mcbsp->pdata->mux_signal(mcbsp->dev, "clkr", src); } -EXPORT_SYMBOL(omap2_mcbsp1_mux_clkr_src); -void omap2_mcbsp1_mux_fsr_src(u8 mux) +void omap2_mcbsp1_mux_fsr_src(struct omap_mcbsp *mcbsp, u8 mux) { - struct omap_mcbsp *mcbsp; const char *src; + if (mcbsp->id != 1) + return; + if (mux == FSR_SRC_FSR) src = "fsr"; else if (mux == FSR_SRC_FSX) @@ -956,11 +773,9 @@ void omap2_mcbsp1_mux_fsr_src(u8 mux) else return; - mcbsp = id_to_mcbsp_ptr(0); if (mcbsp->pdata->mux_signal) mcbsp->pdata->mux_signal(mcbsp->dev, "fsr", src); } -EXPORT_SYMBOL(omap2_mcbsp1_mux_fsr_src); #define max_thres(m) (mcbsp->pdata->buffer_size) #define valid_threshold(m, val) ((val) <= max_thres(m)) @@ -1177,11 +992,10 @@ static void __devexit omap_st_remove(struct omap_mcbsp *mcbsp) * McBSP1 and McBSP3 are directly mapped on 1610 and 1510. * 730 has only 2 McBSP, and both of them are MPU peripherals. */ -static int __devinit omap_mcbsp_probe(struct platform_device *pdev) +int __devinit omap_mcbsp_probe(struct platform_device *pdev) { struct omap_mcbsp_platform_data *pdata = pdev->dev.platform_data; struct omap_mcbsp *mcbsp; - int id = pdev->id - 1; struct resource *res; int ret = 0; @@ -1194,12 +1008,6 @@ static int __devinit omap_mcbsp_probe(struct platform_device *pdev) dev_dbg(&pdev->dev, "Initializing OMAP McBSP (%d).\n", pdev->id); - if (id >= omap_mcbsp_count) { - dev_err(&pdev->dev, "Invalid McBSP device id (%d)\n", id); - ret = -EINVAL; - goto exit; - } - mcbsp = kzalloc(sizeof(struct omap_mcbsp), GFP_KERNEL); if (!mcbsp) { ret = -ENOMEM; @@ -1207,7 +1015,7 @@ static int __devinit omap_mcbsp_probe(struct platform_device *pdev) } spin_lock_init(&mcbsp->lock); - mcbsp->id = id + 1; + mcbsp->id = pdev->id; mcbsp->free = true; res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mpu"); @@ -1268,7 +1076,6 @@ static int __devinit omap_mcbsp_probe(struct platform_device *pdev) mcbsp->pdata = pdata; mcbsp->dev = &pdev->dev; - mcbsp_ptr[id] = mcbsp; platform_set_drvdata(pdev, mcbsp); pm_runtime_enable(mcbsp->dev); @@ -1323,7 +1130,7 @@ exit: return ret; } -static int __devexit omap_mcbsp_remove(struct platform_device *pdev) +int __devexit omap_mcbsp_remove(struct platform_device *pdev) { struct omap_mcbsp *mcbsp = platform_get_drvdata(pdev); @@ -1349,18 +1156,3 @@ static int __devexit omap_mcbsp_remove(struct platform_device *pdev) return 0; } - -static struct platform_driver omap_mcbsp_driver = { - .probe = omap_mcbsp_probe, - .remove = __devexit_p(omap_mcbsp_remove), - .driver = { - .name = "omap-mcbsp", - }, -}; - -module_platform_driver(omap_mcbsp_driver); - -MODULE_AUTHOR("Samuel Ortiz "); -MODULE_DESCRIPTION("OMAP McBSP core driver"); -MODULE_LICENSE("GPL"); -MODULE_ALIAS("platform:omap-mcbsp"); diff --git a/sound/soc/omap/mcbsp.h b/sound/soc/omap/mcbsp.h index 5590ab271ee..6d579938a15 100644 --- a/sound/soc/omap/mcbsp.h +++ b/sound/soc/omap/mcbsp.h @@ -24,6 +24,8 @@ #ifndef __ASOC_MCBSP_H #define __ASOC_MCBSP_H +#include "omap-pcm.h" + /* McBSP register numbers. Register address offset = num * reg_step */ enum { /* Common registers */ @@ -257,36 +259,92 @@ struct omap_mcbsp_reg_cfg { u16 rccr; }; -void omap_mcbsp_config(unsigned int id, +struct omap_mcbsp_st_data { + void __iomem *io_base_st; + bool running; + bool enabled; + s16 taps[128]; /* Sidetone filter coefficients */ + int nr_taps; /* Number of filter coefficients in use */ + s16 ch0gain; + s16 ch1gain; +}; + +struct omap_mcbsp_data { + struct omap_mcbsp_reg_cfg regs; + struct omap_pcm_dma_data dma_data[2]; + unsigned int fmt; + /* + * Flags indicating is the bus already activated and configured by + * another substream + */ + int active; + int configured; + unsigned int in_freq; + int clk_div; + int wlen; +}; + +struct omap_mcbsp { + struct device *dev; + unsigned long phys_base; + unsigned long phys_dma_base; + void __iomem *io_base; + u8 id; + u8 free; + + int rx_irq; + int tx_irq; + + /* DMA stuff */ + u8 dma_rx_sync; + u8 dma_tx_sync; + + /* Protect the field .free, while checking if the mcbsp is in use */ + spinlock_t lock; + struct omap_mcbsp_platform_data *pdata; + struct clk *fclk; + struct omap_mcbsp_st_data *st_data; + struct omap_mcbsp_data mcbsp_data; + int dma_op_mode; + u16 max_tx_thres; + u16 max_rx_thres; + void *reg_cache; + int reg_cache_size; +}; + +void omap_mcbsp_config(struct omap_mcbsp *mcbsp, const struct omap_mcbsp_reg_cfg *config); -void omap_mcbsp_set_tx_threshold(unsigned int id, u16 threshold); -void omap_mcbsp_set_rx_threshold(unsigned int id, u16 threshold); -u16 omap_mcbsp_get_max_tx_threshold(unsigned int id); -u16 omap_mcbsp_get_max_rx_threshold(unsigned int id); -u16 omap_mcbsp_get_fifo_size(unsigned int id); -u16 omap_mcbsp_get_tx_delay(unsigned int id); -u16 omap_mcbsp_get_rx_delay(unsigned int id); -int omap_mcbsp_get_dma_op_mode(unsigned int id); -int omap_mcbsp_request(unsigned int id); -void omap_mcbsp_free(unsigned int id); -void omap_mcbsp_start(unsigned int id, int tx, int rx); -void omap_mcbsp_stop(unsigned int id, int tx, int rx); +void omap_mcbsp_set_tx_threshold(struct omap_mcbsp *mcbsp, u16 threshold); +void omap_mcbsp_set_rx_threshold(struct omap_mcbsp *mcbsp, u16 threshold); +u16 omap_mcbsp_get_max_tx_threshold(struct omap_mcbsp *mcbsp); +u16 omap_mcbsp_get_max_rx_threshold(struct omap_mcbsp *mcbsp); +u16 omap_mcbsp_get_fifo_size(struct omap_mcbsp *mcbsp); +u16 omap_mcbsp_get_tx_delay(struct omap_mcbsp *mcbsp); +u16 omap_mcbsp_get_rx_delay(struct omap_mcbsp *mcbsp); +int omap_mcbsp_get_dma_op_mode(struct omap_mcbsp *mcbsp); +int omap_mcbsp_request(struct omap_mcbsp *mcbsp); +void omap_mcbsp_free(struct omap_mcbsp *mcbsp); +void omap_mcbsp_start(struct omap_mcbsp *mcbsp, int tx, int rx); +void omap_mcbsp_stop(struct omap_mcbsp *mcbsp, int tx, int rx); /* McBSP functional clock source changing function */ -int omap2_mcbsp_set_clks_src(u8 id, u8 fck_src_id); +int omap2_mcbsp_set_clks_src(struct omap_mcbsp *mcbsp, u8 fck_src_id); /* McBSP signal muxing API */ -void omap2_mcbsp1_mux_clkr_src(u8 mux); -void omap2_mcbsp1_mux_fsr_src(u8 mux); +void omap2_mcbsp1_mux_clkr_src(struct omap_mcbsp *mcbsp, u8 mux); +void omap2_mcbsp1_mux_fsr_src(struct omap_mcbsp *mcbsp, u8 mux); -int omap_mcbsp_dma_ch_params(unsigned int id, unsigned int stream); -int omap_mcbsp_dma_reg_params(unsigned int id, unsigned int stream); +int omap_mcbsp_dma_ch_params(struct omap_mcbsp *mcbsp, unsigned int stream); +int omap_mcbsp_dma_reg_params(struct omap_mcbsp *mcbsp, unsigned int stream); /* Sidetone specific API */ -int omap_st_set_chgain(unsigned int id, int channel, s16 chgain); -int omap_st_get_chgain(unsigned int id, int channel, s16 *chgain); -int omap_st_enable(unsigned int id); -int omap_st_disable(unsigned int id); -int omap_st_is_enabled(unsigned int id); +int omap_st_set_chgain(struct omap_mcbsp *mcbsp, int channel, s16 chgain); +int omap_st_get_chgain(struct omap_mcbsp *mcbsp, int channel, s16 *chgain); +int omap_st_enable(struct omap_mcbsp *mcbsp); +int omap_st_disable(struct omap_mcbsp *mcbsp); +int omap_st_is_enabled(struct omap_mcbsp *mcbsp); + +int __devinit omap_mcbsp_probe(struct platform_device *pdev); +int __devexit omap_mcbsp_remove(struct platform_device *pdev); #endif /* __ASOC_MCBSP_H */ diff --git a/sound/soc/omap/n810.c b/sound/soc/omap/n810.c index c292bf0fd19..abac4b69075 100644 --- a/sound/soc/omap/n810.c +++ b/sound/soc/omap/n810.c @@ -275,7 +275,7 @@ static int n810_aic33_init(struct snd_soc_pcm_runtime *rtd) static struct snd_soc_dai_link n810_dai = { .name = "TLV320AIC33", .stream_name = "AIC33", - .cpu_dai_name = "omap-mcbsp-dai.1", + .cpu_dai_name = "omap-mcbsp.2", .platform_name = "omap-pcm-audio", .codec_name = "tlv320aic3x-codec.2-0018", .codec_dai_name = "tlv320aic3x-hifi", diff --git a/sound/soc/omap/omap-mcbsp.c b/sound/soc/omap/omap-mcbsp.c index f1318c1d4e1..89240025949 100644 --- a/sound/soc/omap/omap-mcbsp.c +++ b/sound/soc/omap/omap-mcbsp.c @@ -56,36 +56,18 @@ enum { OMAP_MCBSP_WORD_32, }; -struct omap_mcbsp_data { - unsigned int bus_id; - struct omap_mcbsp_reg_cfg regs; - unsigned int fmt; - /* - * Flags indicating is the bus already activated and configured by - * another substream - */ - int active; - int configured; - unsigned int in_freq; - int clk_div; - int wlen; -}; - -static struct omap_mcbsp_data mcbsp_data[NUM_LINKS]; - /* * Stream DMA parameters. DMA request line and port address are set runtime * since they are different between OMAP1 and later OMAPs */ -static struct omap_pcm_dma_data omap_mcbsp_dai_dma_params[NUM_LINKS][2]; - static void omap_mcbsp_set_threshold(struct snd_pcm_substream *substream) { struct snd_soc_pcm_runtime *rtd = substream->private_data; struct snd_soc_dai *cpu_dai = rtd->cpu_dai; - struct omap_mcbsp_data *mcbsp_data = snd_soc_dai_get_drvdata(cpu_dai); + struct omap_mcbsp *mcbsp = snd_soc_dai_get_drvdata(cpu_dai); + struct omap_mcbsp_data *mcbsp_data = &mcbsp->mcbsp_data; struct omap_pcm_dma_data *dma_data; - int dma_op_mode = omap_mcbsp_get_dma_op_mode(mcbsp_data->bus_id); + int dma_op_mode = omap_mcbsp_get_dma_op_mode(mcbsp); int words; dma_data = snd_soc_dai_get_dma_data(rtd->cpu_dai, substream); @@ -107,9 +89,9 @@ static void omap_mcbsp_set_threshold(struct snd_pcm_substream *substream) /* Configure McBSP internal buffer usage */ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) - omap_mcbsp_set_tx_threshold(mcbsp_data->bus_id, words); + omap_mcbsp_set_tx_threshold(mcbsp, words); else - omap_mcbsp_set_rx_threshold(mcbsp_data->bus_id, words); + omap_mcbsp_set_rx_threshold(mcbsp, words); } static int omap_mcbsp_hwrule_min_buffersize(struct snd_pcm_hw_params *params, @@ -119,12 +101,12 @@ static int omap_mcbsp_hwrule_min_buffersize(struct snd_pcm_hw_params *params, SNDRV_PCM_HW_PARAM_BUFFER_SIZE); struct snd_interval *channels = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS); - struct omap_mcbsp_data *mcbsp_data = rule->private; + struct omap_mcbsp *mcbsp = rule->private; struct snd_interval frames; int size; snd_interval_any(&frames); - size = omap_mcbsp_get_fifo_size(mcbsp_data->bus_id); + size = omap_mcbsp_get_fifo_size(mcbsp); frames.min = size / channels->min; frames.integer = 1; @@ -134,12 +116,11 @@ static int omap_mcbsp_hwrule_min_buffersize(struct snd_pcm_hw_params *params, static int omap_mcbsp_dai_startup(struct snd_pcm_substream *substream, struct snd_soc_dai *cpu_dai) { - struct omap_mcbsp_data *mcbsp_data = snd_soc_dai_get_drvdata(cpu_dai); - int bus_id = mcbsp_data->bus_id; + struct omap_mcbsp *mcbsp = snd_soc_dai_get_drvdata(cpu_dai); int err = 0; if (!cpu_dai->active) - err = omap_mcbsp_request(bus_id); + err = omap_mcbsp_request(mcbsp); /* * OMAP3 McBSP FIFO is word structured. @@ -156,7 +137,7 @@ static int omap_mcbsp_dai_startup(struct snd_pcm_substream *substream, * 2 channels (stereo): size is 128 / 2 = 64 frames (2 * 64 words) * 4 channels: size is 128 / 4 = 32 frames (4 * 32 words) */ - if (cpu_is_omap34xx() || cpu_is_omap44xx()) { + if (mcbsp->pdata->buffer_size) { /* * Rule for the buffer size. We should not allow * smaller buffer than the FIFO size to avoid underruns @@ -164,7 +145,7 @@ static int omap_mcbsp_dai_startup(struct snd_pcm_substream *substream, snd_pcm_hw_rule_add(substream->runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, omap_mcbsp_hwrule_min_buffersize, - mcbsp_data, + mcbsp, SNDRV_PCM_HW_PARAM_BUFFER_SIZE, -1); /* Make sure, that the period size is always even */ @@ -178,10 +159,11 @@ static int omap_mcbsp_dai_startup(struct snd_pcm_substream *substream, static void omap_mcbsp_dai_shutdown(struct snd_pcm_substream *substream, struct snd_soc_dai *cpu_dai) { - struct omap_mcbsp_data *mcbsp_data = snd_soc_dai_get_drvdata(cpu_dai); + struct omap_mcbsp *mcbsp = snd_soc_dai_get_drvdata(cpu_dai); + struct omap_mcbsp_data *mcbsp_data = &mcbsp->mcbsp_data; if (!cpu_dai->active) { - omap_mcbsp_free(mcbsp_data->bus_id); + omap_mcbsp_free(mcbsp); mcbsp_data->configured = 0; } } @@ -189,7 +171,8 @@ static void omap_mcbsp_dai_shutdown(struct snd_pcm_substream *substream, static int omap_mcbsp_dai_trigger(struct snd_pcm_substream *substream, int cmd, struct snd_soc_dai *cpu_dai) { - struct omap_mcbsp_data *mcbsp_data = snd_soc_dai_get_drvdata(cpu_dai); + struct omap_mcbsp *mcbsp = snd_soc_dai_get_drvdata(cpu_dai); + struct omap_mcbsp_data *mcbsp_data = &mcbsp->mcbsp_data; int err = 0, play = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK); switch (cmd) { @@ -197,13 +180,13 @@ static int omap_mcbsp_dai_trigger(struct snd_pcm_substream *substream, int cmd, case SNDRV_PCM_TRIGGER_RESUME: case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: mcbsp_data->active++; - omap_mcbsp_start(mcbsp_data->bus_id, play, !play); + omap_mcbsp_start(mcbsp, play, !play); break; case SNDRV_PCM_TRIGGER_STOP: case SNDRV_PCM_TRIGGER_SUSPEND: case SNDRV_PCM_TRIGGER_PAUSE_PUSH: - omap_mcbsp_stop(mcbsp_data->bus_id, play, !play); + omap_mcbsp_stop(mcbsp, play, !play); mcbsp_data->active--; break; default: @@ -219,14 +202,14 @@ static snd_pcm_sframes_t omap_mcbsp_dai_delay( { struct snd_soc_pcm_runtime *rtd = substream->private_data; struct snd_soc_dai *cpu_dai = rtd->cpu_dai; - struct omap_mcbsp_data *mcbsp_data = snd_soc_dai_get_drvdata(cpu_dai); + struct omap_mcbsp *mcbsp = snd_soc_dai_get_drvdata(cpu_dai); u16 fifo_use; snd_pcm_sframes_t delay; if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) - fifo_use = omap_mcbsp_get_tx_delay(mcbsp_data->bus_id); + fifo_use = omap_mcbsp_get_tx_delay(mcbsp); else - fifo_use = omap_mcbsp_get_rx_delay(mcbsp_data->bus_id); + fifo_use = omap_mcbsp_get_rx_delay(mcbsp); /* * Divide the used locations with the channel count to get the @@ -242,19 +225,20 @@ static int omap_mcbsp_dai_hw_params(struct snd_pcm_substream *substream, struct snd_pcm_hw_params *params, struct snd_soc_dai *cpu_dai) { - struct omap_mcbsp_data *mcbsp_data = snd_soc_dai_get_drvdata(cpu_dai); + struct omap_mcbsp *mcbsp = snd_soc_dai_get_drvdata(cpu_dai); + struct omap_mcbsp_data *mcbsp_data = &mcbsp->mcbsp_data; struct omap_mcbsp_reg_cfg *regs = &mcbsp_data->regs; struct omap_pcm_dma_data *dma_data; - int dma, bus_id = mcbsp_data->bus_id; + int dma; int wlen, channels, wpf, sync_mode = OMAP_DMA_SYNC_ELEMENT; int pkt_size = 0; unsigned long port; unsigned int format, div, framesize, master; - dma_data = &omap_mcbsp_dai_dma_params[cpu_dai->id][substream->stream]; + dma_data = &mcbsp_data->dma_data[substream->stream]; - dma = omap_mcbsp_dma_ch_params(bus_id, substream->stream); - port = omap_mcbsp_dma_reg_params(bus_id, substream->stream); + dma = omap_mcbsp_dma_ch_params(mcbsp, substream->stream); + port = omap_mcbsp_dma_reg_params(mcbsp, substream->stream); switch (params_format(params)) { case SNDRV_PCM_FORMAT_S16_LE: @@ -268,20 +252,20 @@ static int omap_mcbsp_dai_hw_params(struct snd_pcm_substream *substream, default: return -EINVAL; } - if (cpu_is_omap34xx() || cpu_is_omap44xx()) { + if (mcbsp->pdata->buffer_size) { dma_data->set_threshold = omap_mcbsp_set_threshold; /* TODO: Currently, MODE_ELEMENT == MODE_FRAME */ - if (omap_mcbsp_get_dma_op_mode(bus_id) == + if (omap_mcbsp_get_dma_op_mode(mcbsp) == MCBSP_DMA_MODE_THRESHOLD) { int period_words, max_thrsh; period_words = params_period_bytes(params) / (wlen / 8); if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) max_thrsh = omap_mcbsp_get_max_tx_threshold( - mcbsp_data->bus_id); + mcbsp); else max_thrsh = omap_mcbsp_get_max_rx_threshold( - mcbsp_data->bus_id); + mcbsp); /* * If the period contains less or equal number of words, * we are using the original threshold mode setup: @@ -398,7 +382,7 @@ static int omap_mcbsp_dai_hw_params(struct snd_pcm_substream *substream, break; } - omap_mcbsp_config(bus_id, &mcbsp_data->regs); + omap_mcbsp_config(mcbsp, &mcbsp_data->regs); mcbsp_data->wlen = wlen; mcbsp_data->configured = 1; @@ -412,7 +396,8 @@ static int omap_mcbsp_dai_hw_params(struct snd_pcm_substream *substream, static int omap_mcbsp_dai_set_dai_fmt(struct snd_soc_dai *cpu_dai, unsigned int fmt) { - struct omap_mcbsp_data *mcbsp_data = snd_soc_dai_get_drvdata(cpu_dai); + struct omap_mcbsp *mcbsp = snd_soc_dai_get_drvdata(cpu_dai); + struct omap_mcbsp_data *mcbsp_data = &mcbsp->mcbsp_data; struct omap_mcbsp_reg_cfg *regs = &mcbsp_data->regs; bool inv_fs = false; @@ -514,7 +499,8 @@ static int omap_mcbsp_dai_set_dai_fmt(struct snd_soc_dai *cpu_dai, static int omap_mcbsp_dai_set_clkdiv(struct snd_soc_dai *cpu_dai, int div_id, int div) { - struct omap_mcbsp_data *mcbsp_data = snd_soc_dai_get_drvdata(cpu_dai); + struct omap_mcbsp *mcbsp = snd_soc_dai_get_drvdata(cpu_dai); + struct omap_mcbsp_data *mcbsp_data = &mcbsp->mcbsp_data; struct omap_mcbsp_reg_cfg *regs = &mcbsp_data->regs; if (div_id != OMAP_MCBSP_CLKGDV) @@ -531,7 +517,8 @@ static int omap_mcbsp_dai_set_dai_sysclk(struct snd_soc_dai *cpu_dai, int clk_id, unsigned int freq, int dir) { - struct omap_mcbsp_data *mcbsp_data = snd_soc_dai_get_drvdata(cpu_dai); + struct omap_mcbsp *mcbsp = snd_soc_dai_get_drvdata(cpu_dai); + struct omap_mcbsp_data *mcbsp_data = &mcbsp->mcbsp_data; struct omap_mcbsp_reg_cfg *regs = &mcbsp_data->regs; int err = 0; @@ -547,7 +534,7 @@ static int omap_mcbsp_dai_set_dai_sysclk(struct snd_soc_dai *cpu_dai, clk_id == OMAP_MCBSP_CLKR_SRC_CLKX || clk_id == OMAP_MCBSP_FSR_SRC_FSR || clk_id == OMAP_MCBSP_FSR_SRC_FSX) - if (cpu_class_is_omap1() || mcbsp_data->bus_id != 0) + if (cpu_class_is_omap1() || cpu_dai->id != 1) return -EINVAL; mcbsp_data->in_freq = freq; @@ -563,7 +550,7 @@ static int omap_mcbsp_dai_set_dai_sysclk(struct snd_soc_dai *cpu_dai, err = -EINVAL; break; } - err = omap2_mcbsp_set_clks_src(mcbsp_data->bus_id, + err = omap2_mcbsp_set_clks_src(mcbsp, MCBSP_CLKS_PRCM_SRC); break; case OMAP_MCBSP_SYSCLK_CLKS_EXT: @@ -571,7 +558,7 @@ static int omap_mcbsp_dai_set_dai_sysclk(struct snd_soc_dai *cpu_dai, err = 0; break; } - err = omap2_mcbsp_set_clks_src(mcbsp_data->bus_id, + err = omap2_mcbsp_set_clks_src(mcbsp, MCBSP_CLKS_PAD_SRC); break; @@ -585,22 +572,22 @@ static int omap_mcbsp_dai_set_dai_sysclk(struct snd_soc_dai *cpu_dai, case OMAP_MCBSP_CLKR_SRC_CLKR: if (cpu_class_is_omap1()) break; - omap2_mcbsp1_mux_clkr_src(CLKR_SRC_CLKR); + omap2_mcbsp1_mux_clkr_src(mcbsp, CLKR_SRC_CLKR); break; case OMAP_MCBSP_CLKR_SRC_CLKX: if (cpu_class_is_omap1()) break; - omap2_mcbsp1_mux_clkr_src(CLKR_SRC_CLKX); + omap2_mcbsp1_mux_clkr_src(mcbsp, CLKR_SRC_CLKX); break; case OMAP_MCBSP_FSR_SRC_FSR: if (cpu_class_is_omap1()) break; - omap2_mcbsp1_mux_fsr_src(FSR_SRC_FSR); + omap2_mcbsp1_mux_fsr_src(mcbsp, FSR_SRC_FSR); break; case OMAP_MCBSP_FSR_SRC_FSX: if (cpu_class_is_omap1()) break; - omap2_mcbsp1_mux_fsr_src(FSR_SRC_FSX); + omap2_mcbsp1_mux_fsr_src(mcbsp, FSR_SRC_FSX); break; default: err = -ENODEV; @@ -620,15 +607,7 @@ static const struct snd_soc_dai_ops mcbsp_dai_ops = { .set_sysclk = omap_mcbsp_dai_set_dai_sysclk, }; -static int mcbsp_dai_probe(struct snd_soc_dai *dai) -{ - mcbsp_data[dai->id].bus_id = dai->id; - snd_soc_dai_set_drvdata(dai, &mcbsp_data[dai->id].bus_id); - return 0; -} - static struct snd_soc_dai_driver omap_mcbsp_dai = { - .probe = mcbsp_dai_probe, .playback = { .channels_min = 1, .channels_max = 16, @@ -659,11 +638,13 @@ static int omap_mcbsp_st_info_volsw(struct snd_kcontrol *kcontrol, return 0; } -#define OMAP_MCBSP_ST_SET_CHANNEL_VOLUME(id, channel) \ +#define OMAP_MCBSP_ST_SET_CHANNEL_VOLUME(channel) \ static int \ -omap_mcbsp##id##_set_st_ch##channel##_volume(struct snd_kcontrol *kc, \ +omap_mcbsp_set_st_ch##channel##_volume(struct snd_kcontrol *kc, \ struct snd_ctl_elem_value *uc) \ { \ + struct snd_soc_dai *cpu_dai = snd_kcontrol_chip(kc); \ + struct omap_mcbsp *mcbsp = snd_soc_dai_get_drvdata(cpu_dai); \ struct soc_mixer_control *mc = \ (struct soc_mixer_control *)kc->private_value; \ int max = mc->max; \ @@ -674,46 +655,44 @@ omap_mcbsp##id##_set_st_ch##channel##_volume(struct snd_kcontrol *kc, \ return -EINVAL; \ \ /* OMAP McBSP implementation uses index values 0..4 */ \ - return omap_st_set_chgain((id)-1, channel, val); \ + return omap_st_set_chgain(mcbsp, channel, val); \ } -#define OMAP_MCBSP_ST_GET_CHANNEL_VOLUME(id, channel) \ +#define OMAP_MCBSP_ST_GET_CHANNEL_VOLUME(channel) \ static int \ -omap_mcbsp##id##_get_st_ch##channel##_volume(struct snd_kcontrol *kc, \ +omap_mcbsp_get_st_ch##channel##_volume(struct snd_kcontrol *kc, \ struct snd_ctl_elem_value *uc) \ { \ + struct snd_soc_dai *cpu_dai = snd_kcontrol_chip(kc); \ + struct omap_mcbsp *mcbsp = snd_soc_dai_get_drvdata(cpu_dai); \ s16 chgain; \ \ - if (omap_st_get_chgain((id)-1, channel, &chgain)) \ + if (omap_st_get_chgain(mcbsp, channel, &chgain)) \ return -EAGAIN; \ \ uc->value.integer.value[0] = chgain; \ return 0; \ } -OMAP_MCBSP_ST_SET_CHANNEL_VOLUME(2, 0) -OMAP_MCBSP_ST_SET_CHANNEL_VOLUME(2, 1) -OMAP_MCBSP_ST_SET_CHANNEL_VOLUME(3, 0) -OMAP_MCBSP_ST_SET_CHANNEL_VOLUME(3, 1) -OMAP_MCBSP_ST_GET_CHANNEL_VOLUME(2, 0) -OMAP_MCBSP_ST_GET_CHANNEL_VOLUME(2, 1) -OMAP_MCBSP_ST_GET_CHANNEL_VOLUME(3, 0) -OMAP_MCBSP_ST_GET_CHANNEL_VOLUME(3, 1) +OMAP_MCBSP_ST_SET_CHANNEL_VOLUME(0) +OMAP_MCBSP_ST_SET_CHANNEL_VOLUME(1) +OMAP_MCBSP_ST_GET_CHANNEL_VOLUME(0) +OMAP_MCBSP_ST_GET_CHANNEL_VOLUME(1) static int omap_mcbsp_st_put_mode(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { - struct soc_mixer_control *mc = - (struct soc_mixer_control *)kcontrol->private_value; + struct snd_soc_dai *cpu_dai = snd_kcontrol_chip(kcontrol); + struct omap_mcbsp *mcbsp = snd_soc_dai_get_drvdata(cpu_dai); u8 value = ucontrol->value.integer.value[0]; - if (value == omap_st_is_enabled(mc->reg)) + if (value == omap_st_is_enabled(mcbsp)) return 0; if (value) - omap_st_enable(mc->reg); + omap_st_enable(mcbsp); else - omap_st_disable(mc->reg); + omap_st_disable(mcbsp); return 1; } @@ -721,10 +700,10 @@ static int omap_mcbsp_st_put_mode(struct snd_kcontrol *kcontrol, static int omap_mcbsp_st_get_mode(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { - struct soc_mixer_control *mc = - (struct soc_mixer_control *)kcontrol->private_value; + struct snd_soc_dai *cpu_dai = snd_kcontrol_chip(kcontrol); + struct omap_mcbsp *mcbsp = snd_soc_dai_get_drvdata(cpu_dai); - ucontrol->value.integer.value[0] = omap_st_is_enabled(mc->reg); + ucontrol->value.integer.value[0] = omap_st_is_enabled(mcbsp); return 0; } @@ -733,12 +712,12 @@ static const struct snd_kcontrol_new omap_mcbsp2_st_controls[] = { omap_mcbsp_st_get_mode, omap_mcbsp_st_put_mode), OMAP_MCBSP_SOC_SINGLE_S16_EXT("McBSP2 Sidetone Channel 0 Volume", -32768, 32767, - omap_mcbsp2_get_st_ch0_volume, - omap_mcbsp2_set_st_ch0_volume), + omap_mcbsp_get_st_ch0_volume, + omap_mcbsp_set_st_ch0_volume), OMAP_MCBSP_SOC_SINGLE_S16_EXT("McBSP2 Sidetone Channel 1 Volume", -32768, 32767, - omap_mcbsp2_get_st_ch1_volume, - omap_mcbsp2_set_st_ch1_volume), + omap_mcbsp_get_st_ch1_volume, + omap_mcbsp_set_st_ch1_volume), }; static const struct snd_kcontrol_new omap_mcbsp3_st_controls[] = { @@ -746,25 +725,30 @@ static const struct snd_kcontrol_new omap_mcbsp3_st_controls[] = { omap_mcbsp_st_get_mode, omap_mcbsp_st_put_mode), OMAP_MCBSP_SOC_SINGLE_S16_EXT("McBSP3 Sidetone Channel 0 Volume", -32768, 32767, - omap_mcbsp3_get_st_ch0_volume, - omap_mcbsp3_set_st_ch0_volume), + omap_mcbsp_get_st_ch0_volume, + omap_mcbsp_set_st_ch0_volume), OMAP_MCBSP_SOC_SINGLE_S16_EXT("McBSP3 Sidetone Channel 1 Volume", -32768, 32767, - omap_mcbsp3_get_st_ch1_volume, - omap_mcbsp3_set_st_ch1_volume), + omap_mcbsp_get_st_ch1_volume, + omap_mcbsp_set_st_ch1_volume), }; -int omap_mcbsp_st_add_controls(struct snd_soc_dai *dai) +int omap_mcbsp_st_add_controls(struct snd_soc_pcm_runtime *rtd) { - if (!cpu_is_omap34xx()) + struct snd_soc_dai *cpu_dai = rtd->cpu_dai; + struct omap_mcbsp *mcbsp = snd_soc_dai_get_drvdata(cpu_dai); + + if (!mcbsp->st_data) return -ENODEV; - switch (dai->id) { - case 1: /* McBSP 2 */ - return snd_soc_add_dai_controls(dai, omap_mcbsp2_st_controls, + switch (cpu_dai->id) { + case 2: /* McBSP 2 */ + return snd_soc_add_dai_controls(cpu_dai, + omap_mcbsp2_st_controls, ARRAY_SIZE(omap_mcbsp2_st_controls)); - case 2: /* McBSP 3 */ - return snd_soc_add_dai_controls(dai, omap_mcbsp3_st_controls, + case 3: /* McBSP 3 */ + return snd_soc_add_dai_controls(cpu_dai, + omap_mcbsp3_st_controls, ARRAY_SIZE(omap_mcbsp3_st_controls)); default: break; @@ -776,18 +760,25 @@ EXPORT_SYMBOL_GPL(omap_mcbsp_st_add_controls); static __devinit int asoc_mcbsp_probe(struct platform_device *pdev) { - return snd_soc_register_dai(&pdev->dev, &omap_mcbsp_dai); + int ret; + + ret = omap_mcbsp_probe(pdev); + if (!ret) + return snd_soc_register_dai(&pdev->dev, &omap_mcbsp_dai); + + return ret; } static int __devexit asoc_mcbsp_remove(struct platform_device *pdev) { + omap_mcbsp_remove(pdev); snd_soc_unregister_dai(&pdev->dev); return 0; } static struct platform_driver asoc_mcbsp_driver = { .driver = { - .name = "omap-mcbsp-dai", + .name = "omap-mcbsp", .owner = THIS_MODULE, }, diff --git a/sound/soc/omap/omap-mcbsp.h b/sound/soc/omap/omap-mcbsp.h index 476fe2add70..f877b16f19c 100644 --- a/sound/soc/omap/omap-mcbsp.h +++ b/sound/soc/omap/omap-mcbsp.h @@ -59,6 +59,6 @@ enum omap_mcbsp_div { #define NUM_LINKS 5 #endif -int omap_mcbsp_st_add_controls(struct snd_soc_dai *dai); +int omap_mcbsp_st_add_controls(struct snd_soc_pcm_runtime *rtd); #endif diff --git a/sound/soc/omap/omap-pcm.h b/sound/soc/omap/omap-pcm.h index f95fe306417..b92248cbd47 100644 --- a/sound/soc/omap/omap-pcm.h +++ b/sound/soc/omap/omap-pcm.h @@ -25,6 +25,8 @@ #ifndef __OMAP_PCM_H__ #define __OMAP_PCM_H__ +struct snd_pcm_substream; + struct omap_pcm_dma_data { char *name; /* stream identifier */ int dma_req; /* DMA request line */ diff --git a/sound/soc/omap/omap3beagle.c b/sound/soc/omap/omap3beagle.c index 3357dcc47ed..2830dfd0566 100644 --- a/sound/soc/omap/omap3beagle.c +++ b/sound/soc/omap/omap3beagle.c @@ -91,7 +91,7 @@ static struct snd_soc_ops omap3beagle_ops = { static struct snd_soc_dai_link omap3beagle_dai = { .name = "TWL4030", .stream_name = "TWL4030", - .cpu_dai_name = "omap-mcbsp-dai.1", + .cpu_dai_name = "omap-mcbsp.2", .platform_name = "omap-pcm-audio", .codec_dai_name = "twl4030-hifi", .codec_name = "twl4030-codec", diff --git a/sound/soc/omap/omap3evm.c b/sound/soc/omap/omap3evm.c index 071fcb09b8b..3d468c9179d 100644 --- a/sound/soc/omap/omap3evm.c +++ b/sound/soc/omap/omap3evm.c @@ -58,7 +58,7 @@ static struct snd_soc_ops omap3evm_ops = { static struct snd_soc_dai_link omap3evm_dai = { .name = "TWL4030", .stream_name = "TWL4030", - .cpu_dai_name = "omap-mcbsp-dai.1", + .cpu_dai_name = "omap-mcbsp.2", .codec_dai_name = "twl4030-hifi", .platform_name = "omap-pcm-audio", .codec_name = "twl4030-codec", diff --git a/sound/soc/omap/omap3pandora.c b/sound/soc/omap/omap3pandora.c index 07794bd1095..4c3a0978578 100644 --- a/sound/soc/omap/omap3pandora.c +++ b/sound/soc/omap/omap3pandora.c @@ -208,7 +208,7 @@ static struct snd_soc_dai_link omap3pandora_dai[] = { { .name = "PCM1773", .stream_name = "HiFi Out", - .cpu_dai_name = "omap-mcbsp-dai.1", + .cpu_dai_name = "omap-mcbsp.2", .codec_dai_name = "twl4030-hifi", .platform_name = "omap-pcm-audio", .codec_name = "twl4030-codec", @@ -219,7 +219,7 @@ static struct snd_soc_dai_link omap3pandora_dai[] = { }, { .name = "TWL4030", .stream_name = "Line/Mic In", - .cpu_dai_name = "omap-mcbsp-dai.3", + .cpu_dai_name = "omap-mcbsp.4", .codec_dai_name = "twl4030-hifi", .platform_name = "omap-pcm-audio", .codec_name = "twl4030-codec", diff --git a/sound/soc/omap/osk5912.c b/sound/soc/omap/osk5912.c index d859b597e7e..b1a9d64cbc5 100644 --- a/sound/soc/omap/osk5912.c +++ b/sound/soc/omap/osk5912.c @@ -96,7 +96,7 @@ static const struct snd_soc_dapm_route audio_map[] = { static struct snd_soc_dai_link osk_dai = { .name = "TLV320AIC23", .stream_name = "AIC23", - .cpu_dai_name = "omap-mcbsp-dai.0", + .cpu_dai_name = "omap-mcbsp.1", .codec_dai_name = "tlv320aic23-hifi", .platform_name = "omap-pcm-audio", .codec_name = "tlv320aic23-codec", diff --git a/sound/soc/omap/overo.c b/sound/soc/omap/overo.c index 2ee889c5025..6ac3e0c3c28 100644 --- a/sound/soc/omap/overo.c +++ b/sound/soc/omap/overo.c @@ -60,7 +60,7 @@ static struct snd_soc_ops overo_ops = { static struct snd_soc_dai_link overo_dai = { .name = "TWL4030", .stream_name = "TWL4030", - .cpu_dai_name = "omap-mcbsp-dai.1", + .cpu_dai_name = "omap-mcbsp.2", .codec_dai_name = "twl4030-hifi", .platform_name = "omap-pcm-audio", .codec_name = "twl4030-codec", diff --git a/sound/soc/omap/rx51.c b/sound/soc/omap/rx51.c index 58936c730a8..2712dd232b6 100644 --- a/sound/soc/omap/rx51.c +++ b/sound/soc/omap/rx51.c @@ -313,7 +313,7 @@ static int rx51_aic34_init(struct snd_soc_pcm_runtime *rtd) return err; snd_soc_limit_volume(codec, "TPA6130A2 Headphone Playback Volume", 42); - err = omap_mcbsp_st_add_controls(rtd->cpu_dai); + err = omap_mcbsp_st_add_controls(rtd); if (err < 0) return err; @@ -353,7 +353,7 @@ static struct snd_soc_dai_link rx51_dai[] = { { .name = "TLV320AIC34", .stream_name = "AIC34", - .cpu_dai_name = "omap-mcbsp-dai.1", + .cpu_dai_name = "omap-mcbsp.2", .codec_dai_name = "tlv320aic3x-hifi", .platform_name = "omap-pcm-audio", .codec_name = "tlv320aic3x-codec.2-0018", diff --git a/sound/soc/omap/sdp3430.c b/sound/soc/omap/sdp3430.c index 2c850662ea7..0e283226e2b 100644 --- a/sound/soc/omap/sdp3430.c +++ b/sound/soc/omap/sdp3430.c @@ -187,7 +187,7 @@ static struct snd_soc_dai_link sdp3430_dai[] = { { .name = "TWL4030 I2S", .stream_name = "TWL4030 Audio", - .cpu_dai_name = "omap-mcbsp-dai.1", + .cpu_dai_name = "omap-mcbsp.2", .codec_dai_name = "twl4030-hifi", .platform_name = "omap-pcm-audio", .codec_name = "twl4030-codec", @@ -199,7 +199,7 @@ static struct snd_soc_dai_link sdp3430_dai[] = { { .name = "TWL4030 PCM", .stream_name = "TWL4030 Voice", - .cpu_dai_name = "omap-mcbsp-dai.2", + .cpu_dai_name = "omap-mcbsp.3", .codec_dai_name = "twl4030-voice", .platform_name = "omap-pcm-audio", .codec_name = "twl4030-codec", diff --git a/sound/soc/omap/zoom2.c b/sound/soc/omap/zoom2.c index 981616d61f6..920e0d9e03d 100644 --- a/sound/soc/omap/zoom2.c +++ b/sound/soc/omap/zoom2.c @@ -131,7 +131,7 @@ static struct snd_soc_dai_link zoom2_dai[] = { { .name = "TWL4030 I2S", .stream_name = "TWL4030 Audio", - .cpu_dai_name = "omap-mcbsp-dai.1", + .cpu_dai_name = "omap-mcbsp.2", .codec_dai_name = "twl4030-hifi", .platform_name = "omap-pcm-audio", .codec_name = "twl4030-codec", @@ -143,7 +143,7 @@ static struct snd_soc_dai_link zoom2_dai[] = { { .name = "TWL4030 PCM", .stream_name = "TWL4030 Voice", - .cpu_dai_name = "omap-mcbsp-dai.2", + .cpu_dai_name = "omap-mcbsp.3", .codec_dai_name = "twl4030-voice", .platform_name = "omap-pcm-audio", .codec_name = "twl4030-codec", -- cgit v1.2.3 From 20456242e8d13287b476264223caef7f1193741a Mon Sep 17 00:00:00 2001 From: Peter Ujfalusi Date: Wed, 15 Feb 2012 12:00:26 +0200 Subject: ARM: OMAP: Do not register omap-mcbsp-dai device The driver for omap-mcbsp-dai no longer exist since it has been merged with the omap-mcbsp driver. Signed-off-by: Peter Ujfalusi Acked-by: Tony Lindgren Tested-by: Grazvydas Ignotas Tested-by: Janusz Krzysztofik Acked-by: Jarkko Nikula Signed-off-by: Liam Girdwood --- arch/arm/mach-omap1/devices.c | 9 --------- arch/arm/mach-omap2/devices.c | 22 ---------------------- arch/arm/plat-omap/include/plat/mcbsp.h | 7 ------- 3 files changed, 38 deletions(-) (limited to 'arch/arm/plat-omap') diff --git a/arch/arm/mach-omap1/devices.c b/arch/arm/mach-omap1/devices.c index 1d76a63c098..187b2fe132e 100644 --- a/arch/arm/mach-omap1/devices.c +++ b/arch/arm/mach-omap1/devices.c @@ -28,7 +28,6 @@ #include #include #include -#include #include "clock.h" @@ -250,16 +249,8 @@ static struct platform_device omap_pcm = { .id = -1, }; -OMAP_MCBSP_PLATFORM_DEVICE(1); -OMAP_MCBSP_PLATFORM_DEVICE(2); -OMAP_MCBSP_PLATFORM_DEVICE(3); - static void omap_init_audio(void) { - platform_device_register(&omap_mcbsp1); - platform_device_register(&omap_mcbsp2); - if (!cpu_is_omap7xx()) - platform_device_register(&omap_mcbsp3); platform_device_register(&omap_pcm); } diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c index 283d11eae69..e9fae652cd0 100644 --- a/arch/arm/mach-omap2/devices.c +++ b/arch/arm/mach-omap2/devices.c @@ -26,7 +26,6 @@ #include #include -#include #include #include #include @@ -304,29 +303,8 @@ static struct platform_device omap_pcm = { .id = -1, }; -/* - * OMAP2420 has 2 McBSP ports - * OMAP2430 has 5 McBSP ports - * OMAP3 has 5 McBSP ports - * OMAP4 has 4 McBSP ports - */ -OMAP_MCBSP_PLATFORM_DEVICE(1); -OMAP_MCBSP_PLATFORM_DEVICE(2); -OMAP_MCBSP_PLATFORM_DEVICE(3); -OMAP_MCBSP_PLATFORM_DEVICE(4); -OMAP_MCBSP_PLATFORM_DEVICE(5); - static void omap_init_audio(void) { - platform_device_register(&omap_mcbsp1); - platform_device_register(&omap_mcbsp2); - if (cpu_is_omap243x() || cpu_is_omap34xx() || cpu_is_omap44xx()) { - platform_device_register(&omap_mcbsp3); - platform_device_register(&omap_mcbsp4); - } - if (cpu_is_omap243x() || cpu_is_omap34xx()) - platform_device_register(&omap_mcbsp5); - platform_device_register(&omap_pcm); } diff --git a/arch/arm/plat-omap/include/plat/mcbsp.h b/arch/arm/plat-omap/include/plat/mcbsp.h index 437e375f05b..8eb9b0e7a85 100644 --- a/arch/arm/plat-omap/include/plat/mcbsp.h +++ b/arch/arm/plat-omap/include/plat/mcbsp.h @@ -27,13 +27,6 @@ #include #include -/* macro for building platform_device for McBSP ports */ -#define OMAP_MCBSP_PLATFORM_DEVICE(port_nr) \ -static struct platform_device omap_mcbsp##port_nr = { \ - .name = "omap-mcbsp-dai", \ - .id = port_nr - 1, \ -} - #define MCBSP_CONFIG_TYPE2 0x2 #define MCBSP_CONFIG_TYPE3 0x3 #define MCBSP_CONFIG_TYPE4 0x4 -- cgit v1.2.3 From 33cec399048545c64d9b9a1368b968acee8acb35 Mon Sep 17 00:00:00 2001 From: Peter Ujfalusi Date: Thu, 8 Mar 2012 10:40:08 +0200 Subject: ARM/ASoC: OMAP McBSP: Move remainig defines from arch to ASoC header Clock signal muxing, and functional clock related defines are only needed in ASoC drivers. Signed-off-by: Peter Ujfalusi Acked-by: Jarkko Nikula Acked-by: Mark Brown Signed-off-by: Liam Girdwood --- arch/arm/plat-omap/include/plat/mcbsp.h | 12 ------------ sound/soc/omap/mcbsp.h | 12 ++++++++++++ 2 files changed, 12 insertions(+), 12 deletions(-) (limited to 'arch/arm/plat-omap') diff --git a/arch/arm/plat-omap/include/plat/mcbsp.h b/arch/arm/plat-omap/include/plat/mcbsp.h index 8eb9b0e7a85..18814127809 100644 --- a/arch/arm/plat-omap/include/plat/mcbsp.h +++ b/arch/arm/plat-omap/include/plat/mcbsp.h @@ -31,18 +31,6 @@ #define MCBSP_CONFIG_TYPE3 0x3 #define MCBSP_CONFIG_TYPE4 0x4 -/* CLKR signal muxing options */ -#define CLKR_SRC_CLKR 0 -#define CLKR_SRC_CLKX 1 - -/* FSR signal muxing options */ -#define FSR_SRC_FSR 0 -#define FSR_SRC_FSX 1 - -/* McBSP functional clock sources */ -#define MCBSP_CLKS_PRCM_SRC 0 -#define MCBSP_CLKS_PAD_SRC 1 - /* Platform specific configuration */ struct omap_mcbsp_ops { void (*request)(unsigned int); diff --git a/sound/soc/omap/mcbsp.h b/sound/soc/omap/mcbsp.h index a5518d71913..acc94700f5b 100644 --- a/sound/soc/omap/mcbsp.h +++ b/sound/soc/omap/mcbsp.h @@ -230,6 +230,18 @@ enum { #define XRDYEN BIT(10) #define XEMPTYEOFEN BIT(14) +/* CLKR signal muxing options */ +#define CLKR_SRC_CLKR 0 +#define CLKR_SRC_CLKX 1 + +/* FSR signal muxing options */ +#define FSR_SRC_FSR 0 +#define FSR_SRC_FSX 1 + +/* McBSP functional clock sources */ +#define MCBSP_CLKS_PRCM_SRC 0 +#define MCBSP_CLKS_PAD_SRC 1 + /* we don't do multichannel for now */ struct omap_mcbsp_reg_cfg { u16 spcr2; -- cgit v1.2.3