From 55661fc1f105ed75852e937bf8ea408270eb0cca Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Wed, 1 Dec 2010 15:39:51 +0900 Subject: sh: Assume new page cache pages have dirty dcache lines. This follows the ARM change c01778001a4f5ad9c62d882776235f3f31922fdd ("ARM: 6379/1: Assume new page cache pages have dirty D-cache") for the same rationale: There are places in Linux where writes to newly allocated page cache pages happen without a subsequent call to flush_dcache_page() (several PIO drivers including USB HCD). This patch changes the meaning of PG_arch_1 to be PG_dcache_clean and always flush the D-cache for a newly mapped page in update_mmu_cache(). This addresses issues seen with executing binaries from MMC, in addition to some of the other HCDs that don't explicitly do cache management for their pipe-in buffers. Requested-by: Yoshihiro Shimoda Signed-off-by: Paul Mundt --- arch/sh/mm/cache-sh4.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/sh/mm/cache-sh4.c') diff --git a/arch/sh/mm/cache-sh4.c b/arch/sh/mm/cache-sh4.c index 2cfae81914a..92eb98633ab 100644 --- a/arch/sh/mm/cache-sh4.c +++ b/arch/sh/mm/cache-sh4.c @@ -114,7 +114,7 @@ static void sh4_flush_dcache_page(void *arg) struct address_space *mapping = page_mapping(page); if (mapping && !mapping_mapped(mapping)) - set_bit(PG_dcache_dirty, &page->flags); + clear_bit(PG_dcache_clean, &page->flags); else #endif flush_cache_one(CACHE_OC_ADDRESS_ARRAY | @@ -239,7 +239,7 @@ static void sh4_flush_cache_page(void *args) * another ASID than the current one. */ map_coherent = (current_cpu_data.dcache.n_aliases && - !test_bit(PG_dcache_dirty, &page->flags) && + test_bit(PG_dcache_clean, &page->flags) && page_mapped(page)); if (map_coherent) vaddr = kmap_coherent(page, address); -- cgit v1.2.3