From 2e0d232bff31973f58c33412b45fce51b6770698 Mon Sep 17 00:00:00 2001 From: Mike Habeck Date: Fri, 6 Apr 2007 12:04:39 -0500 Subject: [IA64] SGI Altix : fix pcibr_dmamap_ate32() bug On a SGI Altix TIOCP based PCI bus we need to include the ATE_PIO attribute bit if we're mapping a 32bit MSI address. Signed-off-by: Mike Habeck Signed-off-by: Tony Luck --- arch/ia64/sn/pci/pcibr/pcibr_dma.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) (limited to 'arch') diff --git a/arch/ia64/sn/pci/pcibr/pcibr_dma.c b/arch/ia64/sn/pci/pcibr/pcibr_dma.c index 1ee977fb6eb..95af40cb22f 100644 --- a/arch/ia64/sn/pci/pcibr/pcibr_dma.c +++ b/arch/ia64/sn/pci/pcibr/pcibr_dma.c @@ -96,10 +96,14 @@ pcibr_dmamap_ate32(struct pcidev_info *info, } /* - * If we're mapping for MSI, set the MSI bit in the ATE + * If we're mapping for MSI, set the MSI bit in the ATE. If it's a + * TIOCP based pci bus, we also need to set the PIO bit in the ATE. */ - if (dma_flags & SN_DMA_MSI) + if (dma_flags & SN_DMA_MSI) { ate |= PCI32_ATE_MSI; + if (IS_TIOCP_SOFT(pcibus_info)) + ate |= PCI32_ATE_PIO; + } ate_write(pcibus_info, ate_index, ate_count, ate); -- cgit v1.2.3