From 5beae3b9b6f5479998310a849f73aa32a637dd3b Mon Sep 17 00:00:00 2001 From: Donggeun Kim Date: Tue, 19 Jul 2011 14:41:57 +0900 Subject: [CPUFREQ] exynos4210: Show list of available frequencies This patch enables 'scaling_available_frequencies' attribute showing list of available frequencies. Signed-off-by: Donggeun Kim Signed-off-by: MyungJoo Ham Signed-off-by: KyungMin Park Signed-off-by: Dave Jones --- drivers/cpufreq/exynos4210-cpufreq.c | 23 ++++++++++++++++++++++- 1 file changed, 22 insertions(+), 1 deletion(-) (limited to 'drivers/cpufreq') diff --git a/drivers/cpufreq/exynos4210-cpufreq.c b/drivers/cpufreq/exynos4210-cpufreq.c index b7c3a84c4cf..6f887573ce9 100644 --- a/drivers/cpufreq/exynos4210-cpufreq.c +++ b/drivers/cpufreq/exynos4210-cpufreq.c @@ -464,6 +464,8 @@ static int exynos4_cpufreq_resume(struct cpufreq_policy *policy) static int exynos4_cpufreq_cpu_init(struct cpufreq_policy *policy) { + int ret; + policy->cur = policy->min = policy->max = exynos4_getspeed(policy->cpu); cpufreq_frequency_table_get_attr(exynos4_freq_table, policy->cpu); @@ -479,16 +481,35 @@ static int exynos4_cpufreq_cpu_init(struct cpufreq_policy *policy) */ cpumask_setall(policy->cpus); - return cpufreq_frequency_table_cpuinfo(policy, exynos4_freq_table); + ret = cpufreq_frequency_table_cpuinfo(policy, exynos4_freq_table); + if (ret) + return ret; + + cpufreq_frequency_table_get_attr(exynos4_freq_table, policy->cpu); + + return 0; } +static int exynos4_cpufreq_cpu_exit(struct cpufreq_policy *policy) +{ + cpufreq_frequency_table_put_attr(policy->cpu); + return 0; +} + +static struct freq_attr *exynos4_cpufreq_attr[] = { + &cpufreq_freq_attr_scaling_available_freqs, + NULL, +}; + static struct cpufreq_driver exynos4_driver = { .flags = CPUFREQ_STICKY, .verify = exynos4_verify_speed, .target = exynos4_target, .get = exynos4_getspeed, .init = exynos4_cpufreq_cpu_init, + .exit = exynos4_cpufreq_cpu_exit, .name = "exynos4_cpufreq", + .attr = exynos4_cpufreq_attr, #ifdef CONFIG_PM .suspend = exynos4_cpufreq_suspend, .resume = exynos4_cpufreq_resume, -- cgit v1.2.3 From ed361bf08033f165e0a004f254919e13f07df0ae Mon Sep 17 00:00:00 2001 From: Rafał Bilski Date: Wed, 20 Jul 2011 21:20:56 +0100 Subject: [CPUFREQ] e_powersaver: Additional checks MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Some systems are using 1,2Ghz@844mV processors running at 600MHz@796mV. Try to detect such systems and don't touch anything on it. If CPU doesn't have P-States in BIOS it should run at maximum frequency. Allow user to bypass checks by means of two new options. Don't set frequency to maximum on module unloading to avoid bada boom. It is also possible that some processors may have incorrect values in min/max registers caused by error in manufacturing process. Probably it would be BIOS job to set them to right frequency and P-States tables would have correct values inside. Two additional sanity checks for voltage. Signed-off-by: Rafał Bilski Signed-off-by: Dave Jones --- drivers/cpufreq/e_powersaver.c | 41 ++++++++++++++++++++++++++++++----------- 1 file changed, 30 insertions(+), 11 deletions(-) (limited to 'drivers/cpufreq') diff --git a/drivers/cpufreq/e_powersaver.c b/drivers/cpufreq/e_powersaver.c index 35a257dd4bb..84661c54a74 100644 --- a/drivers/cpufreq/e_powersaver.c +++ b/drivers/cpufreq/e_powersaver.c @@ -32,6 +32,10 @@ struct eps_cpu_data { static struct eps_cpu_data *eps_cpu[NR_CPUS]; +/* Module parameters */ +static int freq_failsafe_off; +static int voltage_failsafe_off; + static unsigned int eps_get(unsigned int cpu) { @@ -244,9 +248,27 @@ static int eps_cpu_init(struct cpufreq_policy *policy) return -EINVAL; if (current_voltage > 0x1f || max_voltage > 0x1f) return -EINVAL; - if (max_voltage < min_voltage) + if (max_voltage < min_voltage + || current_voltage < min_voltage + || current_voltage > max_voltage) return -EINVAL; + /* Check for systems using underclocked CPU */ + if (!freq_failsafe_off && max_multiplier != current_multiplier) { + printk(KERN_INFO "eps: Your processor is running at different " + "frequency then its maximum. Aborting.\n"); + printk(KERN_INFO "eps: You can use freq_failsafe_off option " + "to disable this check.\n"); + return -EINVAL; + } + if (!voltage_failsafe_off && max_voltage != current_voltage) { + printk(KERN_INFO "eps: Your processor is running at different " + "voltage then its maximum. Aborting.\n"); + printk(KERN_INFO "eps: You can use voltage_failsafe_off " + "option to disable this check.\n"); + return -EINVAL; + } + /* Calc FSB speed */ fsb = cpu_khz / current_multiplier; /* Calc number of p-states supported */ @@ -303,17 +325,7 @@ static int eps_cpu_init(struct cpufreq_policy *policy) static int eps_cpu_exit(struct cpufreq_policy *policy) { unsigned int cpu = policy->cpu; - struct eps_cpu_data *centaur; - u32 lo, hi; - - if (eps_cpu[cpu] == NULL) - return -ENODEV; - centaur = eps_cpu[cpu]; - /* Get max frequency */ - rdmsr(MSR_IA32_PERF_STATUS, lo, hi); - /* Set max frequency */ - eps_set_state(centaur, cpu, hi & 0xffff); /* Bye */ cpufreq_frequency_table_put_attr(policy->cpu); kfree(eps_cpu[cpu]); @@ -359,6 +371,13 @@ static void __exit eps_exit(void) cpufreq_unregister_driver(&eps_driver); } +/* Allow user to overclock his machine or to change frequency to higher after + * unloading module */ +module_param(freq_failsafe_off, int, 0644); +MODULE_PARM_DESC(freq_failsafe_off, "Disable current vs max frequency check"); +module_param(voltage_failsafe_off, int, 0644); +MODULE_PARM_DESC(voltage_failsafe_off, "Disable current vs max voltage check"); + MODULE_AUTHOR("Rafal Bilski "); MODULE_DESCRIPTION("Enhanced PowerSaver driver for VIA C7 CPU's."); MODULE_LICENSE("GPL"); -- cgit v1.2.3 From 27e954c241673d2437448bd8bf0eaa7cd81a4b15 Mon Sep 17 00:00:00 2001 From: Rafał Bilski Date: Thu, 21 Jul 2011 22:11:29 +0100 Subject: [CPUFREQ] e_powersaver: Check BIOS limit for CPU frequency MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Call ACPI function to get BIOS limit for CPU frequency. Fail if processor would like to run at higher frequency. Allow user to ignore BIOS limit. eps: Detected VIA Model D C7-M eps: Current voltage = 1084mV eps: Current multiplier = 16 eps: Highest voltage = 1084mV eps: Highest multiplier = 16 eps: Lowest voltage = 844mV eps: Lowest multiplier = 4 eps: ACPI limit 1.60GHz Signed-off-by: Rafał Bilski Signed-off-by: Dave Jones --- drivers/cpufreq/e_powersaver.c | 76 ++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 76 insertions(+) (limited to 'drivers/cpufreq') diff --git a/drivers/cpufreq/e_powersaver.c b/drivers/cpufreq/e_powersaver.c index 84661c54a74..2882d40a308 100644 --- a/drivers/cpufreq/e_powersaver.c +++ b/drivers/cpufreq/e_powersaver.c @@ -19,6 +19,11 @@ #include #include +#if defined CONFIG_ACPI_PROCESSOR || defined CONFIG_ACPI_PROCESSOR_MODULE +#include +#include +#endif + #define EPS_BRAND_C7M 0 #define EPS_BRAND_C7 1 #define EPS_BRAND_EDEN 2 @@ -27,6 +32,9 @@ struct eps_cpu_data { u32 fsb; +#if defined CONFIG_ACPI_PROCESSOR || defined CONFIG_ACPI_PROCESSOR_MODULE + u32 bios_limit; +#endif struct cpufreq_frequency_table freq_table[]; }; @@ -36,6 +44,46 @@ static struct eps_cpu_data *eps_cpu[NR_CPUS]; static int freq_failsafe_off; static int voltage_failsafe_off; +#if defined CONFIG_ACPI_PROCESSOR || defined CONFIG_ACPI_PROCESSOR_MODULE +static int ignore_acpi_limit; + +static struct acpi_processor_performance *eps_acpi_cpu_perf; + +/* Minimum necessary to get acpi_processor_get_bios_limit() working */ +static int eps_acpi_init(void) +{ + eps_acpi_cpu_perf = kzalloc(sizeof(struct acpi_processor_performance), + GFP_KERNEL); + if (!eps_acpi_cpu_perf) + return -ENOMEM; + + if (!zalloc_cpumask_var(&eps_acpi_cpu_perf->shared_cpu_map, + GFP_KERNEL)) { + kfree(eps_acpi_cpu_perf); + eps_acpi_cpu_perf = NULL; + return -ENOMEM; + } + + if (acpi_processor_register_performance(eps_acpi_cpu_perf, 0)) { + free_cpumask_var(eps_acpi_cpu_perf->shared_cpu_map); + kfree(eps_acpi_cpu_perf); + eps_acpi_cpu_perf = NULL; + return -EIO; + } + return 0; +} + +static int eps_acpi_exit(struct cpufreq_policy *policy) +{ + if (eps_acpi_cpu_perf) { + acpi_processor_unregister_performance(eps_acpi_cpu_perf, 0); + free_cpumask_var(eps_acpi_cpu_perf->shared_cpu_map); + kfree(eps_acpi_cpu_perf); + eps_acpi_cpu_perf = NULL; + } + return 0; +} +#endif static unsigned int eps_get(unsigned int cpu) { @@ -168,6 +216,9 @@ static int eps_cpu_init(struct cpufreq_policy *policy) int k, step, voltage; int ret; int states; +#if defined CONFIG_ACPI_PROCESSOR || defined CONFIG_ACPI_PROCESSOR_MODULE + unsigned int limit; +#endif if (policy->cpu != 0) return -ENODEV; @@ -271,6 +322,24 @@ static int eps_cpu_init(struct cpufreq_policy *policy) /* Calc FSB speed */ fsb = cpu_khz / current_multiplier; + +#if defined CONFIG_ACPI_PROCESSOR || defined CONFIG_ACPI_PROCESSOR_MODULE + /* Check for ACPI processor speed limit */ + if (!ignore_acpi_limit && !eps_acpi_init()) { + if (!acpi_processor_get_bios_limit(policy->cpu, &limit)) { + printk(KERN_INFO "eps: ACPI limit %u.%uGHz\n", + limit/1000000, + (limit%1000000)/10000); + eps_acpi_exit(policy); + /* Check if max_multiplier is in BIOS limits */ + if (limit && max_multiplier * fsb > limit) { + printk(KERN_INFO "eps: Aborting.\n"); + return -EINVAL; + } + } + } +#endif + /* Calc number of p-states supported */ if (brand == EPS_BRAND_C7M) states = max_multiplier - min_multiplier + 1; @@ -287,6 +356,9 @@ static int eps_cpu_init(struct cpufreq_policy *policy) /* Copy basic values */ centaur->fsb = fsb; +#if defined CONFIG_ACPI_PROCESSOR || defined CONFIG_ACPI_PROCESSOR_MODULE + centaur->bios_limit = limit; +#endif /* Fill frequency and MSR value table */ f_table = ¢aur->freq_table[0]; @@ -377,6 +449,10 @@ module_param(freq_failsafe_off, int, 0644); MODULE_PARM_DESC(freq_failsafe_off, "Disable current vs max frequency check"); module_param(voltage_failsafe_off, int, 0644); MODULE_PARM_DESC(voltage_failsafe_off, "Disable current vs max voltage check"); +#if defined CONFIG_ACPI_PROCESSOR || defined CONFIG_ACPI_PROCESSOR_MODULE +module_param(ignore_acpi_limit, int, 0644); +MODULE_PARM_DESC(ignore_acpi_limit, "Don't check ACPI's processor speed limit"); +#endif MODULE_AUTHOR("Rafal Bilski "); MODULE_DESCRIPTION("Enhanced PowerSaver driver for VIA C7 CPU's."); -- cgit v1.2.3 From 826e570bb24de7671be66de7a6f036c304caad1e Mon Sep 17 00:00:00 2001 From: Rafał Bilski Date: Sat, 23 Jul 2011 23:35:28 +0100 Subject: [CPUFREQ] e_powersaver: Allow user to lower maximum voltage MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add new module option "set_max_voltage". One of the lessons learned from Adaptive Powersaver is that voltage values returned by processor are for worst case scenario. But required voltage is changing with CPU temperature. And even processors produced in the same batch can have different minimum voltage necessary for stable work at specified frequency. On Elonex Webbook, once system starts, temperature never drops below 48 deg. C. Loading module after systems start allows user to lower CPU voltage and still have stable system. Sadly C7 doesn't allow code to set frequency or voltage from outside limits. If you ask it to set voltage lower then minimum it will ignore you. Thats why it isn't possible to change minimum voltage for minimum frequency too. Changing maximum voltage on Elonex Webbook leads to very good results. Looks like VIA C7 1.6GHz 1084mV can safetly run at 892mV. This means 83% of orginal value. If same percentage applies to power generated it means 12.5W in the place of 15W. Not much, but it is better then nothing. Only C7-M makes it possible. If voltage is too low by 16mV or more you will experience kernel panic. If voltage is too low by 32mV or more you will experience system freeze. Signed-off-by: Rafał Bilski Signed-off-by: Dave Jones --- drivers/cpufreq/e_powersaver.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) (limited to 'drivers/cpufreq') diff --git a/drivers/cpufreq/e_powersaver.c b/drivers/cpufreq/e_powersaver.c index 2882d40a308..4bd6815d317 100644 --- a/drivers/cpufreq/e_powersaver.c +++ b/drivers/cpufreq/e_powersaver.c @@ -43,6 +43,7 @@ static struct eps_cpu_data *eps_cpu[NR_CPUS]; /* Module parameters */ static int freq_failsafe_off; static int voltage_failsafe_off; +static int set_max_voltage; #if defined CONFIG_ACPI_PROCESSOR || defined CONFIG_ACPI_PROCESSOR_MODULE static int ignore_acpi_limit; @@ -340,6 +341,21 @@ static int eps_cpu_init(struct cpufreq_policy *policy) } #endif + /* Allow user to set lower maximum voltage then that reported + * by processor */ + if (brand == EPS_BRAND_C7M && set_max_voltage) { + u32 v; + + /* Change mV to something hardware can use */ + v = (set_max_voltage - 700) / 16; + /* Check if voltage is within limits */ + if (v >= min_voltage && v <= max_voltage) { + printk(KERN_INFO "eps: Setting %dmV as maximum.\n", + v * 16 + 700); + max_voltage = v; + } + } + /* Calc number of p-states supported */ if (brand == EPS_BRAND_C7M) states = max_multiplier - min_multiplier + 1; @@ -453,6 +469,8 @@ MODULE_PARM_DESC(voltage_failsafe_off, "Disable current vs max voltage check"); module_param(ignore_acpi_limit, int, 0644); MODULE_PARM_DESC(ignore_acpi_limit, "Don't check ACPI's processor speed limit"); #endif +module_param(set_max_voltage, int, 0644); +MODULE_PARM_DESC(set_max_voltage, "Set maximum CPU voltage (mV) C7-M only"); MODULE_AUTHOR("Rafal Bilski "); MODULE_DESCRIPTION("Enhanced PowerSaver driver for VIA C7 CPU's."); -- cgit v1.2.3 From 8efd072b32d67436413e98e25e9a316216e88900 Mon Sep 17 00:00:00 2001 From: Vincent Guittot Date: Thu, 25 Aug 2011 08:31:20 +0200 Subject: [CPUFREQ] ARM: ux500: send cpufreq notification for all cpus The same clock is used for all cpus so we must notify the frequency change for each one in order to update the configuration of all twd clockevents. change since V1: * use policy->cpus instead of cpu_online_mask Signed-off-by: Vincent Guittot Signed-off-by: Dave Jones --- drivers/cpufreq/db8500-cpufreq.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) (limited to 'drivers/cpufreq') diff --git a/drivers/cpufreq/db8500-cpufreq.c b/drivers/cpufreq/db8500-cpufreq.c index d90456a809f..e0acaceca57 100644 --- a/drivers/cpufreq/db8500-cpufreq.c +++ b/drivers/cpufreq/db8500-cpufreq.c @@ -72,13 +72,13 @@ static int db8500_cpufreq_target(struct cpufreq_policy *policy, freqs.old = policy->cur; freqs.new = freq_table[idx].frequency; - freqs.cpu = policy->cpu; if (freqs.old == freqs.new) return 0; /* pre-change notification */ - cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); + for_each_cpu(freqs.cpu, policy->cpus) + cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); /* request the PRCM unit for opp change */ if (prcmu_set_arm_opp(idx2opp[idx])) { @@ -87,7 +87,8 @@ static int db8500_cpufreq_target(struct cpufreq_policy *policy, } /* post change notification */ - cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); + for_each_cpu(freqs.cpu, policy->cpus) + cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); return 0; } -- cgit v1.2.3 From 0073f538c1c35f996982b583f5de7a6a43408b9b Mon Sep 17 00:00:00 2001 From: MyungJoo Ham Date: Thu, 18 Aug 2011 19:45:16 +0900 Subject: [CPUFREQ] ARM Exynos4210 PM/Suspend compatibility with different bootloaders We have various bootloaders for Exynos4210 machines. Some of they set the ARM core frequency at boot time even when the boot is a resume from suspend-to-RAM. Such changes may create inconsistency in the data of CPUFREQ driver and have incurred hang issues with suspend-to-RAM. This patch enables to save and restore CPU frequencies with pm-notifier and sets the frequency at the initial (boot-time) value so that there wouldn't be any inconsistency between bootloader and kernel. This patch does not use CPUFREQ's suspend/resume callbacks because they are syscore-ops, which do not allow to use mutex that is being used by regulators that are used by the target function. This also prevents any CPUFREQ transitions during suspend-resume context, which could be dangerous at noirq-context along with regulator framework. Signed-off-by: MyungJoo Ham Signed-off-by: Kyungmin Park Signed-off-by: Dave Jones --- drivers/cpufreq/exynos4210-cpufreq.c | 106 +++++++++++++++++++++++++++++++++-- 1 file changed, 102 insertions(+), 4 deletions(-) (limited to 'drivers/cpufreq') diff --git a/drivers/cpufreq/exynos4210-cpufreq.c b/drivers/cpufreq/exynos4210-cpufreq.c index 6f887573ce9..ab9741fab92 100644 --- a/drivers/cpufreq/exynos4210-cpufreq.c +++ b/drivers/cpufreq/exynos4210-cpufreq.c @@ -17,6 +17,8 @@ #include #include #include +#include +#include #include #include @@ -36,6 +38,10 @@ static struct regulator *int_regulator; static struct cpufreq_freqs freqs; static unsigned int memtype; +static unsigned int locking_frequency; +static bool frequency_locked; +static DEFINE_MUTEX(cpufreq_lock); + enum exynos4_memory_type { DDR2 = 4, LPDDR2, @@ -405,22 +411,32 @@ static int exynos4_target(struct cpufreq_policy *policy, { unsigned int index, old_index; unsigned int arm_volt, int_volt; + int err = -EINVAL; freqs.old = exynos4_getspeed(policy->cpu); + mutex_lock(&cpufreq_lock); + + if (frequency_locked && target_freq != locking_frequency) { + err = -EAGAIN; + goto out; + } + if (cpufreq_frequency_table_target(policy, exynos4_freq_table, freqs.old, relation, &old_index)) - return -EINVAL; + goto out; if (cpufreq_frequency_table_target(policy, exynos4_freq_table, target_freq, relation, &index)) - return -EINVAL; + goto out; + + err = 0; freqs.new = exynos4_freq_table[index].frequency; freqs.cpu = policy->cpu; if (freqs.new == freqs.old) - return 0; + goto out; /* get the voltage value */ arm_volt = exynos4_volt_table[index].arm_volt; @@ -447,10 +463,16 @@ static int exynos4_target(struct cpufreq_policy *policy, cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); - return 0; +out: + mutex_unlock(&cpufreq_lock); + return err; } #ifdef CONFIG_PM +/* + * These suspend/resume are used as syscore_ops, it is already too + * late to set regulator voltages at this stage. + */ static int exynos4_cpufreq_suspend(struct cpufreq_policy *policy) { return 0; @@ -462,6 +484,78 @@ static int exynos4_cpufreq_resume(struct cpufreq_policy *policy) } #endif +/** + * exynos4_cpufreq_pm_notifier - block CPUFREQ's activities in suspend-resume + * context + * @notifier + * @pm_event + * @v + * + * While frequency_locked == true, target() ignores every frequency but + * locking_frequency. The locking_frequency value is the initial frequency, + * which is set by the bootloader. In order to eliminate possible + * inconsistency in clock values, we save and restore frequencies during + * suspend and resume and block CPUFREQ activities. Note that the standard + * suspend/resume cannot be used as they are too deep (syscore_ops) for + * regulator actions. + */ +static int exynos4_cpufreq_pm_notifier(struct notifier_block *notifier, + unsigned long pm_event, void *v) +{ + struct cpufreq_policy *policy = cpufreq_cpu_get(0); /* boot CPU */ + static unsigned int saved_frequency; + unsigned int temp; + + mutex_lock(&cpufreq_lock); + switch (pm_event) { + case PM_SUSPEND_PREPARE: + if (frequency_locked) + goto out; + frequency_locked = true; + + if (locking_frequency) { + saved_frequency = exynos4_getspeed(0); + + mutex_unlock(&cpufreq_lock); + exynos4_target(policy, locking_frequency, + CPUFREQ_RELATION_H); + mutex_lock(&cpufreq_lock); + } + + break; + case PM_POST_SUSPEND: + + if (saved_frequency) { + /* + * While frequency_locked, only locking_frequency + * is valid for target(). In order to use + * saved_frequency while keeping frequency_locked, + * we temporarly overwrite locking_frequency. + */ + temp = locking_frequency; + locking_frequency = saved_frequency; + + mutex_unlock(&cpufreq_lock); + exynos4_target(policy, locking_frequency, + CPUFREQ_RELATION_H); + mutex_lock(&cpufreq_lock); + + locking_frequency = temp; + } + + frequency_locked = false; + break; + } +out: + mutex_unlock(&cpufreq_lock); + + return NOTIFY_OK; +} + +static struct notifier_block exynos4_cpufreq_nb = { + .notifier_call = exynos4_cpufreq_pm_notifier, +}; + static int exynos4_cpufreq_cpu_init(struct cpufreq_policy *policy) { int ret; @@ -522,6 +616,8 @@ static int __init exynos4_cpufreq_init(void) if (IS_ERR(cpu_clk)) return PTR_ERR(cpu_clk); + locking_frequency = exynos4_getspeed(0); + moutcore = clk_get(NULL, "moutcore"); if (IS_ERR(moutcore)) goto out; @@ -561,6 +657,8 @@ static int __init exynos4_cpufreq_init(void) printk(KERN_DEBUG "%s: memtype= 0x%x\n", __func__, memtype); } + register_pm_notifier(&exynos4_cpufreq_nb); + return cpufreq_register_driver(&exynos4_driver); out: -- cgit v1.2.3 From ded84337ac820700f1b9dda724201e64b2ad3536 Mon Sep 17 00:00:00 2001 From: Axel Lin Date: Tue, 27 Sep 2011 15:11:42 +0800 Subject: [CPUFREQ] db8500: remove unneeded for loop iteration over freq_table Don't know why to do the loop iteration here. It looks unneeded. Signed-off-by: Axel Lin Signed-off-by: Dave Jones --- drivers/cpufreq/db8500-cpufreq.c | 5 ----- 1 file changed, 5 deletions(-) (limited to 'drivers/cpufreq') diff --git a/drivers/cpufreq/db8500-cpufreq.c b/drivers/cpufreq/db8500-cpufreq.c index e0acaceca57..b87236add6b 100644 --- a/drivers/cpufreq/db8500-cpufreq.c +++ b/drivers/cpufreq/db8500-cpufreq.c @@ -105,7 +105,6 @@ static unsigned int db8500_cpufreq_getspeed(unsigned int cpu) static int __cpuinit db8500_cpufreq_init(struct cpufreq_policy *policy) { int res; - int i; BUILD_BUG_ON(ARRAY_SIZE(idx2opp) + 1 != ARRAY_SIZE(freq_table)); @@ -128,10 +127,6 @@ static int __cpuinit db8500_cpufreq_init(struct cpufreq_policy *policy) policy->min = policy->cpuinfo.min_freq; policy->max = policy->cpuinfo.max_freq; policy->cur = db8500_cpufreq_getspeed(policy->cpu); - - for (i = 0; freq_table[i].frequency != policy->cur; i++) - ; - policy->governor = CPUFREQ_DEFAULT_GOVERNOR; /* -- cgit v1.2.3 From 6283e328fb8148a8a5753e95c04c16aaef2287c0 Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Fri, 2 Sep 2011 08:52:10 +0200 Subject: [CPUFREQ] db8500: support all frequencies This adds support for the 200 MHz frequency mode of the DB8500 SoC, and prints the available frequencies at init time. Cc: Vincent Guittot Signed-off-by: Linus Walleij Signed-off-by: Dave Jones --- drivers/cpufreq/db8500-cpufreq.c | 24 ++++++++++++++++-------- 1 file changed, 16 insertions(+), 8 deletions(-) (limited to 'drivers/cpufreq') diff --git a/drivers/cpufreq/db8500-cpufreq.c b/drivers/cpufreq/db8500-cpufreq.c index b87236add6b..eedfc99c75f 100644 --- a/drivers/cpufreq/db8500-cpufreq.c +++ b/drivers/cpufreq/db8500-cpufreq.c @@ -18,24 +18,29 @@ static struct cpufreq_frequency_table freq_table[] = { [0] = { .index = 0, - .frequency = 300000, + .frequency = 200000, }, [1] = { .index = 1, - .frequency = 600000, + .frequency = 300000, }, [2] = { - /* Used for MAX_OPP, if available */ .index = 2, - .frequency = CPUFREQ_TABLE_END, + .frequency = 600000, }, [3] = { + /* Used for MAX_OPP, if available */ .index = 3, .frequency = CPUFREQ_TABLE_END, }, + [4] = { + .index = 4, + .frequency = CPUFREQ_TABLE_END, + }, }; static enum arm_opp idx2opp[] = { + ARM_EXTCLK, ARM_50_OPP, ARM_100_OPP, ARM_MAX_OPP @@ -108,12 +113,15 @@ static int __cpuinit db8500_cpufreq_init(struct cpufreq_policy *policy) BUILD_BUG_ON(ARRAY_SIZE(idx2opp) + 1 != ARRAY_SIZE(freq_table)); - if (cpu_is_u8500v2() && !prcmu_is_u8400()) { - freq_table[0].frequency = 400000; - freq_table[1].frequency = 800000; + if (!prcmu_is_u8400()) { + freq_table[1].frequency = 400000; + freq_table[2].frequency = 800000; if (prcmu_has_arm_maxopp()) - freq_table[2].frequency = 1000000; + freq_table[3].frequency = 1000000; } + pr_info("db8500-cpufreq : Available frequencies:\n"); + while (freq_table[i].frequency != CPUFREQ_TABLE_END) + pr_info(" %d Mhz\n", freq_table[i++].frequency/1000); /* get policy fields based on the table */ res = cpufreq_frequency_table_cpuinfo(policy, freq_table); -- cgit v1.2.3