From 1cc2df9d6f41b689dc9a562a22de87f860ce6be5 Mon Sep 17 00:00:00 2001 From: Zhiwu Song Date: Mon, 13 Feb 2012 17:45:38 +0800 Subject: SPI: add CSR SiRFprimaII SPI controller driver CSR SiRFprimaII has two SPIs (SPI0 and SPI1). Features: * Master and slave modes * 8-/12-/16-/32-bit data unit * 256 bytes receive data FIFO and 256 bytes transmit data FIFO * Multi-unit frame * Configurable SPI_EN (chip select pin) active state * Configurable SPI_CLK polarity * Configurable SPI_CLK phase * Configurable MSB/LSB first Signed-off-by: Zhiwu Song Signed-off-by: Barry Song Signed-off-by: Grant Likely --- drivers/spi/Makefile | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers/spi/Makefile') diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile index d9a7aed4ae9..2e556484345 100644 --- a/drivers/spi/Makefile +++ b/drivers/spi/Makefile @@ -53,6 +53,7 @@ obj-$(CONFIG_SPI_SH) += spi-sh.o obj-$(CONFIG_SPI_SH_HSPI) += spi-sh-hspi.o obj-$(CONFIG_SPI_SH_MSIOF) += spi-sh-msiof.o obj-$(CONFIG_SPI_SH_SCI) += spi-sh-sci.o +obj-$(CONFIG_SPI_SIRF) += spi-sirf.o obj-$(CONFIG_SPI_STMP3XXX) += spi-stmp.o obj-$(CONFIG_SPI_TEGRA) += spi-tegra.o obj-$(CONFIG_SPI_TI_SSP) += spi-ti-ssp.o -- cgit v1.2.3