From 27e34995e1a863c1e9beba30e51dfe2a083f918d Mon Sep 17 00:00:00 2001 From: Rabin Vincent Date: Fri, 2 Jul 2010 16:52:08 +0530 Subject: mfd: Add STMPE I/O Expander support Add support for the STMPE family of I/O Expanders from STMicroelectronics. These devices include upto 24 gpios and a varying selection of blocks, including PWM, keypad, and touchscreen controllers. This patch adds the MFD core. [l.fu@pengutronix.de: fix stmpe811 enable hook] [l.fu@pengutronix.de: add touchscreen platform data] Acked-by: Luotao Fu Acked-by: Linus Walleij Signed-off-by: Rabin Vincent Signed-off-by: Samuel Ortiz --- include/linux/mfd/stmpe.h | 197 ++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 197 insertions(+) create mode 100644 include/linux/mfd/stmpe.h (limited to 'include') diff --git a/include/linux/mfd/stmpe.h b/include/linux/mfd/stmpe.h new file mode 100644 index 00000000000..90faa98b577 --- /dev/null +++ b/include/linux/mfd/stmpe.h @@ -0,0 +1,197 @@ +/* + * Copyright (C) ST-Ericsson SA 2010 + * + * License Terms: GNU General Public License, version 2 + * Author: Rabin Vincent for ST-Ericsson + */ + +#ifndef __LINUX_MFD_STMPE_H +#define __LINUX_MFD_STMPE_H + +#include + +enum stmpe_block { + STMPE_BLOCK_GPIO = 1 << 0, + STMPE_BLOCK_KEYPAD = 1 << 1, + STMPE_BLOCK_TOUCHSCREEN = 1 << 2, + STMPE_BLOCK_ADC = 1 << 3, + STMPE_BLOCK_PWM = 1 << 4, + STMPE_BLOCK_ROTATOR = 1 << 5, +}; + +enum stmpe_partnum { + STMPE811, + STMPE1601, + STMPE2401, + STMPE2403, +}; + +/* + * For registers whose locations differ on variants, the correct address is + * obtained by indexing stmpe->regs with one of the following. + */ +enum { + STMPE_IDX_CHIP_ID, + STMPE_IDX_ICR_LSB, + STMPE_IDX_IER_LSB, + STMPE_IDX_ISR_MSB, + STMPE_IDX_GPMR_LSB, + STMPE_IDX_GPSR_LSB, + STMPE_IDX_GPCR_LSB, + STMPE_IDX_GPDR_LSB, + STMPE_IDX_GPEDR_MSB, + STMPE_IDX_GPRER_LSB, + STMPE_IDX_GPFER_LSB, + STMPE_IDX_GPAFR_U_MSB, + STMPE_IDX_IEGPIOR_LSB, + STMPE_IDX_ISGPIOR_MSB, + STMPE_IDX_MAX, +}; + + +struct stmpe_variant_info; + +/** + * struct stmpe - STMPE MFD structure + * @lock: lock protecting I/O operations + * @irq_lock: IRQ bus lock + * @dev: device, mostly for dev_dbg() + * @i2c: i2c client + * @variant: the detected STMPE model number + * @regs: list of addresses of registers which are at different addresses on + * different variants. Indexed by one of STMPE_IDX_*. + * @irq_base: starting IRQ number for internal IRQs + * @num_gpios: number of gpios, differs for variants + * @ier: cache of IER registers for bus_lock + * @oldier: cache of IER registers for bus_lock + * @pdata: platform data + */ +struct stmpe { + struct mutex lock; + struct mutex irq_lock; + struct device *dev; + struct i2c_client *i2c; + enum stmpe_partnum partnum; + struct stmpe_variant_info *variant; + const u8 *regs; + + int irq_base; + int num_gpios; + u8 ier[2]; + u8 oldier[2]; + struct stmpe_platform_data *pdata; +}; + +extern int stmpe_reg_write(struct stmpe *stmpe, u8 reg, u8 data); +extern int stmpe_reg_read(struct stmpe *stmpe, u8 reg); +extern int stmpe_block_read(struct stmpe *stmpe, u8 reg, u8 length, + u8 *values); +extern int stmpe_block_write(struct stmpe *stmpe, u8 reg, u8 length, + const u8 *values); +extern int stmpe_set_bits(struct stmpe *stmpe, u8 reg, u8 mask, u8 val); +extern int stmpe_set_altfunc(struct stmpe *stmpe, u32 pins, + enum stmpe_block block); +extern int stmpe_enable(struct stmpe *stmpe, unsigned int blocks); +extern int stmpe_disable(struct stmpe *stmpe, unsigned int blocks); + +struct matrix_keymap_data; + +/** + * struct stmpe_keypad_platform_data - STMPE keypad platform data + * @keymap_data: key map table and size + * @debounce_ms: debounce interval, in ms. Maximum is + * %STMPE_KEYPAD_MAX_DEBOUNCE. + * @scan_count: number of key scanning cycles to confirm key data. + * Maximum is %STMPE_KEYPAD_MAX_SCAN_COUNT. + * @no_autorepeat: disable key autorepeat + */ +struct stmpe_keypad_platform_data { + struct matrix_keymap_data *keymap_data; + unsigned int debounce_ms; + unsigned int scan_count; + bool no_autorepeat; +}; + +/** + * struct stmpe_gpio_platform_data - STMPE GPIO platform data + * @gpio_base: first gpio number assigned. A maximum of + * %STMPE_NR_GPIOS GPIOs will be allocated. + */ +struct stmpe_gpio_platform_data { + int gpio_base; + void (*setup)(struct stmpe *stmpe, unsigned gpio_base); + void (*remove)(struct stmpe *stmpe, unsigned gpio_base); +}; + +/** + * struct stmpe_ts_platform_data - stmpe811 touch screen controller platform + * data + * @sample_time: ADC converstion time in number of clock. + * (0 -> 36 clocks, 1 -> 44 clocks, 2 -> 56 clocks, 3 -> 64 clocks, + * 4 -> 80 clocks, 5 -> 96 clocks, 6 -> 144 clocks), + * recommended is 4. + * @mod_12b: ADC Bit mode (0 -> 10bit ADC, 1 -> 12bit ADC) + * @ref_sel: ADC reference source + * (0 -> internal reference, 1 -> external reference) + * @adc_freq: ADC Clock speed + * (0 -> 1.625 MHz, 1 -> 3.25 MHz, 2 || 3 -> 6.5 MHz) + * @ave_ctrl: Sample average control + * (0 -> 1 sample, 1 -> 2 samples, 2 -> 4 samples, 3 -> 8 samples) + * @touch_det_delay: Touch detect interrupt delay + * (0 -> 10 us, 1 -> 50 us, 2 -> 100 us, 3 -> 500 us, + * 4-> 1 ms, 5 -> 5 ms, 6 -> 10 ms, 7 -> 50 ms) + * recommended is 3 + * @settling: Panel driver settling time + * (0 -> 10 us, 1 -> 100 us, 2 -> 500 us, 3 -> 1 ms, + * 4 -> 5 ms, 5 -> 10 ms, 6 for 50 ms, 7 -> 100 ms) + * recommended is 2 + * @fraction_z: Length of the fractional part in z + * (fraction_z ([0..7]) = Count of the fractional part) + * recommended is 7 + * @i_drive: current limit value of the touchscreen drivers + * (0 -> 20 mA typical 35 mA max, 1 -> 50 mA typical 80 mA max) + * + * */ +struct stmpe_ts_platform_data { + u8 sample_time; + u8 mod_12b; + u8 ref_sel; + u8 adc_freq; + u8 ave_ctrl; + u8 touch_det_delay; + u8 settling; + u8 fraction_z; + u8 i_drive; +}; + +/** + * struct stmpe_platform_data - STMPE platform data + * @id: device id to distinguish between multiple STMPEs on the same board + * @blocks: bitmask of blocks to enable (use STMPE_BLOCK_*) + * @irq_trigger: IRQ trigger to use for the interrupt to the host + * @irq_invert_polarity: IRQ line is connected with reversed polarity + * @irq_base: base IRQ number. %STMPE_NR_IRQS irqs will be used, or + * %STMPE_NR_INTERNAL_IRQS if the GPIO driver is not used. + * @gpio: GPIO-specific platform data + * @keypad: keypad-specific platform data + * @ts: touchscreen-specific platform data + */ +struct stmpe_platform_data { + int id; + unsigned int blocks; + int irq_base; + unsigned int irq_trigger; + bool irq_invert_polarity; + + struct stmpe_gpio_platform_data *gpio; + struct stmpe_keypad_platform_data *keypad; + struct stmpe_ts_platform_data *ts; +}; + +#define STMPE_NR_INTERNAL_IRQS 9 +#define STMPE_INT_GPIO(x) (STMPE_NR_INTERNAL_IRQS + (x)) + +#define STMPE_NR_GPIOS 24 +#define STMPE_NR_IRQS STMPE_INT_GPIO(STMPE_NR_GPIOS) + +#endif -- cgit v1.2.3 From 91f4debf5e2df904e7fade530bd1a6d182efd72c Mon Sep 17 00:00:00 2001 From: Lars-Peter Clausen Date: Mon, 12 Jul 2010 03:48:08 +0200 Subject: mfd: Add JZ4740 ADC driver This patch adds a MFD driver for the JZ4740 ADC unit. The driver is used to demultiplex IRQs and synchronize access to shared registers between the battery, hwmon and (future) touchscreen driver. Signed-off-by: Lars-Peter Clausen Signed-off-by: Samuel Ortiz --- drivers/mfd/Kconfig | 8 + drivers/mfd/Makefile | 1 + drivers/mfd/jz4740-adc.c | 384 +++++++++++++++++++++++++++++++++++++++++++++ include/linux/jz4740-adc.h | 32 ++++ 4 files changed, 425 insertions(+) create mode 100644 drivers/mfd/jz4740-adc.c create mode 100644 include/linux/jz4740-adc.h (limited to 'include') diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index 8f5145b4b56..d59334f34bf 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -514,6 +514,14 @@ config MFD_JANZ_CMODIO host many different types of MODULbus daughterboards, including CAN and GPIO controllers. +config MFD_JZ4740_ADC + tristate "Support for the JZ4740 SoC ADC core" + select MFD_CORE + depends on MACH_JZ4740 + help + Say yes here if you want support for the ADC unit in the JZ4740 SoC. + This driver is necessary for jz4740-battery and jz4740-hwmon driver. + endif # MFD_SUPPORT menu "Multimedia Capabilities Port drivers" diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile index 4410747f7b5..1f707796699 100644 --- a/drivers/mfd/Makefile +++ b/drivers/mfd/Makefile @@ -72,3 +72,4 @@ obj-$(CONFIG_PMIC_ADP5520) += adp5520.o obj-$(CONFIG_LPC_SCH) += lpc_sch.o obj-$(CONFIG_MFD_RDC321X) += rdc321x-southbridge.o obj-$(CONFIG_MFD_JANZ_CMODIO) += janz-cmodio.o +obj-$(CONFIG_MFD_JZ4740_ADC) += jz4740-adc.o diff --git a/drivers/mfd/jz4740-adc.c b/drivers/mfd/jz4740-adc.c new file mode 100644 index 00000000000..7a844aef5dc --- /dev/null +++ b/drivers/mfd/jz4740-adc.c @@ -0,0 +1,384 @@ +/* + * Copyright (C) 2009-2010, Lars-Peter Clausen + * JZ4740 SoC ADC driver + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 675 Mass Ave, Cambridge, MA 02139, USA. + * + * This driver synchronizes access to the JZ4740 ADC core between the + * JZ4740 battery and hwmon drivers. + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#include + + +#define JZ_REG_ADC_ENABLE 0x00 +#define JZ_REG_ADC_CFG 0x04 +#define JZ_REG_ADC_CTRL 0x08 +#define JZ_REG_ADC_STATUS 0x0c + +#define JZ_REG_ADC_TOUCHSCREEN_BASE 0x10 +#define JZ_REG_ADC_BATTERY_BASE 0x1c +#define JZ_REG_ADC_HWMON_BASE 0x20 + +#define JZ_ADC_ENABLE_TOUCH BIT(2) +#define JZ_ADC_ENABLE_BATTERY BIT(1) +#define JZ_ADC_ENABLE_ADCIN BIT(0) + +enum { + JZ_ADC_IRQ_ADCIN = 0, + JZ_ADC_IRQ_BATTERY, + JZ_ADC_IRQ_TOUCH, + JZ_ADC_IRQ_PENUP, + JZ_ADC_IRQ_PENDOWN, +}; + +struct jz4740_adc { + struct resource *mem; + void __iomem *base; + + int irq; + int irq_base; + + struct clk *clk; + atomic_t clk_ref; + + spinlock_t lock; +}; + +static inline void jz4740_adc_irq_set_masked(struct jz4740_adc *adc, int irq, + bool masked) +{ + unsigned long flags; + uint8_t val; + + irq -= adc->irq_base; + + spin_lock_irqsave(&adc->lock, flags); + + val = readb(adc->base + JZ_REG_ADC_CTRL); + if (masked) + val |= BIT(irq); + else + val &= ~BIT(irq); + writeb(val, adc->base + JZ_REG_ADC_CTRL); + + spin_unlock_irqrestore(&adc->lock, flags); +} + +static void jz4740_adc_irq_mask(unsigned int irq) +{ + struct jz4740_adc *adc = get_irq_chip_data(irq); + jz4740_adc_irq_set_masked(adc, irq, true); +} + +static void jz4740_adc_irq_unmask(unsigned int irq) +{ + struct jz4740_adc *adc = get_irq_chip_data(irq); + jz4740_adc_irq_set_masked(adc, irq, false); +} + +static void jz4740_adc_irq_ack(unsigned int irq) +{ + struct jz4740_adc *adc = get_irq_chip_data(irq); + + irq -= adc->irq_base; + writeb(BIT(irq), adc->base + JZ_REG_ADC_STATUS); +} + +static struct irq_chip jz4740_adc_irq_chip = { + .name = "jz4740-adc", + .mask = jz4740_adc_irq_mask, + .unmask = jz4740_adc_irq_unmask, + .ack = jz4740_adc_irq_ack, +}; + +static void jz4740_adc_irq_demux(unsigned int irq, struct irq_desc *desc) +{ + struct jz4740_adc *adc = get_irq_desc_data(desc); + uint8_t status; + unsigned int i; + + status = readb(adc->base + JZ_REG_ADC_STATUS); + + for (i = 0; i < 5; ++i) { + if (status & BIT(i)) + generic_handle_irq(adc->irq_base + i); + } +} + + +/* Refcounting for the ADC clock is done in here instead of in the clock + * framework, because it is the only clock which is shared between multiple + * devices and thus is the only clock which needs refcounting */ +static inline void jz4740_adc_clk_enable(struct jz4740_adc *adc) +{ + if (atomic_inc_return(&adc->clk_ref) == 1) + clk_enable(adc->clk); +} + +static inline void jz4740_adc_clk_disable(struct jz4740_adc *adc) +{ + if (atomic_dec_return(&adc->clk_ref) == 0) + clk_disable(adc->clk); +} + +static inline void jz4740_adc_set_enabled(struct jz4740_adc *adc, int engine, + bool enabled) +{ + unsigned long flags; + uint8_t val; + + spin_lock_irqsave(&adc->lock, flags); + + val = readb(adc->base + JZ_REG_ADC_ENABLE); + if (enabled) + val |= BIT(engine); + else + val &= BIT(engine); + writeb(val, adc->base + JZ_REG_ADC_ENABLE); + + spin_unlock_irqrestore(&adc->lock, flags); +} + +static int jz4740_adc_cell_enable(struct platform_device *pdev) +{ + struct jz4740_adc *adc = dev_get_drvdata(pdev->dev.parent); + + jz4740_adc_clk_enable(adc); + jz4740_adc_set_enabled(adc, pdev->id, true); + + return 0; +} + +static int jz4740_adc_cell_disable(struct platform_device *pdev) +{ + struct jz4740_adc *adc = dev_get_drvdata(pdev->dev.parent); + + jz4740_adc_set_enabled(adc, pdev->id, false); + jz4740_adc_clk_disable(adc); + + return 0; +} + +int jz4740_adc_set_config(struct device *dev, uint32_t mask, uint32_t val) +{ + struct jz4740_adc *adc = dev_get_drvdata(dev); + unsigned long flags; + uint32_t cfg; + + if (!adc) + return -ENODEV; + + spin_lock_irqsave(&adc->lock, flags); + + cfg = readl(adc->base + JZ_REG_ADC_CFG); + + cfg &= ~mask; + cfg |= val; + + writel(cfg, adc->base + JZ_REG_ADC_CFG); + + spin_unlock_irqrestore(&adc->lock, flags); + + return 0; +} +EXPORT_SYMBOL_GPL(jz4740_adc_set_config); + +static struct resource jz4740_hwmon_resources[] = { + { + .start = JZ_ADC_IRQ_ADCIN, + .flags = IORESOURCE_IRQ, + }, + { + .start = JZ_REG_ADC_HWMON_BASE, + .end = JZ_REG_ADC_HWMON_BASE + 3, + .flags = IORESOURCE_MEM, + }, +}; + +static struct resource jz4740_battery_resources[] = { + { + .start = JZ_ADC_IRQ_BATTERY, + .flags = IORESOURCE_IRQ, + }, + { + .start = JZ_REG_ADC_BATTERY_BASE, + .end = JZ_REG_ADC_BATTERY_BASE + 3, + .flags = IORESOURCE_MEM, + }, +}; + +const struct mfd_cell jz4740_adc_cells[] = { + { + .id = 0, + .name = "jz4740-hwmon", + .num_resources = ARRAY_SIZE(jz4740_hwmon_resources), + .resources = jz4740_hwmon_resources, + .platform_data = (void *)&jz4740_adc_cells[0], + .data_size = sizeof(struct mfd_cell), + + .enable = jz4740_adc_cell_enable, + .disable = jz4740_adc_cell_disable, + }, + { + .id = 1, + .name = "jz4740-battery", + .num_resources = ARRAY_SIZE(jz4740_battery_resources), + .resources = jz4740_battery_resources, + .platform_data = (void *)&jz4740_adc_cells[1], + .data_size = sizeof(struct mfd_cell), + + .enable = jz4740_adc_cell_enable, + .disable = jz4740_adc_cell_disable, + }, +}; + +static int __devinit jz4740_adc_probe(struct platform_device *pdev) +{ + int ret; + struct jz4740_adc *adc; + struct resource *mem_base; + int irq; + + adc = kmalloc(sizeof(*adc), GFP_KERNEL); + + adc->irq = platform_get_irq(pdev, 0); + if (adc->irq < 0) { + ret = adc->irq; + dev_err(&pdev->dev, "Failed to get platform irq: %d\n", ret); + goto err_free; + } + + adc->irq_base = platform_get_irq(pdev, 1); + if (adc->irq_base < 0) { + ret = adc->irq_base; + dev_err(&pdev->dev, "Failed to get irq base: %d\n", ret); + goto err_free; + } + + mem_base = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!mem_base) { + ret = -ENOENT; + dev_err(&pdev->dev, "Failed to get platform mmio resource\n"); + goto err_free; + } + + /* Only request the shared registers for the MFD driver */ + adc->mem = request_mem_region(mem_base->start, JZ_REG_ADC_STATUS, + pdev->name); + if (!adc->mem) { + ret = -EBUSY; + dev_err(&pdev->dev, "Failed to request mmio memory region\n"); + goto err_free; + } + + adc->base = ioremap_nocache(adc->mem->start, resource_size(adc->mem)); + if (!adc->base) { + ret = -EBUSY; + dev_err(&pdev->dev, "Failed to ioremap mmio memory\n"); + goto err_release_mem_region; + } + + adc->clk = clk_get(&pdev->dev, "adc"); + if (IS_ERR(adc->clk)) { + ret = PTR_ERR(adc->clk); + dev_err(&pdev->dev, "Failed to get clock: %d\n", ret); + goto err_iounmap; + } + + spin_lock_init(&adc->lock); + atomic_set(&adc->clk_ref, 0); + + platform_set_drvdata(pdev, adc); + + for (irq = adc->irq_base; irq < adc->irq_base + 5; ++irq) { + set_irq_chip_data(irq, adc); + set_irq_chip_and_handler(irq, &jz4740_adc_irq_chip, + handle_level_irq); + } + + set_irq_data(adc->irq, adc); + set_irq_chained_handler(adc->irq, jz4740_adc_irq_demux); + + writeb(0x00, adc->base + JZ_REG_ADC_ENABLE); + writeb(0xff, adc->base + JZ_REG_ADC_CTRL); + + return mfd_add_devices(&pdev->dev, 0, jz4740_adc_cells, + ARRAY_SIZE(jz4740_adc_cells), mem_base, adc->irq_base); + +err_iounmap: + platform_set_drvdata(pdev, NULL); + iounmap(adc->base); +err_release_mem_region: + release_mem_region(adc->mem->start, resource_size(adc->mem)); +err_free: + kfree(adc); + + return ret; +} + +static int __devexit jz4740_adc_remove(struct platform_device *pdev) +{ + struct jz4740_adc *adc = platform_get_drvdata(pdev); + + mfd_remove_devices(&pdev->dev); + + set_irq_data(adc->irq, NULL); + set_irq_chained_handler(adc->irq, NULL); + + iounmap(adc->base); + release_mem_region(adc->mem->start, resource_size(adc->mem)); + + clk_put(adc->clk); + + platform_set_drvdata(pdev, NULL); + + kfree(adc); + + return 0; +} + +struct platform_driver jz4740_adc_driver = { + .probe = jz4740_adc_probe, + .remove = __devexit_p(jz4740_adc_remove), + .driver = { + .name = "jz4740-adc", + .owner = THIS_MODULE, + }, +}; + +static int __init jz4740_adc_init(void) +{ + return platform_driver_register(&jz4740_adc_driver); +} +module_init(jz4740_adc_init); + +static void __exit jz4740_adc_exit(void) +{ + platform_driver_unregister(&jz4740_adc_driver); +} +module_exit(jz4740_adc_exit); + +MODULE_DESCRIPTION("JZ4740 SoC ADC driver"); +MODULE_AUTHOR("Lars-Peter Clausen "); +MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform:jz4740-adc"); diff --git a/include/linux/jz4740-adc.h b/include/linux/jz4740-adc.h new file mode 100644 index 00000000000..9053f95e968 --- /dev/null +++ b/include/linux/jz4740-adc.h @@ -0,0 +1,32 @@ + +#ifndef __LINUX_JZ4740_ADC +#define __LINUX_JZ4740_ADC + +#include + +/* + * jz4740_adc_set_config - Configure a JZ4740 adc device + * @dev: Pointer to a jz4740-adc device + * @mask: Mask for the config value to be set + * @val: Value to be set + * + * This function can be used by the JZ4740 ADC mfd cells to configure their + * options in the shared config register. +*/ +int jz4740_adc_set_config(struct device *dev, uint32_t mask, uint32_t val); + +#define JZ_ADC_CONFIG_SPZZ BIT(31) +#define JZ_ADC_CONFIG_EX_IN BIT(30) +#define JZ_ADC_CONFIG_DNUM_MASK (0x7 << 16) +#define JZ_ADC_CONFIG_DMA_ENABLE BIT(15) +#define JZ_ADC_CONFIG_XYZ_MASK (0x2 << 13) +#define JZ_ADC_CONFIG_SAMPLE_NUM_MASK (0x7 << 10) +#define JZ_ADC_CONFIG_CLKDIV_MASK (0xf << 5) +#define JZ_ADC_CONFIG_BAT_MB BIT(4) + +#define JZ_ADC_CONFIG_DNUM(dnum) ((dnum) << 16) +#define JZ_ADC_CONFIG_XYZ_OFFSET(dnum) ((xyz) << 13) +#define JZ_ADC_CONFIG_SAMPLE_NUM(x) ((x) << 10) +#define JZ_ADC_CONFIG_CLKDIV(div) ((div) << 5) + +#endif -- cgit v1.2.3 From 9accdc1bf239ef20c0fe12ceff2a7532374fd7cd Mon Sep 17 00:00:00 2001 From: Mark Brown Date: Thu, 8 Jul 2010 21:09:51 +0900 Subject: mfd: Add additional WM8994 GPIO functions Later revisions of the WM8994 add some more GPIO functions, define them in the header file. Signed-off-by: Mark Brown Signed-off-by: Samuel Ortiz --- include/linux/mfd/wm8994/gpio.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'include') diff --git a/include/linux/mfd/wm8994/gpio.h b/include/linux/mfd/wm8994/gpio.h index b4d4c22991e..0c79b5ff4b5 100644 --- a/include/linux/mfd/wm8994/gpio.h +++ b/include/linux/mfd/wm8994/gpio.h @@ -36,6 +36,10 @@ #define WM8994_GP_FN_WSEQ_STATUS 16 #define WM8994_GP_FN_FIFO_ERROR 17 #define WM8994_GP_FN_OPCLK 18 +#define WM8994_GP_FN_THW 19 +#define WM8994_GP_FN_DCS_DONE 20 +#define WM8994_GP_FN_FLL1_OUT 21 +#define WM8994_GP_FN_FLL2_OUT 22 #define WM8994_GPN_DIR 0x8000 /* GPN_DIR */ #define WM8994_GPN_DIR_MASK 0x8000 /* GPN_DIR */ -- cgit v1.2.3 From 5981f4e65cb455a820b3d07b8e4bac506233f3ea Mon Sep 17 00:00:00 2001 From: Sundar R Iyer Date: Wed, 21 Jul 2010 11:41:07 +0530 Subject: mfd: Add stmpe auto sleep feature Some STMPE devices support entering sleep mode automatically on a specified timeout of inactivity on the I2C bus with the host system. Acked-by: Linus Walleij Acked-by: Rabin Vincent Signed-off-by: Sundar R Iyer Signed-off-by: Samuel Ortiz --- drivers/mfd/stmpe.c | 70 +++++++++++++++++++++++++++++++++++++++++++++++ drivers/mfd/stmpe.h | 7 +++++ include/linux/mfd/stmpe.h | 4 +++ 3 files changed, 81 insertions(+) (limited to 'include') diff --git a/drivers/mfd/stmpe.c b/drivers/mfd/stmpe.c index a7f3099fdcf..0754c5e9199 100644 --- a/drivers/mfd/stmpe.c +++ b/drivers/mfd/stmpe.c @@ -455,6 +455,67 @@ static struct stmpe_variant_block stmpe1601_blocks[] = { }, }; +/* supported autosleep timeout delay (in msecs) */ +static const int stmpe_autosleep_delay[] = { + 4, 16, 32, 64, 128, 256, 512, 1024, +}; + +static int stmpe_round_timeout(int timeout) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(stmpe_autosleep_delay); i++) { + if (stmpe_autosleep_delay[i] >= timeout) + return i; + } + + /* + * requests for delays longer than supported should not return the + * longest supported delay + */ + return -EINVAL; +} + +static int stmpe_autosleep(struct stmpe *stmpe, int autosleep_timeout) +{ + int ret; + + if (!stmpe->variant->enable_autosleep) + return -ENOSYS; + + mutex_lock(&stmpe->lock); + ret = stmpe->variant->enable_autosleep(stmpe, autosleep_timeout); + mutex_unlock(&stmpe->lock); + + return ret; +} + +/* + * Both stmpe 1601/2403 support same layout for autosleep + */ +static int stmpe1601_autosleep(struct stmpe *stmpe, + int autosleep_timeout) +{ + int ret, timeout; + + /* choose the best available timeout */ + timeout = stmpe_round_timeout(autosleep_timeout); + if (timeout < 0) { + dev_err(stmpe->dev, "invalid timeout\n"); + return timeout; + } + + ret = __stmpe_set_bits(stmpe, STMPE1601_REG_SYS_CTRL2, + STMPE1601_AUTOSLEEP_TIMEOUT_MASK, + timeout); + if (ret < 0) + return ret; + + return __stmpe_set_bits(stmpe, STMPE1601_REG_SYS_CTRL2, + STPME1601_AUTOSLEEP_ENABLE, + STPME1601_AUTOSLEEP_ENABLE); +} + static int stmpe1601_enable(struct stmpe *stmpe, unsigned int blocks, bool enable) { @@ -497,6 +558,7 @@ static struct stmpe_variant_info stmpe1601 = { .num_irqs = STMPE1601_NR_INTERNAL_IRQS, .enable = stmpe1601_enable, .get_altfunc = stmpe1601_get_altfunc, + .enable_autosleep = stmpe1601_autosleep, }; /* @@ -589,6 +651,7 @@ static struct stmpe_variant_info stmpe2403 = { .num_irqs = STMPE24XX_NR_INTERNAL_IRQS, .enable = stmpe24xx_enable, .get_altfunc = stmpe24xx_get_altfunc, + .enable_autosleep = stmpe1601_autosleep, /* same as stmpe1601 */ }; static struct stmpe_variant_info *stmpe_variant_info[] = { @@ -731,6 +794,7 @@ static void stmpe_irq_remove(struct stmpe *stmpe) static int __devinit stmpe_chip_init(struct stmpe *stmpe) { unsigned int irq_trigger = stmpe->pdata->irq_trigger; + int autosleep_timeout = stmpe->pdata->autosleep_timeout; struct stmpe_variant_info *variant = stmpe->variant; u8 icr = STMPE_ICR_LSB_GIM; unsigned int id; @@ -766,6 +830,12 @@ static int __devinit stmpe_chip_init(struct stmpe *stmpe) if (stmpe->pdata->irq_invert_polarity) icr ^= STMPE_ICR_LSB_HIGH; + if (stmpe->pdata->autosleep) { + ret = stmpe_autosleep(stmpe, autosleep_timeout); + if (ret) + return ret; + } + return stmpe_reg_write(stmpe, stmpe->regs[STMPE_IDX_ICR_LSB], icr); } diff --git a/drivers/mfd/stmpe.h b/drivers/mfd/stmpe.h index 991f0ecbeb3..0dbdc4e8cd7 100644 --- a/drivers/mfd/stmpe.h +++ b/drivers/mfd/stmpe.h @@ -49,6 +49,7 @@ struct stmpe_variant_block { * Called with the I/O lock held. * @get_altfunc: callback to get the alternate function number for the * specific block + * @enable_autosleep: callback to configure autosleep with specified timeout */ struct stmpe_variant_info { const char *name; @@ -62,6 +63,7 @@ struct stmpe_variant_info { int num_irqs; int (*enable)(struct stmpe *stmpe, unsigned int blocks, bool enable); int (*get_altfunc)(struct stmpe *stmpe, enum stmpe_block block); + int (*enable_autosleep)(struct stmpe *stmpe, int autosleep_timeout); }; #define STMPE_ICR_LSB_HIGH (1 << 2) @@ -118,6 +120,7 @@ struct stmpe_variant_info { #define STMPE1601_NR_INTERNAL_IRQS 9 #define STMPE1601_REG_SYS_CTRL 0x02 +#define STMPE1601_REG_SYS_CTRL2 0x03 #define STMPE1601_REG_ICR_LSB 0x11 #define STMPE1601_REG_IER_LSB 0x13 #define STMPE1601_REG_ISR_MSB 0x14 @@ -137,6 +140,10 @@ struct stmpe_variant_info { #define STMPE1601_SYS_CTRL_ENABLE_KPC (1 << 1) #define STMPE1601_SYSCON_ENABLE_SPWM (1 << 0) +/* The 1601/2403 share the same masks */ +#define STMPE1601_AUTOSLEEP_TIMEOUT_MASK (0x7) +#define STPME1601_AUTOSLEEP_ENABLE (1 << 3) + /* * STMPE24xx */ diff --git a/include/linux/mfd/stmpe.h b/include/linux/mfd/stmpe.h index 90faa98b577..39ca7588659 100644 --- a/include/linux/mfd/stmpe.h +++ b/include/linux/mfd/stmpe.h @@ -170,6 +170,8 @@ struct stmpe_ts_platform_data { * @blocks: bitmask of blocks to enable (use STMPE_BLOCK_*) * @irq_trigger: IRQ trigger to use for the interrupt to the host * @irq_invert_polarity: IRQ line is connected with reversed polarity + * @autosleep: bool to enable/disable stmpe autosleep + * @autosleep_timeout: inactivity timeout in milliseconds for autosleep * @irq_base: base IRQ number. %STMPE_NR_IRQS irqs will be used, or * %STMPE_NR_INTERNAL_IRQS if the GPIO driver is not used. * @gpio: GPIO-specific platform data @@ -182,6 +184,8 @@ struct stmpe_platform_data { int irq_base; unsigned int irq_trigger; bool irq_invert_polarity; + bool autosleep; + int autosleep_timeout; struct stmpe_gpio_platform_data *gpio; struct stmpe_keypad_platform_data *keypad; -- cgit v1.2.3 From 3b16bb539c558cd523ea380653d4bf24a8c9e833 Mon Sep 17 00:00:00 2001 From: Uwe Kleine-König Date: Mon, 2 Aug 2010 11:14:17 +0200 Subject: mfd: New mc13783 function exposing flags MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This is needed for the mc13783-adc driver to decide if a touch screen is connected. If so some channels are not available as generic hwmon inputs. Signed-off-by: Uwe Kleine-König Signed-off-by: Samuel Ortiz --- drivers/mfd/mc13783-core.c | 6 ++++++ include/linux/mfd/mc13783.h | 2 ++ 2 files changed, 8 insertions(+) (limited to 'include') diff --git a/drivers/mfd/mc13783-core.c b/drivers/mfd/mc13783-core.c index fecf38a4f02..b0778dcca91 100644 --- a/drivers/mfd/mc13783-core.c +++ b/drivers/mfd/mc13783-core.c @@ -226,6 +226,12 @@ int mc13783_reg_rmw(struct mc13783 *mc13783, unsigned int offset, } EXPORT_SYMBOL(mc13783_reg_rmw); +int mc13783_get_flags(struct mc13783 *mc13783) +{ + return mc13783->flags; +} +EXPORT_SYMBOL(mc13783_get_flags); + int mc13783_irq_mask(struct mc13783 *mc13783, int irq) { int ret; diff --git a/include/linux/mfd/mc13783.h b/include/linux/mfd/mc13783.h index 4a894f68854..0fa44fb8dd2 100644 --- a/include/linux/mfd/mc13783.h +++ b/include/linux/mfd/mc13783.h @@ -21,6 +21,8 @@ int mc13783_reg_write(struct mc13783 *mc13783, unsigned int offset, u32 val); int mc13783_reg_rmw(struct mc13783 *mc13783, unsigned int offset, u32 mask, u32 val); +int mc13783_get_flags(struct mc13783 *mc13783); + int mc13783_irq_request(struct mc13783 *mc13783, int irq, irq_handler_t handler, const char *name, void *dev); int mc13783_irq_request_nounmask(struct mc13783 *mc13783, int irq, -- cgit v1.2.3 From b6e6d54cab7633dd2216ede77ccd00cdaebd77ad Mon Sep 17 00:00:00 2001 From: Uwe Kleine-König Date: Mon, 2 Aug 2010 15:48:04 +0200 Subject: mfd: Get rid of now unused mc13783 private header MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This adds all remaining definitions that are used by the core driver to the .c file. Signed-off-by: Uwe Kleine-König Signed-off-by: Samuel Ortiz --- drivers/mfd/mc13783-core.c | 24 +++- include/linux/mfd/mc13783-private.h | 220 ------------------------------------ 2 files changed, 23 insertions(+), 221 deletions(-) delete mode 100644 include/linux/mfd/mc13783-private.h (limited to 'include') diff --git a/drivers/mfd/mc13783-core.c b/drivers/mfd/mc13783-core.c index b0778dcca91..6df34989c1f 100644 --- a/drivers/mfd/mc13783-core.c +++ b/drivers/mfd/mc13783-core.c @@ -11,9 +11,31 @@ */ #include #include +#include +#include +#include #include #include -#include +#include + +struct mc13783 { + struct spi_device *spidev; + struct mutex lock; + int irq; + int flags; + + irq_handler_t irqhandler[MC13783_NUM_IRQ]; + void *irqdata[MC13783_NUM_IRQ]; + + /* XXX these should go as platformdata to the regulator subdevice */ + struct mc13783_regulator_init_data *regulators; + int num_regulators; +}; + +#define MC13783_REG_REVISION 7 +#define MC13783_REG_ADC_0 43 +#define MC13783_REG_ADC_1 44 +#define MC13783_REG_ADC_2 45 #define MC13783_IRQSTAT0 0 #define MC13783_IRQSTAT0_ADCDONEI (1 << 0) diff --git a/include/linux/mfd/mc13783-private.h b/include/linux/mfd/mc13783-private.h deleted file mode 100644 index 95cf9360553..00000000000 --- a/include/linux/mfd/mc13783-private.h +++ /dev/null @@ -1,220 +0,0 @@ -/* - * Copyright 2009 Pengutronix, Sascha Hauer - * - * Initial development of this code was funded by - * Phytec Messtechnik GmbH, http://www.phytec.de - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. - */ - -#ifndef __LINUX_MFD_MC13783_PRIV_H -#define __LINUX_MFD_MC13783_PRIV_H - -#include -#include -#include -#include - -struct mc13783 { - struct spi_device *spidev; - struct mutex lock; - int irq; - int flags; - - irq_handler_t irqhandler[MC13783_NUM_IRQ]; - void *irqdata[MC13783_NUM_IRQ]; - - /* XXX these should go as platformdata to the regulator subdevice */ - struct mc13783_regulator_init_data *regulators; - int num_regulators; -}; - -#define MC13783_REG_INTERRUPT_STATUS_0 0 -#define MC13783_REG_INTERRUPT_MASK_0 1 -#define MC13783_REG_INTERRUPT_SENSE_0 2 -#define MC13783_REG_INTERRUPT_STATUS_1 3 -#define MC13783_REG_INTERRUPT_MASK_1 4 -#define MC13783_REG_INTERRUPT_SENSE_1 5 -#define MC13783_REG_POWER_UP_MODE_SENSE 6 -#define MC13783_REG_REVISION 7 -#define MC13783_REG_SEMAPHORE 8 -#define MC13783_REG_ARBITRATION_PERIPHERAL_AUDIO 9 -#define MC13783_REG_ARBITRATION_SWITCHERS 10 -#define MC13783_REG_ARBITRATION_REGULATORS_0 11 -#define MC13783_REG_ARBITRATION_REGULATORS_1 12 -#define MC13783_REG_POWER_CONTROL_0 13 -#define MC13783_REG_POWER_CONTROL_1 14 -#define MC13783_REG_POWER_CONTROL_2 15 -#define MC13783_REG_REGEN_ASSIGNMENT 16 -#define MC13783_REG_CONTROL_SPARE 17 -#define MC13783_REG_MEMORY_A 18 -#define MC13783_REG_MEMORY_B 19 -#define MC13783_REG_RTC_TIME 20 -#define MC13783_REG_RTC_ALARM 21 -#define MC13783_REG_RTC_DAY 22 -#define MC13783_REG_RTC_DAY_ALARM 23 -#define MC13783_REG_SWITCHERS_0 24 -#define MC13783_REG_SWITCHERS_1 25 -#define MC13783_REG_SWITCHERS_2 26 -#define MC13783_REG_SWITCHERS_3 27 -#define MC13783_REG_SWITCHERS_4 28 -#define MC13783_REG_SWITCHERS_5 29 -#define MC13783_REG_REGULATOR_SETTING_0 30 -#define MC13783_REG_REGULATOR_SETTING_1 31 -#define MC13783_REG_REGULATOR_MODE_0 32 -#define MC13783_REG_REGULATOR_MODE_1 33 -#define MC13783_REG_POWER_MISCELLANEOUS 34 -#define MC13783_REG_POWER_SPARE 35 -#define MC13783_REG_AUDIO_RX_0 36 -#define MC13783_REG_AUDIO_RX_1 37 -#define MC13783_REG_AUDIO_TX 38 -#define MC13783_REG_AUDIO_SSI_NETWORK 39 -#define MC13783_REG_AUDIO_CODEC 40 -#define MC13783_REG_AUDIO_STEREO_DAC 41 -#define MC13783_REG_AUDIO_SPARE 42 -#define MC13783_REG_ADC_0 43 -#define MC13783_REG_ADC_1 44 -#define MC13783_REG_ADC_2 45 -#define MC13783_REG_ADC_3 46 -#define MC13783_REG_ADC_4 47 -#define MC13783_REG_CHARGER 48 -#define MC13783_REG_USB 49 -#define MC13783_REG_CHARGE_USB_SPARE 50 -#define MC13783_REG_LED_CONTROL_0 51 -#define MC13783_REG_LED_CONTROL_1 52 -#define MC13783_REG_LED_CONTROL_2 53 -#define MC13783_REG_LED_CONTROL_3 54 -#define MC13783_REG_LED_CONTROL_4 55 -#define MC13783_REG_LED_CONTROL_5 56 -#define MC13783_REG_SPARE 57 -#define MC13783_REG_TRIM_0 58 -#define MC13783_REG_TRIM_1 59 -#define MC13783_REG_TEST_0 60 -#define MC13783_REG_TEST_1 61 -#define MC13783_REG_TEST_2 62 -#define MC13783_REG_TEST_3 63 -#define MC13783_REG_NB 64 - -/* - * Reg Regulator Mode 0 - */ -#define MC13783_REGCTRL_VAUDIO_EN (1 << 0) -#define MC13783_REGCTRL_VAUDIO_STBY (1 << 1) -#define MC13783_REGCTRL_VAUDIO_MODE (1 << 2) -#define MC13783_REGCTRL_VIOHI_EN (1 << 3) -#define MC13783_REGCTRL_VIOHI_STBY (1 << 4) -#define MC13783_REGCTRL_VIOHI_MODE (1 << 5) -#define MC13783_REGCTRL_VIOLO_EN (1 << 6) -#define MC13783_REGCTRL_VIOLO_STBY (1 << 7) -#define MC13783_REGCTRL_VIOLO_MODE (1 << 8) -#define MC13783_REGCTRL_VDIG_EN (1 << 9) -#define MC13783_REGCTRL_VDIG_STBY (1 << 10) -#define MC13783_REGCTRL_VDIG_MODE (1 << 11) -#define MC13783_REGCTRL_VGEN_EN (1 << 12) -#define MC13783_REGCTRL_VGEN_STBY (1 << 13) -#define MC13783_REGCTRL_VGEN_MODE (1 << 14) -#define MC13783_REGCTRL_VRFDIG_EN (1 << 15) -#define MC13783_REGCTRL_VRFDIG_STBY (1 << 16) -#define MC13783_REGCTRL_VRFDIG_MODE (1 << 17) -#define MC13783_REGCTRL_VRFREF_EN (1 << 18) -#define MC13783_REGCTRL_VRFREF_STBY (1 << 19) -#define MC13783_REGCTRL_VRFREF_MODE (1 << 20) -#define MC13783_REGCTRL_VRFCP_EN (1 << 21) -#define MC13783_REGCTRL_VRFCP_STBY (1 << 22) -#define MC13783_REGCTRL_VRFCP_MODE (1 << 23) - -/* - * Reg Regulator Mode 1 - */ -#define MC13783_REGCTRL_VSIM_EN (1 << 0) -#define MC13783_REGCTRL_VSIM_STBY (1 << 1) -#define MC13783_REGCTRL_VSIM_MODE (1 << 2) -#define MC13783_REGCTRL_VESIM_EN (1 << 3) -#define MC13783_REGCTRL_VESIM_STBY (1 << 4) -#define MC13783_REGCTRL_VESIM_MODE (1 << 5) -#define MC13783_REGCTRL_VCAM_EN (1 << 6) -#define MC13783_REGCTRL_VCAM_STBY (1 << 7) -#define MC13783_REGCTRL_VCAM_MODE (1 << 8) -#define MC13783_REGCTRL_VRFBG_EN (1 << 9) -#define MC13783_REGCTRL_VRFBG_STBY (1 << 10) -#define MC13783_REGCTRL_VVIB_EN (1 << 11) -#define MC13783_REGCTRL_VRF1_EN (1 << 12) -#define MC13783_REGCTRL_VRF1_STBY (1 << 13) -#define MC13783_REGCTRL_VRF1_MODE (1 << 14) -#define MC13783_REGCTRL_VRF2_EN (1 << 15) -#define MC13783_REGCTRL_VRF2_STBY (1 << 16) -#define MC13783_REGCTRL_VRF2_MODE (1 << 17) -#define MC13783_REGCTRL_VMMC1_EN (1 << 18) -#define MC13783_REGCTRL_VMMC1_STBY (1 << 19) -#define MC13783_REGCTRL_VMMC1_MODE (1 << 20) -#define MC13783_REGCTRL_VMMC2_EN (1 << 21) -#define MC13783_REGCTRL_VMMC2_STBY (1 << 22) -#define MC13783_REGCTRL_VMMC2_MODE (1 << 23) - -/* - * Reg Regulator Misc. - */ -#define MC13783_REGCTRL_GPO1_EN (1 << 6) -#define MC13783_REGCTRL_GPO2_EN (1 << 8) -#define MC13783_REGCTRL_GPO3_EN (1 << 10) -#define MC13783_REGCTRL_GPO4_EN (1 << 12) -#define MC13783_REGCTRL_VIBPINCTRL (1 << 14) - -/* - * Reg Switcher 4 - */ -#define MC13783_SWCTRL_SW1A_MODE (1 << 0) -#define MC13783_SWCTRL_SW1A_STBY_MODE (1 << 2) -#define MC13783_SWCTRL_SW1A_DVS_SPEED (1 << 6) -#define MC13783_SWCTRL_SW1A_PANIC_MODE (1 << 8) -#define MC13783_SWCTRL_SW1A_SOFTSTART (1 << 9) -#define MC13783_SWCTRL_SW1B_MODE (1 << 10) -#define MC13783_SWCTRL_SW1B_STBY_MODE (1 << 12) -#define MC13783_SWCTRL_SW1B_DVS_SPEED (1 << 14) -#define MC13783_SWCTRL_SW1B_PANIC_MODE (1 << 16) -#define MC13783_SWCTRL_SW1B_SOFTSTART (1 << 17) -#define MC13783_SWCTRL_PLL_EN (1 << 18) -#define MC13783_SWCTRL_PLL_FACTOR (1 << 19) - -/* - * Reg Switcher 5 - */ -#define MC13783_SWCTRL_SW2A_MODE (1 << 0) -#define MC13783_SWCTRL_SW2A_STBY_MODE (1 << 2) -#define MC13783_SWCTRL_SW2A_DVS_SPEED (1 << 6) -#define MC13783_SWCTRL_SW2A_PANIC_MODE (1 << 8) -#define MC13783_SWCTRL_SW2A_SOFTSTART (1 << 9) -#define MC13783_SWCTRL_SW2B_MODE (1 << 10) -#define MC13783_SWCTRL_SW2B_STBY_MODE (1 << 12) -#define MC13783_SWCTRL_SW2B_DVS_SPEED (1 << 14) -#define MC13783_SWCTRL_SW2B_PANIC_MODE (1 << 16) -#define MC13783_SWCTRL_SW2B_SOFTSTART (1 << 17) -#define MC13783_SWSET_SW3 (1 << 18) -#define MC13783_SWCTRL_SW3_EN (1 << 20) -#define MC13783_SWCTRL_SW3_STBY (1 << 21) -#define MC13783_SWCTRL_SW3_MODE (1 << 22) - -static inline int mc13783_set_bits(struct mc13783 *mc13783, unsigned int offset, - u32 mask, u32 val) -{ - int ret; - mc13783_lock(mc13783); - ret = mc13783_reg_rmw(mc13783, offset, mask, val); - mc13783_unlock(mc13783); - - return ret; -} - -#endif /* __LINUX_MFD_MC13783_PRIV_H */ -- cgit v1.2.3 From c6c193326384aecfd668c8f271799a44dbc74c1a Mon Sep 17 00:00:00 2001 From: Mike Rapoport Date: Wed, 11 Aug 2010 01:11:04 +0200 Subject: mfd: Add TPS6586x driver Add mfd core driver for TPS6586x PMICs family. The driver provides I/O access for the sub-device drivers and performs regstration of the sub-devices based on the platform requirements. In addition it implements GPIOlib interface for the chip GPIOs. TODO: - add interrupt support - add platform data for PWM, backlight leds and charger Signed-off-by: Mike Rapoport Signed-off-by: Mike Rapoport Signed-off-by: Samuel Ortiz --- drivers/mfd/Kconfig | 14 ++ drivers/mfd/Makefile | 1 + drivers/mfd/tps6586x.c | 375 +++++++++++++++++++++++++++++++++++++++++++ include/linux/mfd/tps6586x.h | 47 ++++++ 4 files changed, 437 insertions(+) create mode 100644 drivers/mfd/tps6586x.c create mode 100644 include/linux/mfd/tps6586x.h (limited to 'include') diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index 23a891f396e..d75909e7cf2 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -531,6 +531,20 @@ config MFD_JZ4740_ADC Say yes here if you want support for the ADC unit in the JZ4740 SoC. This driver is necessary for jz4740-battery and jz4740-hwmon driver. +config MFD_TPS6586X + tristate "TPS6586x Power Management chips" + depends on I2C && GPIOLIB + select MFD_CORE + help + If you say yes here you get support for the TPS6586X series of + Power Management chips. + This driver provides common support for accessing the device, + additional drivers must be enabled in order to use the + functionality of the device. + + This driver can also be built as a module. If so, the module + will be called tps6586x. + endif # MFD_SUPPORT menu "Multimedia Capabilities Port drivers" diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile index cc7cce0976f..1e48d7e3e88 100644 --- a/drivers/mfd/Makefile +++ b/drivers/mfd/Makefile @@ -74,3 +74,4 @@ obj-$(CONFIG_LPC_SCH) += lpc_sch.o obj-$(CONFIG_MFD_RDC321X) += rdc321x-southbridge.o obj-$(CONFIG_MFD_JANZ_CMODIO) += janz-cmodio.o obj-$(CONFIG_MFD_JZ4740_ADC) += jz4740-adc.o +obj-$(CONFIG_MFD_TPS6586X) += tps6586x.o diff --git a/drivers/mfd/tps6586x.c b/drivers/mfd/tps6586x.c new file mode 100644 index 00000000000..4cde31e6a25 --- /dev/null +++ b/drivers/mfd/tps6586x.c @@ -0,0 +1,375 @@ +/* + * Core driver for TI TPS6586x PMIC family + * + * Copyright (c) 2010 CompuLab Ltd. + * Mike Rapoport + * + * Based on da903x.c. + * Copyright (C) 2008 Compulab, Ltd. + * Mike Rapoport + * Copyright (C) 2006-2008 Marvell International Ltd. + * Eric Miao + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include +#include +#include +#include +#include +#include + +#include +#include + +/* GPIO control registers */ +#define TPS6586X_GPIOSET1 0x5d +#define TPS6586X_GPIOSET2 0x5e + +/* device id */ +#define TPS6586X_VERSIONCRC 0xcd +#define TPS658621A_VERSIONCRC 0x15 + +struct tps6586x { + struct mutex lock; + struct device *dev; + struct i2c_client *client; + + struct gpio_chip gpio; +}; + +static inline int __tps6586x_read(struct i2c_client *client, + int reg, uint8_t *val) +{ + int ret; + + ret = i2c_smbus_read_byte_data(client, reg); + if (ret < 0) { + dev_err(&client->dev, "failed reading at 0x%02x\n", reg); + return ret; + } + + *val = (uint8_t)ret; + + return 0; +} + +static inline int __tps6586x_reads(struct i2c_client *client, int reg, + int len, uint8_t *val) +{ + int ret; + + ret = i2c_smbus_read_i2c_block_data(client, reg, len, val); + if (ret < 0) { + dev_err(&client->dev, "failed reading from 0x%02x\n", reg); + return ret; + } + + return 0; +} + +static inline int __tps6586x_write(struct i2c_client *client, + int reg, uint8_t val) +{ + int ret; + + ret = i2c_smbus_write_byte_data(client, reg, val); + if (ret < 0) { + dev_err(&client->dev, "failed writing 0x%02x to 0x%02x\n", + val, reg); + return ret; + } + + return 0; +} + +static inline int __tps6586x_writes(struct i2c_client *client, int reg, + int len, uint8_t *val) +{ + int ret; + + ret = i2c_smbus_write_i2c_block_data(client, reg, len, val); + if (ret < 0) { + dev_err(&client->dev, "failed writings to 0x%02x\n", reg); + return ret; + } + + return 0; +} + +int tps6586x_write(struct device *dev, int reg, uint8_t val) +{ + return __tps6586x_write(to_i2c_client(dev), reg, val); +} +EXPORT_SYMBOL_GPL(tps6586x_write); + +int tps6586x_writes(struct device *dev, int reg, int len, uint8_t *val) +{ + return __tps6586x_writes(to_i2c_client(dev), reg, len, val); +} +EXPORT_SYMBOL_GPL(tps6586x_writes); + +int tps6586x_read(struct device *dev, int reg, uint8_t *val) +{ + return __tps6586x_read(to_i2c_client(dev), reg, val); +} +EXPORT_SYMBOL_GPL(tps6586x_read); + +int tps6586x_reads(struct device *dev, int reg, int len, uint8_t *val) +{ + return __tps6586x_reads(to_i2c_client(dev), reg, len, val); +} +EXPORT_SYMBOL_GPL(tps6586x_reads); + +int tps6586x_set_bits(struct device *dev, int reg, uint8_t bit_mask) +{ + struct tps6586x *tps6586x = dev_get_drvdata(dev); + uint8_t reg_val; + int ret = 0; + + mutex_lock(&tps6586x->lock); + + ret = __tps6586x_read(to_i2c_client(dev), reg, ®_val); + if (ret) + goto out; + + if ((reg_val & bit_mask) == 0) { + reg_val |= bit_mask; + ret = __tps6586x_write(to_i2c_client(dev), reg, reg_val); + } +out: + mutex_unlock(&tps6586x->lock); + return ret; +} +EXPORT_SYMBOL_GPL(tps6586x_set_bits); + +int tps6586x_clr_bits(struct device *dev, int reg, uint8_t bit_mask) +{ + struct tps6586x *tps6586x = dev_get_drvdata(dev); + uint8_t reg_val; + int ret = 0; + + mutex_lock(&tps6586x->lock); + + ret = __tps6586x_read(to_i2c_client(dev), reg, ®_val); + if (ret) + goto out; + + if (reg_val & bit_mask) { + reg_val &= ~bit_mask; + ret = __tps6586x_write(to_i2c_client(dev), reg, reg_val); + } +out: + mutex_unlock(&tps6586x->lock); + return ret; +} +EXPORT_SYMBOL_GPL(tps6586x_clr_bits); + +int tps6586x_update(struct device *dev, int reg, uint8_t val, uint8_t mask) +{ + struct tps6586x *tps6586x = dev_get_drvdata(dev); + uint8_t reg_val; + int ret = 0; + + mutex_lock(&tps6586x->lock); + + ret = __tps6586x_read(tps6586x->client, reg, ®_val); + if (ret) + goto out; + + if ((reg_val & mask) != val) { + reg_val = (reg_val & ~mask) | val; + ret = __tps6586x_write(tps6586x->client, reg, reg_val); + } +out: + mutex_unlock(&tps6586x->lock); + return ret; +} +EXPORT_SYMBOL_GPL(tps6586x_update); + +static int tps6586x_gpio_get(struct gpio_chip *gc, unsigned offset) +{ + struct tps6586x *tps6586x = container_of(gc, struct tps6586x, gpio); + uint8_t val; + int ret; + + ret = __tps6586x_read(tps6586x->client, TPS6586X_GPIOSET2, &val); + if (ret) + return ret; + + return !!(val & (1 << offset)); +} + + +static void tps6586x_gpio_set(struct gpio_chip *chip, unsigned offset, + int value) +{ + struct tps6586x *tps6586x = container_of(chip, struct tps6586x, gpio); + + __tps6586x_write(tps6586x->client, TPS6586X_GPIOSET2, + value << offset); +} + +static int tps6586x_gpio_output(struct gpio_chip *gc, unsigned offset, + int value) +{ + struct tps6586x *tps6586x = container_of(gc, struct tps6586x, gpio); + uint8_t val, mask; + + tps6586x_gpio_set(gc, offset, value); + + val = 0x1 << (offset * 2); + mask = 0x3 << (offset * 2); + + return tps6586x_update(tps6586x->dev, TPS6586X_GPIOSET1, val, mask); +} + +static void tps6586x_gpio_init(struct tps6586x *tps6586x, int gpio_base) +{ + int ret; + + if (!gpio_base) + return; + + tps6586x->gpio.owner = THIS_MODULE; + tps6586x->gpio.label = tps6586x->client->name; + tps6586x->gpio.dev = tps6586x->dev; + tps6586x->gpio.base = gpio_base; + tps6586x->gpio.ngpio = 4; + tps6586x->gpio.can_sleep = 1; + + /* FIXME: add handling of GPIOs as dedicated inputs */ + tps6586x->gpio.direction_output = tps6586x_gpio_output; + tps6586x->gpio.set = tps6586x_gpio_set; + tps6586x->gpio.get = tps6586x_gpio_get; + + ret = gpiochip_add(&tps6586x->gpio); + if (ret) + dev_warn(tps6586x->dev, "GPIO registration failed: %d\n", ret); +} + +static int __remove_subdev(struct device *dev, void *unused) +{ + platform_device_unregister(to_platform_device(dev)); + return 0; +} + +static int tps6586x_remove_subdevs(struct tps6586x *tps6586x) +{ + return device_for_each_child(tps6586x->dev, NULL, __remove_subdev); +} + +static int __devinit tps6586x_add_subdevs(struct tps6586x *tps6586x, + struct tps6586x_platform_data *pdata) +{ + struct tps6586x_subdev_info *subdev; + struct platform_device *pdev; + int i, ret = 0; + + for (i = 0; i < pdata->num_subdevs; i++) { + subdev = &pdata->subdevs[i]; + + pdev = platform_device_alloc(subdev->name, subdev->id); + + pdev->dev.parent = tps6586x->dev; + pdev->dev.platform_data = subdev->platform_data; + + ret = platform_device_add(pdev); + if (ret) + goto failed; + } + return 0; + +failed: + tps6586x_remove_subdevs(tps6586x); + return ret; +} + +static int __devinit tps6586x_i2c_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct tps6586x_platform_data *pdata = client->dev.platform_data; + struct tps6586x *tps6586x; + int ret; + + if (!pdata) { + dev_err(&client->dev, "tps6586x requires platform data\n"); + return -ENOTSUPP; + } + + ret = i2c_smbus_read_byte_data(client, TPS6586X_VERSIONCRC); + if (ret < 0) { + dev_err(&client->dev, "Chip ID read failed: %d\n", ret); + return -EIO; + } + + if (ret != TPS658621A_VERSIONCRC) { + dev_err(&client->dev, "Unsupported chip ID: %x\n", ret); + return -ENODEV; + } + + tps6586x = kzalloc(sizeof(struct tps6586x), GFP_KERNEL); + if (tps6586x == NULL) + return -ENOMEM; + + tps6586x->client = client; + tps6586x->dev = &client->dev; + i2c_set_clientdata(client, tps6586x); + + mutex_init(&tps6586x->lock); + + ret = tps6586x_add_subdevs(tps6586x, pdata); + if (ret) { + dev_err(&client->dev, "add devices failed: %d\n", ret); + goto err_add_devs; + } + + tps6586x_gpio_init(tps6586x, pdata->gpio_base); + + return 0; + +err_add_devs: + kfree(tps6586x); + return ret; +} + +static int __devexit tps6586x_i2c_remove(struct i2c_client *client) +{ + return 0; +} + +static const struct i2c_device_id tps6586x_id_table[] = { + { "tps6586x", 0 }, + { }, +}; +MODULE_DEVICE_TABLE(i2c, tps6586x_id_table); + +static struct i2c_driver tps6586x_driver = { + .driver = { + .name = "tps6586x", + .owner = THIS_MODULE, + }, + .probe = tps6586x_i2c_probe, + .remove = __devexit_p(tps6586x_i2c_remove), + .id_table = tps6586x_id_table, +}; + +static int __init tps6586x_init(void) +{ + return i2c_add_driver(&tps6586x_driver); +} +subsys_initcall(tps6586x_init); + +static void __exit tps6586x_exit(void) +{ + i2c_del_driver(&tps6586x_driver); +} +module_exit(tps6586x_exit); + +MODULE_DESCRIPTION("TPS6586X core driver"); +MODULE_AUTHOR("Mike Rapoport "); +MODULE_LICENSE("GPL"); + diff --git a/include/linux/mfd/tps6586x.h b/include/linux/mfd/tps6586x.h new file mode 100644 index 00000000000..772b3ae640a --- /dev/null +++ b/include/linux/mfd/tps6586x.h @@ -0,0 +1,47 @@ +#ifndef __LINUX_MFD_TPS6586X_H +#define __LINUX_MFD_TPS6586X_H + +enum { + TPS6586X_ID_SM_0, + TPS6586X_ID_SM_1, + TPS6586X_ID_SM_2, + TPS6586X_ID_LDO_0, + TPS6586X_ID_LDO_1, + TPS6586X_ID_LDO_2, + TPS6586X_ID_LDO_3, + TPS6586X_ID_LDO_4, + TPS6586X_ID_LDO_5, + TPS6586X_ID_LDO_6, + TPS6586X_ID_LDO_7, + TPS6586X_ID_LDO_8, + TPS6586X_ID_LDO_9, + TPS6586X_ID_LDO_RTC, +}; + +struct tps6586x_subdev_info { + int id; + const char *name; + void *platform_data; +}; + +struct tps6586x_platform_data { + int num_subdevs; + struct tps6586x_subdev_info *subdevs; + + int gpio_base; +}; + +/* + * NOTE: the functions below are not intended for use outside + * of the TPS6586X sub-device drivers + */ +extern int tps6586x_write(struct device *dev, int reg, uint8_t val); +extern int tps6586x_writes(struct device *dev, int reg, int len, uint8_t *val); +extern int tps6586x_read(struct device *dev, int reg, uint8_t *val); +extern int tps6586x_reads(struct device *dev, int reg, int len, uint8_t *val); +extern int tps6586x_set_bits(struct device *dev, int reg, uint8_t bit_mask); +extern int tps6586x_clr_bits(struct device *dev, int reg, uint8_t bit_mask); +extern int tps6586x_update(struct device *dev, int reg, uint8_t val, + uint8_t mask); + +#endif /*__LINUX_MFD_TPS6586X_H */ -- cgit v1.2.3