diff options
author | Jonas Aaberg <jonas.aberg@stericsson.com> | 2011-05-30 08:26:40 +0200 |
---|---|---|
committer | Ulf Hansson <ulf.hansson@stericsson.com> | 2011-09-19 15:15:32 +0200 |
commit | 3ee40700fe69eb1075f7bdbb793cafdf37a13312 (patch) | |
tree | 1c42f274258bf798f4c0eaf0c3bbb02993cc990c /arch/arm/mach-ux500/pm/context-db8500.c | |
parent | 57a8a3906a3b3f9147035649123d3294a06e7ea8 (diff) |
ARM: ux500: context: readb to readl
Fix typo where readl accidentially was readb
ST-Ericsson Linux next: ER338824
ST-Ericsson ID: ER342698
ST-Ericsson FOSS-OUT ID: Trivial
Change-Id: Idbcf1ed8788ce40d8157d420a2112ca8b260badd
Signed-off-by: Jonas Aaberg <jonas.aberg@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/24141
Reviewed-by: Rabin VINCENT <rabin.vincent@stericsson.com>
Reviewed-by: QATEST
Reviewed-by: Rickard ANDERSSON <rickard.andersson@stericsson.com>
Diffstat (limited to 'arch/arm/mach-ux500/pm/context-db8500.c')
-rw-r--r-- | arch/arm/mach-ux500/pm/context-db8500.c | 175 |
1 files changed, 96 insertions, 79 deletions
diff --git a/arch/arm/mach-ux500/pm/context-db8500.c b/arch/arm/mach-ux500/pm/context-db8500.c index f43a2a81f8e..37f38347b3d 100644 --- a/arch/arm/mach-ux500/pm/context-db8500.c +++ b/arch/arm/mach-ux500/pm/context-db8500.c @@ -1,9 +1,9 @@ /* * Copyright (C) STMicroelectronics 2009 - * Copyright (C) ST-Ericsson SA 2010 + * Copyright (C) ST-Ericsson SA 2010-2011 * * License Terms: GNU General Public License v2 - * Author: Sundar Iyer <sundar.iyer@stericsson.com> + * Author: Sundar Iyer for ST-Ericsson * */ @@ -53,19 +53,35 @@ /* address update between v1 and v2 */ #define NODE_HIBW2_DDR_IN_0_LIMIT_V1 0xC30 #define NODE_HIBW2_DDR_IN_1_LIMIT_V1 0xC34 + #define NODE_HIBW2_DDR_IN_0_LIMIT 0xC24 #define NODE_HIBW2_DDR_IN_1_LIMIT 0xC28 /* only in v2 */ #define NODE_HIBW2_DDR_IN_2_LIMIT 0xC2C #define NODE_HIBW2_DDR_OUT_0_PRIORITY 0xC30 -#define NODE_ESRAM0_IN_0_PRIORITY 0X1000 -#define NODE_ESRAM0_IN_1_PRIORITY 0X1004 -#define NODE_ESRAM0_IN_2_PRIORITY 0X1008 -#define NODE_ESRAM0_IN_3_PRIORITY 0X100C -#define NODE_ESRAM0_IN_0_LIMIT 0X1030 -#define NODE_ESRAM0_IN_1_LIMIT 0X1034 -#define NODE_ESRAM0_IN_2_LIMIT 0X1038 -#define NODE_ESRAM0_IN_3_LIMIT 0X103C + +/* + * Note the following addresses are presented in + * db8500 design spec v3.1 and v3.3, table 10. + * But their addresses are not the same as in the + * description. The addresses in the description + * of each registers are correct. + * NODE_HIBW2_DDR_IN_3_LIMIT is only present in v1. + * + * Faulty registers addresses in table 10: + * NODE_HIBW2_DDR_IN_2_LIMIT 0xC38 + * NODE_HIBW2_DDR_IN_3_LIMIT 0xC3C + * NODE_HIBW2_DDR_OUT_0_PRIORITY 0xC40 + */ + +#define NODE_ESRAM0_IN_0_PRIORITY 0x1000 +#define NODE_ESRAM0_IN_1_PRIORITY 0x1004 +#define NODE_ESRAM0_IN_2_PRIORITY 0x1008 +#define NODE_ESRAM0_IN_3_PRIORITY 0x100C +#define NODE_ESRAM0_IN_0_LIMIT 0x1030 +#define NODE_ESRAM0_IN_1_LIMIT 0x1034 +#define NODE_ESRAM0_IN_2_LIMIT 0x1038 +#define NODE_ESRAM0_IN_3_LIMIT 0x103C /* common */ #define NODE_ESRAM1_2_IN_0_PRIORITY 0x1400 #define NODE_ESRAM1_2_IN_1_PRIORITY 0x1404 @@ -79,6 +95,7 @@ #define NODE_ESRAM1_2_IN_2_ARB_2_LIMIT 0x1444 #define NODE_ESRAM1_2_IN_3_ARB_1_LIMIT 0x1448 #define NODE_ESRAM1_2_IN_3_ARB_2_LIMIT 0x144C + #define NODE_ESRAM3_4_IN_0_PRIORITY 0x1800 #define NODE_ESRAM3_4_IN_1_PRIORITY 0x1804 #define NODE_ESRAM3_4_IN_2_PRIORITY 0x1808 @@ -129,168 +146,168 @@ void u8500_context_save_icn(void) { context_icn.hibw1_esram_in_pri[0] = - readb(context_icn.base + NODE_HIBW1_ESRAM_IN_0_PRIORITY); + readl(context_icn.base + NODE_HIBW1_ESRAM_IN_0_PRIORITY); context_icn.hibw1_esram_in_pri[1] = - readb(context_icn.base + NODE_HIBW1_ESRAM_IN_1_PRIORITY); + readl(context_icn.base + NODE_HIBW1_ESRAM_IN_1_PRIORITY); context_icn.hibw1_esram_in_pri[2] = - readb(context_icn.base + NODE_HIBW1_ESRAM_IN_2_PRIORITY); + readl(context_icn.base + NODE_HIBW1_ESRAM_IN_2_PRIORITY); context_icn.hibw1_esram_in0_arb[0] = - readb(context_icn.base + NODE_HIBW1_ESRAM_IN_0_ARB_1_LIMIT); + readl(context_icn.base + NODE_HIBW1_ESRAM_IN_0_ARB_1_LIMIT); context_icn.hibw1_esram_in0_arb[1] = - readb(context_icn.base + NODE_HIBW1_ESRAM_IN_0_ARB_2_LIMIT); + readl(context_icn.base + NODE_HIBW1_ESRAM_IN_0_ARB_2_LIMIT); context_icn.hibw1_esram_in0_arb[2] = - readb(context_icn.base + NODE_HIBW1_ESRAM_IN_0_ARB_3_LIMIT); + readl(context_icn.base + NODE_HIBW1_ESRAM_IN_0_ARB_3_LIMIT); context_icn.hibw1_esram_in1_arb[0] = - readb(context_icn.base + NODE_HIBW1_ESRAM_IN_1_ARB_1_LIMIT); + readl(context_icn.base + NODE_HIBW1_ESRAM_IN_1_ARB_1_LIMIT); context_icn.hibw1_esram_in1_arb[1] = - readb(context_icn.base + NODE_HIBW1_ESRAM_IN_1_ARB_2_LIMIT); + readl(context_icn.base + NODE_HIBW1_ESRAM_IN_1_ARB_2_LIMIT); context_icn.hibw1_esram_in1_arb[2] = - readb(context_icn.base + NODE_HIBW1_ESRAM_IN_1_ARB_3_LIMIT); + readl(context_icn.base + NODE_HIBW1_ESRAM_IN_1_ARB_3_LIMIT); context_icn.hibw1_esram_in2_arb[0] = - readb(context_icn.base + NODE_HIBW1_ESRAM_IN_2_ARB_1_LIMIT); + readl(context_icn.base + NODE_HIBW1_ESRAM_IN_2_ARB_1_LIMIT); context_icn.hibw1_esram_in2_arb[1] = - readb(context_icn.base + NODE_HIBW1_ESRAM_IN_2_ARB_2_LIMIT); + readl(context_icn.base + NODE_HIBW1_ESRAM_IN_2_ARB_2_LIMIT); context_icn.hibw1_esram_in2_arb[2] = - readb(context_icn.base + NODE_HIBW1_ESRAM_IN_2_ARB_3_LIMIT); + readl(context_icn.base + NODE_HIBW1_ESRAM_IN_2_ARB_3_LIMIT); context_icn.hibw1_ddr_in_prio[0] = - readb(context_icn.base + NODE_HIBW1_DDR_IN_0_PRIORITY); + readl(context_icn.base + NODE_HIBW1_DDR_IN_0_PRIORITY); context_icn.hibw1_ddr_in_prio[1] = - readb(context_icn.base + NODE_HIBW1_DDR_IN_1_PRIORITY); + readl(context_icn.base + NODE_HIBW1_DDR_IN_1_PRIORITY); context_icn.hibw1_ddr_in_prio[2] = - readb(context_icn.base + NODE_HIBW1_DDR_IN_2_PRIORITY); + readl(context_icn.base + NODE_HIBW1_DDR_IN_2_PRIORITY); context_icn.hibw1_ddr_in_limit[0] = - readb(context_icn.base + NODE_HIBW1_DDR_IN_0_LIMIT); + readl(context_icn.base + NODE_HIBW1_DDR_IN_0_LIMIT); context_icn.hibw1_ddr_in_limit[1] = - readb(context_icn.base + NODE_HIBW1_DDR_IN_1_LIMIT); + readl(context_icn.base + NODE_HIBW1_DDR_IN_1_LIMIT); context_icn.hibw1_ddr_in_limit[2] = - readb(context_icn.base + NODE_HIBW1_DDR_IN_2_LIMIT); + readl(context_icn.base + NODE_HIBW1_DDR_IN_2_LIMIT); context_icn.hibw1_ddr_out_prio = - readb(context_icn.base + NODE_HIBW1_DDR_OUT_0_PRIORITY); + readl(context_icn.base + NODE_HIBW1_DDR_OUT_0_PRIORITY); context_icn.hibw2_esram_in_pri[0] = - readb(context_icn.base + NODE_HIBW2_ESRAM_IN_0_PRIORITY); + readl(context_icn.base + NODE_HIBW2_ESRAM_IN_0_PRIORITY); context_icn.hibw2_esram_in_pri[1] = - readb(context_icn.base + NODE_HIBW2_ESRAM_IN_1_PRIORITY); + readl(context_icn.base + NODE_HIBW2_ESRAM_IN_1_PRIORITY); context_icn.hibw2_esram_in0_arblimit[0] = - readb(context_icn.base + NODE_HIBW2_ESRAM_IN_0_ARB_1_LIMIT); + readl(context_icn.base + NODE_HIBW2_ESRAM_IN_0_ARB_1_LIMIT); context_icn.hibw2_esram_in0_arblimit[1] = - readb(context_icn.base + NODE_HIBW2_ESRAM_IN_0_ARB_2_LIMIT); + readl(context_icn.base + NODE_HIBW2_ESRAM_IN_0_ARB_2_LIMIT); context_icn.hibw2_esram_in0_arblimit[2] = - readb(context_icn.base + NODE_HIBW2_ESRAM_IN_0_ARB_3_LIMIT); + readl(context_icn.base + NODE_HIBW2_ESRAM_IN_0_ARB_3_LIMIT); context_icn.hibw2_esram_in1_arblimit[0] = - readb(context_icn.base + NODE_HIBW2_ESRAM_IN_1_ARB_1_LIMIT); + readl(context_icn.base + NODE_HIBW2_ESRAM_IN_1_ARB_1_LIMIT); context_icn.hibw2_esram_in1_arblimit[1] = - readb(context_icn.base + NODE_HIBW2_ESRAM_IN_1_ARB_2_LIMIT); + readl(context_icn.base + NODE_HIBW2_ESRAM_IN_1_ARB_2_LIMIT); context_icn.hibw2_esram_in1_arblimit[2] = - readb(context_icn.base + NODE_HIBW2_ESRAM_IN_1_ARB_3_LIMIT); + readl(context_icn.base + NODE_HIBW2_ESRAM_IN_1_ARB_3_LIMIT); context_icn.hibw2_ddr_in_prio[0] = - readb(context_icn.base + NODE_HIBW2_DDR_IN_0_PRIORITY); + readl(context_icn.base + NODE_HIBW2_DDR_IN_0_PRIORITY); context_icn.hibw2_ddr_in_prio[1] = - readb(context_icn.base + NODE_HIBW2_DDR_IN_1_PRIORITY); + readl(context_icn.base + NODE_HIBW2_DDR_IN_1_PRIORITY); context_icn.hibw2_ddr_in_prio[2] = - readb(context_icn.base + NODE_HIBW2_DDR_IN_2_PRIORITY); + readl(context_icn.base + NODE_HIBW2_DDR_IN_2_PRIORITY); if (cpu_is_u8500v1()) { context_icn.hibw2_ddr_in_prio[3] = - readb(context_icn.base + NODE_HIBW2_DDR_IN_3_PRIORITY); + readl(context_icn.base + NODE_HIBW2_DDR_IN_3_PRIORITY); context_icn.hibw2_ddr_in_limit[0] = - readb(context_icn.base + NODE_HIBW2_DDR_IN_0_LIMIT_V1); + readl(context_icn.base + NODE_HIBW2_DDR_IN_0_LIMIT_V1); context_icn.hibw2_ddr_in_limit[1] = - readb(context_icn.base + NODE_HIBW2_DDR_IN_1_LIMIT_V1); + readl(context_icn.base + NODE_HIBW2_DDR_IN_1_LIMIT_V1); } if (cpu_is_u8500v2()) { context_icn.hibw2_ddr_in_limit[0] = - readb(context_icn.base + NODE_HIBW2_DDR_IN_0_LIMIT); + readl(context_icn.base + NODE_HIBW2_DDR_IN_0_LIMIT); context_icn.hibw2_ddr_in_limit[1] = - readb(context_icn.base + NODE_HIBW2_DDR_IN_1_LIMIT); + readl(context_icn.base + NODE_HIBW2_DDR_IN_1_LIMIT); context_icn.hibw2_ddr_in_limit[2] = - readb(context_icn.base + NODE_HIBW2_DDR_IN_2_LIMIT); + readl(context_icn.base + NODE_HIBW2_DDR_IN_2_LIMIT); context_icn.hibw2_ddr_out_prio = - readb(context_icn.base + + readl(context_icn.base + NODE_HIBW2_DDR_OUT_0_PRIORITY); context_icn.esram0_in_prio[0] = - readb(context_icn.base + NODE_ESRAM0_IN_0_PRIORITY); + readl(context_icn.base + NODE_ESRAM0_IN_0_PRIORITY); context_icn.esram0_in_prio[1] = - readb(context_icn.base + NODE_ESRAM0_IN_1_PRIORITY); + readl(context_icn.base + NODE_ESRAM0_IN_1_PRIORITY); context_icn.esram0_in_prio[2] = - readb(context_icn.base + NODE_ESRAM0_IN_2_PRIORITY); + readl(context_icn.base + NODE_ESRAM0_IN_2_PRIORITY); context_icn.esram0_in_prio[3] = - readb(context_icn.base + NODE_ESRAM0_IN_3_PRIORITY); + readl(context_icn.base + NODE_ESRAM0_IN_3_PRIORITY); context_icn.esram0_in_lim[0] = - readb(context_icn.base + NODE_ESRAM0_IN_0_LIMIT); + readl(context_icn.base + NODE_ESRAM0_IN_0_LIMIT); context_icn.esram0_in_lim[1] = - readb(context_icn.base + NODE_ESRAM0_IN_1_LIMIT); + readl(context_icn.base + NODE_ESRAM0_IN_1_LIMIT); context_icn.esram0_in_lim[2] = - readb(context_icn.base + NODE_ESRAM0_IN_2_LIMIT); + readl(context_icn.base + NODE_ESRAM0_IN_2_LIMIT); context_icn.esram0_in_lim[3] = - readb(context_icn.base + NODE_ESRAM0_IN_3_LIMIT); + readl(context_icn.base + NODE_ESRAM0_IN_3_LIMIT); } context_icn.esram12_in_prio[0] = - readb(context_icn.base + NODE_ESRAM1_2_IN_0_PRIORITY); + readl(context_icn.base + NODE_ESRAM1_2_IN_0_PRIORITY); context_icn.esram12_in_prio[1] = - readb(context_icn.base + NODE_ESRAM1_2_IN_1_PRIORITY); + readl(context_icn.base + NODE_ESRAM1_2_IN_1_PRIORITY); context_icn.esram12_in_prio[2] = - readb(context_icn.base + NODE_ESRAM1_2_IN_2_PRIORITY); + readl(context_icn.base + NODE_ESRAM1_2_IN_2_PRIORITY); context_icn.esram12_in_prio[3] = - readb(context_icn.base + NODE_ESRAM1_2_IN_3_PRIORITY); + readl(context_icn.base + NODE_ESRAM1_2_IN_3_PRIORITY); context_icn.esram12_in_arb_lim[0] = - readb(context_icn.base + NODE_ESRAM1_2_IN_0_ARB_1_LIMIT); + readl(context_icn.base + NODE_ESRAM1_2_IN_0_ARB_1_LIMIT); context_icn.esram12_in_arb_lim[1] = - readb(context_icn.base + NODE_ESRAM1_2_IN_0_ARB_2_LIMIT); + readl(context_icn.base + NODE_ESRAM1_2_IN_0_ARB_2_LIMIT); context_icn.esram12_in_arb_lim[2] = - readb(context_icn.base + NODE_ESRAM1_2_IN_1_ARB_1_LIMIT); + readl(context_icn.base + NODE_ESRAM1_2_IN_1_ARB_1_LIMIT); context_icn.esram12_in_arb_lim[3] = - readb(context_icn.base + NODE_ESRAM1_2_IN_1_ARB_2_LIMIT); + readl(context_icn.base + NODE_ESRAM1_2_IN_1_ARB_2_LIMIT); context_icn.esram12_in_arb_lim[4] = - readb(context_icn.base + NODE_ESRAM1_2_IN_2_ARB_1_LIMIT); + readl(context_icn.base + NODE_ESRAM1_2_IN_2_ARB_1_LIMIT); context_icn.esram12_in_arb_lim[5] = - readb(context_icn.base + NODE_ESRAM1_2_IN_2_ARB_2_LIMIT); + readl(context_icn.base + NODE_ESRAM1_2_IN_2_ARB_2_LIMIT); context_icn.esram12_in_arb_lim[6] = - readb(context_icn.base + NODE_ESRAM1_2_IN_3_ARB_1_LIMIT); + readl(context_icn.base + NODE_ESRAM1_2_IN_3_ARB_1_LIMIT); context_icn.esram12_in_arb_lim[7] = - readb(context_icn.base + NODE_ESRAM1_2_IN_3_ARB_2_LIMIT); + readl(context_icn.base + NODE_ESRAM1_2_IN_3_ARB_2_LIMIT); context_icn.esram34_in_prio[0] = - readb(context_icn.base + NODE_ESRAM3_4_IN_0_PRIORITY); + readl(context_icn.base + NODE_ESRAM3_4_IN_0_PRIORITY); context_icn.esram34_in_prio[1] = - readb(context_icn.base + NODE_ESRAM3_4_IN_1_PRIORITY); + readl(context_icn.base + NODE_ESRAM3_4_IN_1_PRIORITY); context_icn.esram34_in_prio[2] = - readb(context_icn.base + NODE_ESRAM3_4_IN_2_PRIORITY); + readl(context_icn.base + NODE_ESRAM3_4_IN_2_PRIORITY); context_icn.esram34_in_prio[3] = - readb(context_icn.base + NODE_ESRAM3_4_IN_3_PRIORITY); + readl(context_icn.base + NODE_ESRAM3_4_IN_3_PRIORITY); context_icn.esram34_in_arb_lim[0] = - readb(context_icn.base + NODE_ESRAM3_4_IN_0_ARB_1_LIMIT); + readl(context_icn.base + NODE_ESRAM3_4_IN_0_ARB_1_LIMIT); context_icn.esram34_in_arb_lim[1] = - readb(context_icn.base + NODE_ESRAM3_4_IN_0_ARB_2_LIMIT); + readl(context_icn.base + NODE_ESRAM3_4_IN_0_ARB_2_LIMIT); context_icn.esram34_in_arb_lim[2] = - readb(context_icn.base + NODE_ESRAM3_4_IN_1_ARB_1_LIMIT); + readl(context_icn.base + NODE_ESRAM3_4_IN_1_ARB_1_LIMIT); context_icn.esram34_in_arb_lim[3] = - readb(context_icn.base + NODE_ESRAM3_4_IN_1_ARB_2_LIMIT); + readl(context_icn.base + NODE_ESRAM3_4_IN_1_ARB_2_LIMIT); context_icn.esram34_in_arb_lim[4] = - readb(context_icn.base + NODE_ESRAM3_4_IN_2_ARB_1_LIMIT); + readl(context_icn.base + NODE_ESRAM3_4_IN_2_ARB_1_LIMIT); context_icn.esram34_in_arb_lim[5] = - readb(context_icn.base + NODE_ESRAM3_4_IN_2_ARB_2_LIMIT); + readl(context_icn.base + NODE_ESRAM3_4_IN_2_ARB_2_LIMIT); context_icn.esram34_in_arb_lim[6] = - readb(context_icn.base + NODE_ESRAM3_4_IN_3_ARB_1_LIMIT); + readl(context_icn.base + NODE_ESRAM3_4_IN_3_ARB_1_LIMIT); context_icn.esram34_in_arb_lim[7] = - readb(context_icn.base + NODE_ESRAM3_4_IN_3_ARB_2_LIMIT); + readl(context_icn.base + NODE_ESRAM3_4_IN_3_ARB_2_LIMIT); } |