diff options
| author | Jonas Aaberg <jonas.aberg@stericsson.com> | 2011-06-01 08:24:18 +0200 |
|---|---|---|
| committer | Ulf Hansson <ulf.hansson@stericsson.com> | 2011-09-19 15:15:44 +0200 |
| commit | 6aaff4d85d42147f23a8a763abcc597149791556 (patch) | |
| tree | 9ad7efdbab86f58b79ad51ba8d5058a6fabee84b /arch/arm/mach-ux500/pm/context-db8500.c | |
| parent | 1188895b0b2720f3508d69caa7d65cc39e51bdc6 (diff) | |
ARM: u8500: context: Remove v1 support
ST-Ericsson Linux next: ER338824
ST-Ericsson ID: 342987
ST-Ericsson FOSS-OUT ID: Trivial
Change-Id: I031e785a559cfa1191992ba24ddacb21614a51ae
Signed-off-by: Jonas Aaberg <jonas.aberg@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/24281
Reviewed-by: QATEST
Reviewed-by: Rickard ANDERSSON <rickard.andersson@stericsson.com>
Diffstat (limited to 'arch/arm/mach-ux500/pm/context-db8500.c')
| -rw-r--r-- | arch/arm/mach-ux500/pm/context-db8500.c | 137 |
1 files changed, 55 insertions, 82 deletions
diff --git a/arch/arm/mach-ux500/pm/context-db8500.c b/arch/arm/mach-ux500/pm/context-db8500.c index 6ed059619b0..ad21163917d 100644 --- a/arch/arm/mach-ux500/pm/context-db8500.c +++ b/arch/arm/mach-ux500/pm/context-db8500.c @@ -48,15 +48,9 @@ #define NODE_HIBW2_DDR_IN_0_PRIORITY 0xC00 #define NODE_HIBW2_DDR_IN_1_PRIORITY 0xC04 #define NODE_HIBW2_DDR_IN_2_PRIORITY 0xC08 -/* only in v1 */ -#define NODE_HIBW2_DDR_IN_3_PRIORITY 0xC0C -/* address update between v1 and v2 */ -#define NODE_HIBW2_DDR_IN_0_LIMIT_V1 0xC30 -#define NODE_HIBW2_DDR_IN_1_LIMIT_V1 0xC34 #define NODE_HIBW2_DDR_IN_0_LIMIT 0xC24 #define NODE_HIBW2_DDR_IN_1_LIMIT 0xC28 -/* only in v2 */ #define NODE_HIBW2_DDR_IN_2_LIMIT 0xC2C #define NODE_HIBW2_DDR_OUT_0_PRIORITY 0xC30 @@ -217,46 +211,35 @@ void u8500_context_save_icn(void) context_icn.hibw2_ddr_in_prio[2] = readl_relaxed(b + NODE_HIBW2_DDR_IN_2_PRIORITY); - if (cpu_is_u8500v1()) { - context_icn.hibw2_ddr_in_prio[3] = - readl_relaxed(b + NODE_HIBW2_DDR_IN_3_PRIORITY); - - context_icn.hibw2_ddr_in_limit[0] = - readl_relaxed(b + NODE_HIBW2_DDR_IN_0_LIMIT_V1); - context_icn.hibw2_ddr_in_limit[1] = - readl_relaxed(b + NODE_HIBW2_DDR_IN_1_LIMIT_V1); - } - - if (cpu_is_u8500v2()) { - context_icn.hibw2_ddr_in_limit[0] = - readl_relaxed(b + NODE_HIBW2_DDR_IN_0_LIMIT); - context_icn.hibw2_ddr_in_limit[1] = - readl_relaxed(b + NODE_HIBW2_DDR_IN_1_LIMIT); - - context_icn.hibw2_ddr_in_limit[2] = - readl_relaxed(b + NODE_HIBW2_DDR_IN_2_LIMIT); - - context_icn.hibw2_ddr_out_prio = - readl_relaxed(b + NODE_HIBW2_DDR_OUT_0_PRIORITY); - - context_icn.esram0_in_prio[0] = - readl_relaxed(b + NODE_ESRAM0_IN_0_PRIORITY); - context_icn.esram0_in_prio[1] = - readl_relaxed(b + NODE_ESRAM0_IN_1_PRIORITY); - context_icn.esram0_in_prio[2] = - readl_relaxed(b + NODE_ESRAM0_IN_2_PRIORITY); - context_icn.esram0_in_prio[3] = - readl_relaxed(b + NODE_ESRAM0_IN_3_PRIORITY); - - context_icn.esram0_in_lim[0] = - readl_relaxed(b + NODE_ESRAM0_IN_0_LIMIT); - context_icn.esram0_in_lim[1] = - readl_relaxed(b + NODE_ESRAM0_IN_1_LIMIT); - context_icn.esram0_in_lim[2] = - readl_relaxed(b + NODE_ESRAM0_IN_2_LIMIT); - context_icn.esram0_in_lim[3] = - readl_relaxed(b + NODE_ESRAM0_IN_3_LIMIT); - } + context_icn.hibw2_ddr_in_limit[0] = + readl_relaxed(b + NODE_HIBW2_DDR_IN_0_LIMIT); + context_icn.hibw2_ddr_in_limit[1] = + readl_relaxed(b + NODE_HIBW2_DDR_IN_1_LIMIT); + + context_icn.hibw2_ddr_in_limit[2] = + readl_relaxed(b + NODE_HIBW2_DDR_IN_2_LIMIT); + + context_icn.hibw2_ddr_out_prio = + readl_relaxed(b + NODE_HIBW2_DDR_OUT_0_PRIORITY); + + context_icn.esram0_in_prio[0] = + readl_relaxed(b + NODE_ESRAM0_IN_0_PRIORITY); + context_icn.esram0_in_prio[1] = + readl_relaxed(b + NODE_ESRAM0_IN_1_PRIORITY); + context_icn.esram0_in_prio[2] = + readl_relaxed(b + NODE_ESRAM0_IN_2_PRIORITY); + context_icn.esram0_in_prio[3] = + readl_relaxed(b + NODE_ESRAM0_IN_3_PRIORITY); + + context_icn.esram0_in_lim[0] = + readl_relaxed(b + NODE_ESRAM0_IN_0_LIMIT); + context_icn.esram0_in_lim[1] = + readl_relaxed(b + NODE_ESRAM0_IN_1_LIMIT); + context_icn.esram0_in_lim[2] = + readl_relaxed(b + NODE_ESRAM0_IN_2_LIMIT); + context_icn.esram0_in_lim[3] = + readl_relaxed(b + NODE_ESRAM0_IN_3_LIMIT); + context_icn.esram12_in_prio[0] = readl_relaxed(b + NODE_ESRAM1_2_IN_0_PRIORITY); context_icn.esram12_in_prio[1] = @@ -388,42 +371,32 @@ void u8500_context_restore_icn(void) b + NODE_HIBW2_DDR_IN_1_PRIORITY); writel_relaxed(context_icn.hibw2_ddr_in_prio[2], b + NODE_HIBW2_DDR_IN_2_PRIORITY); - if (cpu_is_u8500v1()) { - writel_relaxed(context_icn.hibw2_ddr_in_prio[3], - b + NODE_HIBW2_DDR_IN_3_PRIORITY); - writel_relaxed(context_icn.hibw2_ddr_in_limit[0], - b + NODE_HIBW2_DDR_IN_0_LIMIT_V1); - writel_relaxed(context_icn.hibw2_ddr_in_limit[1], - b + NODE_HIBW2_DDR_IN_1_LIMIT_V1); - } - if (cpu_is_u8500v2()) { - writel_relaxed(context_icn.hibw2_ddr_in_limit[0], - b + NODE_HIBW2_DDR_IN_0_LIMIT); - writel_relaxed(context_icn.hibw2_ddr_in_limit[1], - b + NODE_HIBW2_DDR_IN_1_LIMIT); - writel_relaxed(context_icn.hibw2_ddr_in_limit[2], - b + NODE_HIBW2_DDR_IN_2_LIMIT); - writel_relaxed(context_icn.hibw2_ddr_out_prio, - b + NODE_HIBW2_DDR_OUT_0_PRIORITY); - - writel_relaxed(context_icn.esram0_in_prio[0], - b + NODE_ESRAM0_IN_0_PRIORITY); - writel_relaxed(context_icn.esram0_in_prio[1], - b + NODE_ESRAM0_IN_1_PRIORITY); - writel_relaxed(context_icn.esram0_in_prio[2], - b + NODE_ESRAM0_IN_2_PRIORITY); - writel_relaxed(context_icn.esram0_in_prio[3], - b + NODE_ESRAM0_IN_3_PRIORITY); - - writel_relaxed(context_icn.esram0_in_lim[0], - b + NODE_ESRAM0_IN_0_LIMIT); - writel_relaxed(context_icn.esram0_in_lim[1], - b + NODE_ESRAM0_IN_1_LIMIT); - writel_relaxed(context_icn.esram0_in_lim[2], - b + NODE_ESRAM0_IN_2_LIMIT); - writel_relaxed(context_icn.esram0_in_lim[3], - b + NODE_ESRAM0_IN_3_LIMIT); - } + writel_relaxed(context_icn.hibw2_ddr_in_limit[0], + b + NODE_HIBW2_DDR_IN_0_LIMIT); + writel_relaxed(context_icn.hibw2_ddr_in_limit[1], + b + NODE_HIBW2_DDR_IN_1_LIMIT); + writel_relaxed(context_icn.hibw2_ddr_in_limit[2], + b + NODE_HIBW2_DDR_IN_2_LIMIT); + writel_relaxed(context_icn.hibw2_ddr_out_prio, + b + NODE_HIBW2_DDR_OUT_0_PRIORITY); + + writel_relaxed(context_icn.esram0_in_prio[0], + b + NODE_ESRAM0_IN_0_PRIORITY); + writel_relaxed(context_icn.esram0_in_prio[1], + b + NODE_ESRAM0_IN_1_PRIORITY); + writel_relaxed(context_icn.esram0_in_prio[2], + b + NODE_ESRAM0_IN_2_PRIORITY); + writel_relaxed(context_icn.esram0_in_prio[3], + b + NODE_ESRAM0_IN_3_PRIORITY); + + writel_relaxed(context_icn.esram0_in_lim[0], + b + NODE_ESRAM0_IN_0_LIMIT); + writel_relaxed(context_icn.esram0_in_lim[1], + b + NODE_ESRAM0_IN_1_LIMIT); + writel_relaxed(context_icn.esram0_in_lim[2], + b + NODE_ESRAM0_IN_2_LIMIT); + writel_relaxed(context_icn.esram0_in_lim[3], + b + NODE_ESRAM0_IN_3_LIMIT); writel_relaxed(context_icn.esram12_in_prio[0], b + NODE_ESRAM1_2_IN_0_PRIORITY); |