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authorIngo Molnar <mingo@elte.hu>2011-03-04 10:40:22 +0100
committerIngo Molnar <mingo@elte.hu>2011-03-04 10:40:25 +0100
commit888a8a3e9d79cbb9d83e53955f684998248580ec (patch)
tree3dbf548438c77d89c8696a9a79c4129cdc2f3d3e /arch/arm/mm/cache-l2x0.c
parentcfff2d909cbdaf8c467bd321aa0502a548ec8f7e (diff)
parentb06b3d49699a52e8f9ca056c4f96e81b1987d78e (diff)
Merge branch 'perf/urgent' into perf/core
Merge reason: Pick up updates before queueing up dependent patches. Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/arm/mm/cache-l2x0.c')
-rw-r--r--arch/arm/mm/cache-l2x0.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c
index 170c9bb9586..f2ce38e085d 100644
--- a/arch/arm/mm/cache-l2x0.c
+++ b/arch/arm/mm/cache-l2x0.c
@@ -49,7 +49,13 @@ static inline void cache_wait(void __iomem *reg, unsigned long mask)
static inline void cache_sync(void)
{
void __iomem *base = l2x0_base;
+
+#ifdef CONFIG_ARM_ERRATA_753970
+ /* write to an unmmapped register */
+ writel_relaxed(0, base + L2X0_DUMMY_REG);
+#else
writel_relaxed(0, base + L2X0_CACHE_SYNC);
+#endif
cache_wait(base + L2X0_CACHE_SYNC, 1);
}