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authorDavid S. Miller <davem@sunset.davemloft.net>2007-08-16 01:56:00 -0700
committerDavid S. Miller <davem@sunset.davemloft.net>2007-08-16 01:56:00 -0700
commit7dc408808ad40b9a5d031966035713ed5d5153b8 (patch)
treeecf6403ea0669ca8510740bed66b2d0c8846c3f4 /arch
parent53140b71c5e7b5370e4ac6ffc13fddbdfae71473 (diff)
[SPARC64]: SMP trampoline needs to avoid %tick_cmpr on sun4v too.
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch')
-rw-r--r--arch/sparc64/kernel/trampoline.S7
1 files changed, 3 insertions, 4 deletions
diff --git a/arch/sparc64/kernel/trampoline.S b/arch/sparc64/kernel/trampoline.S
index 9448595f906..9533a25ce5d 100644
--- a/arch/sparc64/kernel/trampoline.S
+++ b/arch/sparc64/kernel/trampoline.S
@@ -95,14 +95,13 @@ spitfire_startup:
membar #Sync
startup_continue:
+ mov %o0, %l0
+ BRANCH_IF_SUN4V(g1, niagara_lock_tlb)
+
sethi %hi(0x80000000), %g2
sllx %g2, 32, %g2
wr %g2, 0, %tick_cmpr
- mov %o0, %l0
-
- BRANCH_IF_SUN4V(g1, niagara_lock_tlb)
-
/* Call OBP by hand to lock KERNBASE into i/d tlbs.
* We lock 2 consequetive entries if we are 'bigkernel'.
*/