diff options
author | Vijaya Kumar Kilari <vijay.kilari@stericsson.com> | 2011-09-16 16:02:41 +0530 |
---|---|---|
committer | Rabin Vincent <rabin.vincent@stericsson.com> | 2011-09-22 15:41:28 +0530 |
commit | 24326825e3f6ef9ed74c39240276b16416f5c1d1 (patch) | |
tree | 4a4c2e823d2d2623587681c810287fc0d479a873 /arch | |
parent | aa6583cd791c847bc27ddcf810cde35610b33be0 (diff) |
U5500: PRCMU MBOX4 support for Hotdog and hotmon
PRCMU driver interface for thermal management
of DB5500. MBOX4 supports to
- configure hotmon period
- configure hotdog ranges
- read current temperature
ST-Ericsson Linux next: -
ST-Ericsson ID: 334775
ST-Ericsson FOSS-OUT ID: Trivial
Change-Id: If25acd1d500800053bd6c511a64c9e5726c69647
Signed-off-by: Vijaya Kumar Kilari <vijay.kilari@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/28334
Reviewed-by: QABUILD
Reviewed-by: QATEST
Reviewed-by: Srinidhi KASAGAR <srinidhi.kasagar@stericsson.com>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/mach-ux500/include/mach/prcmu-db5500.h | 6 | ||||
-rw-r--r-- | arch/arm/mach-ux500/include/mach/prcmu-db8500.h | 24 | ||||
-rw-r--r-- | arch/arm/mach-ux500/include/mach/prcmu.h | 24 | ||||
-rw-r--r-- | arch/arm/mach-ux500/prcmu-db5500.c | 166 |
4 files changed, 195 insertions, 25 deletions
diff --git a/arch/arm/mach-ux500/include/mach/prcmu-db5500.h b/arch/arm/mach-ux500/include/mach/prcmu-db5500.h index 2a9bcf4d1d3..ef1d7b7964f 100644 --- a/arch/arm/mach-ux500/include/mach/prcmu-db5500.h +++ b/arch/arm/mach-ux500/include/mach/prcmu-db5500.h @@ -33,6 +33,7 @@ static inline int prcmu_set_clock_rate(u8 clock, unsigned long rate) int prcmu_resetout(u8 resoutn, u8 state); unsigned int prcmu_get_ddr_freq(void); +int prcmu_get_hotdog(void); #else /* !CONFIG_U5500_PRCMU */ @@ -56,6 +57,11 @@ static inline unsigned int prcmu_get_ddr_freq(void) return 0; } +static inline int prcmu_get_hotdog(void) +{ + return -ENOSYS; +} + #endif /* CONFIG_U5500_PRCMU */ #endif /* __MACH_PRCMU_U5500_H */ diff --git a/arch/arm/mach-ux500/include/mach/prcmu-db8500.h b/arch/arm/mach-ux500/include/mach/prcmu-db8500.h index b30fb134038..c3c3fc957c6 100644 --- a/arch/arm/mach-ux500/include/mach/prcmu-db8500.h +++ b/arch/arm/mach-ux500/include/mach/prcmu-db8500.h @@ -177,10 +177,6 @@ enum ap_pwrst prcmu_get_xp70_current_state(void); /* TODO: Common API with DB5500? */ bool prcmu_has_arm_maxopp(void); -int prcmu_config_hotdog(u8 threshold); -int prcmu_config_hotmon(u8 low, u8 high); -int prcmu_start_temp_sense(u16 cycles32k); -int prcmu_stop_temp_sense(void); void prcmu_enable_spi2(void); void prcmu_disable_spi2(void); @@ -242,26 +238,6 @@ static inline bool prcmu_has_arm_maxopp(void) return false; } -static inline int prcmu_config_hotdog(u8 threshold) -{ - return 0; -} - -static inline int prcmu_config_hotmon(u8 low, u8 high) -{ - return 0; -} - -static inline int prcmu_start_temp_sense(u16 cycles32k) -{ - return 0; -} - -static inline int prcmu_stop_temp_sense(void) -{ - return 0; -} - static inline int prcmu_enable_spi2(void) { return 0; diff --git a/arch/arm/mach-ux500/include/mach/prcmu.h b/arch/arm/mach-ux500/include/mach/prcmu.h index 8c714a5e93a..53e08d6bfdd 100644 --- a/arch/arm/mach-ux500/include/mach/prcmu.h +++ b/arch/arm/mach-ux500/include/mach/prcmu.h @@ -297,6 +297,11 @@ int prcmu_disable_dsipll(void); int prcmu_enable_dsipll(void); int prcmu_config_esram0_deep_sleep(u8 state); +int prcmu_config_hotdog(u8 threshold); +int prcmu_config_hotmon(u8 low, u8 high); +int prcmu_start_temp_sense(u16 cycles32k); +int prcmu_stop_temp_sense(void); + #else static inline void __init prcmu_early_init(void) {} @@ -426,6 +431,25 @@ static inline void prcmu_get_abb_event_buffer(void __iomem **buf) *buf = NULL; } +static int prcmu_config_hotdog(u8 threshold) +{ + return 0; +} + +static int prcmu_config_hotmon(u8 low, u8 high) +{ + return 0; +} + +static int prcmu_start_temp_sense(u16 cycles32k) +{ + return 0; +} +static int prcmu_stop_temp_sense(void) +{ + return 0; +} + #endif #endif /* __MACH_PRCMU_H */ diff --git a/arch/arm/mach-ux500/prcmu-db5500.c b/arch/arm/mach-ux500/prcmu-db5500.c index dbd9dfccfa6..3293596572a 100644 --- a/arch/arm/mach-ux500/prcmu-db5500.c +++ b/arch/arm/mach-ux500/prcmu-db5500.c @@ -71,6 +71,11 @@ #define PRCM_ACK_MB6 (tcdm_base + 0xF0C) #define PRCM_ACK_MB7 (tcdm_base + 0xF08) +/* Share info */ +#define PRCM_SHARE_INFO (tcdm_base + 0xEC8) + +#define PRCM_SHARE_INFO_HOTDOG (PRCM_SHARE_INFO + 62) + /* Mailbox 0 REQs */ #define PRCM_REQ_MB0_AP_POWER_STATE (PRCM_REQ_MB0 + 0x0) #define PRCM_REQ_MB0_ULP_CLOCK_STATE (PRCM_REQ_MB0 + 0x1) @@ -151,6 +156,20 @@ enum sysclk_state { SYSCLK_ON, }; +/* Mailbox 4 headers */ +enum mb4_header { + MB4H_CFG_HOTDOG = 7, + MB4H_CFG_HOTMON = 8, + MB4H_CFG_HOTPERIOD = 10, +}; + +/* Mailbox 4 ACK headers */ +enum mb4_ack_header { + MB4H_ACK_CFG_HOTDOG = 5, + MB4H_ACK_CFG_HOTMON = 6, + MB4H_ACK_CFG_HOTPERIOD = 8, +}; + /* Mailbox 5 headers. */ enum mb5_header { MB5H_I2C_WRITE = 1, @@ -210,6 +229,16 @@ enum db5500_ap_pwr_state { /* Ack. mailbox 3 fields */ #define PRCM_ACK_MB3_REFCLK_REQ (PRCM_ACK_MB3 + 0x0) + +/* Request mailbox 4 fields */ +#define PRCM_REQ_MB4_HOTDOG_THRESHOLD (PRCM_REQ_MB4 + 32) +#define PRCM_REQ_MB4_HOT_PERIOD (PRCM_REQ_MB4 + 34) +#define PRCM_REQ_MB4_HOTMON_LOW (PRCM_REQ_MB4 + 36) +#define PRCM_REQ_MB4_HOTMON_HIGH (PRCM_REQ_MB4 + 38) + +/* Ack. mailbox 4 field */ +#define PRCM_ACK_MB4_REQUESTS (PRCM_ACK_MB4 + 0x0) + /* Request mailbox 5 fields. */ #define PRCM_REQ_MB5_I2C_SLAVE (PRCM_REQ_MB5 + 0) #define PRCM_REQ_MB5_I2C_REG (PRCM_REQ_MB5 + 1) @@ -404,6 +433,21 @@ static struct { } mb3_transfer; /* + * mb4_transfer - state needed for mailbox 4 communication. + * @lock: The transaction lock. + * @work: The transaction completion structure. + * @ack: Acknowledgement data + */ +static struct { + struct mutex lock; + struct completion work; + struct { + u8 header; + u8 status; + } ack; +} mb4_transfer; + +/* * mb5_transfer - state needed for mailbox 5 communication. * @lock: The transaction lock. * @work: The transaction completion structure. @@ -928,6 +972,103 @@ void prcmu_get_abb_event_buffer(void __iomem **buf) *buf = (PRCM_ACK_MB0_WAKEUP_0_ABB); } +/* This function should be called with lock */ +static int mailbox4_request(u8 mb4_request, u8 ack_request) +{ + int ret = 0; + + writeb(mb4_request, PRCM_REQ_MB4_HEADER); + writel(MBOX_BIT(4), (_PRCMU_BASE + PRCM_MBOX_CPU_SET)); + + if (!wait_for_completion_timeout(&mb4_transfer.work, + msecs_to_jiffies(500))) { + pr_err("prcmu: MB4 request %d failed", mb4_request); + ret = -EIO; + WARN(1, "prcmu: failed mb4 request"); + goto failed; + } + + if (mb4_transfer.ack.header != ack_request || + mb4_transfer.ack.status != RC_SUCCESS) + ret = -EIO; +failed: + return ret; +} + +int prcmu_get_hotdog(void) +{ + return readw(PRCM_SHARE_INFO_HOTDOG); +} + +int prcmu_config_hotdog(u8 threshold) +{ + int r = 0; + + mutex_lock(&mb4_transfer.lock); + + while (readl(_PRCMU_BASE + PRCM_MBOX_CPU_VAL) & MBOX_BIT(4)) + cpu_relax(); + + writew(threshold, PRCM_REQ_MB4_HOTDOG_THRESHOLD); + r = mailbox4_request(MB4H_CFG_HOTDOG, MB4H_ACK_CFG_HOTDOG); + + mutex_unlock(&mb4_transfer.lock); + + return r; +} + +int prcmu_config_hotmon(u8 low, u8 high) +{ + int r = 0; + + mutex_lock(&mb4_transfer.lock); + + while (readl(_PRCMU_BASE + PRCM_MBOX_CPU_VAL) & MBOX_BIT(4)) + cpu_relax(); + + writew(low, PRCM_REQ_MB4_HOTMON_LOW); + writew(high, PRCM_REQ_MB4_HOTMON_HIGH); + + r = mailbox4_request(MB4H_CFG_HOTMON, MB4H_ACK_CFG_HOTMON); + + mutex_unlock(&mb4_transfer.lock); + + return r; +} + +static int config_hot_period(u16 val) +{ + int r = 0; + + mutex_lock(&mb4_transfer.lock); + + while (readl(_PRCMU_BASE + PRCM_MBOX_CPU_VAL) & MBOX_BIT(4)) + cpu_relax(); + + writew(val, PRCM_REQ_MB4_HOT_PERIOD); + r = mailbox4_request(MB4H_CFG_HOTPERIOD, MB4H_ACK_CFG_HOTPERIOD); + + mutex_unlock(&mb4_transfer.lock); + + return r; +} + +/* + * period in milli seconds + */ +int prcmu_start_temp_sense(u16 period) +{ + if (period == 0xFFFF) + return -EINVAL; + + return config_hot_period(period); +} + +int prcmu_stop_temp_sense(void) +{ + return config_hot_period(0xFFFF); +} + /** * db5500_prcmu_abb_read() - Read register value(s) from the ABB. * @slave: The I2C slave address. @@ -1597,7 +1738,28 @@ static bool read_mailbox_3(void) static bool read_mailbox_4(void) { - writel(MBOX_BIT(4), _PRCMU_BASE + PRCM_ARM_IT1_CLEAR); + u8 header; + bool do_complete = true; + + header = readb(PRCM_ACK_MB4_HEADER); + mb4_transfer.ack.header = header; + switch (header) { + case MB4H_ACK_CFG_HOTDOG: + case MB4H_ACK_CFG_HOTMON: + case MB4H_ACK_CFG_HOTPERIOD: + mb4_transfer.ack.status = readb(PRCM_ACK_MB4_REQUESTS); + break; + default: + print_unknown_header_warning(4, header); + do_complete = false; + break; + } + + writel(MBOX_BIT(4), (_PRCMU_BASE + PRCM_ARM_IT1_CLEAR)); + + if (do_complete) + complete(&mb4_transfer.work); + return false; } @@ -1754,6 +1916,8 @@ void __init prcmu_early_init(void) init_completion(&mb2_transfer.work); mutex_init(&mb3_transfer.sysclk_lock); init_completion(&mb3_transfer.sysclk_work); + mutex_init(&mb4_transfer.lock); + init_completion(&mb4_transfer.work); mutex_init(&mb5_transfer.lock); init_completion(&mb5_transfer.work); |