From 59b479e0985f0b795d68331d6443a7f89c47768d Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Thu, 27 Jan 2011 16:39:40 -0800 Subject: omap: Start using CONFIG_SOC_OMAP We want to have just CONFIG_ARCH_OMAP2, 3 and 4. The rest are nowadays just subcategories of these. Search and replace the following: ARCH_OMAP2420 SOC_OMAP2420 ARCH_OMAP2430 SOC_OMAP2430 ARCH_OMAP3430 SOC_OMAP3430 No functional changes. Signed-off-by: Tony Lindgren Signed-off-by: Thomas Weber Acked-by: Sourav Poddar --- arch/arm/mach-omap2/mcbsp.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/arm/mach-omap2/mcbsp.c') diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c index f9c9df5b5ff..0526b758bdc 100644 --- a/arch/arm/mach-omap2/mcbsp.c +++ b/arch/arm/mach-omap2/mcbsp.c @@ -104,7 +104,7 @@ EXPORT_SYMBOL(omap2_mcbsp_set_clks_src); /* Platform data */ -#ifdef CONFIG_ARCH_OMAP2420 +#ifdef CONFIG_SOC_OMAP2420 static struct omap_mcbsp_platform_data omap2420_mcbsp_pdata[] = { { .phys_base = OMAP24XX_MCBSP1_BASE, @@ -129,7 +129,7 @@ static struct omap_mcbsp_platform_data omap2420_mcbsp_pdata[] = { #define OMAP2420_MCBSP_REG_NUM 0 #endif -#ifdef CONFIG_ARCH_OMAP2430 +#ifdef CONFIG_SOC_OMAP2430 static struct omap_mcbsp_platform_data omap2430_mcbsp_pdata[] = { { .phys_base = OMAP24XX_MCBSP1_BASE, -- cgit v1.2.3 From 3cf32bba8ca0e0052ca41d74d455a5805b7fea85 Mon Sep 17 00:00:00 2001 From: Kishon Vijay Abraham I Date: Thu, 24 Feb 2011 12:51:45 -0800 Subject: OMAP: McBSP: Convert McBSP to platform device model Implement McBSP as platform device and add support for registering through platform device layer using resource structures. Later in this patch series, OMAP2+ McBSP driver would be modified to use hwmod framework after populating the omap2+ hwmod database. Signed-off-by: Kishon Vijay Abraham I Acked-by: Peter Ujfalusi Acked-by: Jarkko Nikula Acked-by: Mark Brown Signed-off-by: Tony Lindgren --- arch/arm/mach-omap1/mcbsp.c | 327 +++++++++++++---- arch/arm/mach-omap2/mcbsp.c | 613 ++++++++++++++++++++++++++------ arch/arm/plat-omap/devices.c | 10 +- arch/arm/plat-omap/include/plat/mcbsp.h | 14 +- arch/arm/plat-omap/mcbsp.c | 59 ++- 5 files changed, 818 insertions(+), 205 deletions(-) (limited to 'arch/arm/mach-omap2/mcbsp.c') diff --git a/arch/arm/mach-omap1/mcbsp.c b/arch/arm/mach-omap1/mcbsp.c index 820973666f3..e68f6c012fd 100644 --- a/arch/arm/mach-omap1/mcbsp.c +++ b/arch/arm/mach-omap1/mcbsp.c @@ -10,6 +10,7 @@ * * Multichannel mode not supported. */ +#include #include #include #include @@ -78,100 +79,288 @@ static struct omap_mcbsp_ops omap1_mcbsp_ops = { }; #if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850) +struct resource omap7xx_mcbsp_res[][6] = { + { + { + .start = OMAP7XX_MCBSP1_BASE, + .end = OMAP7XX_MCBSP1_BASE + SZ_256, + .flags = IORESOURCE_MEM, + }, + { + .name = "rx", + .start = INT_7XX_McBSP1RX, + .flags = IORESOURCE_IRQ, + }, + { + .name = "tx", + .start = INT_7XX_McBSP1TX, + .flags = IORESOURCE_IRQ, + }, + { + .name = "rx", + .start = OMAP_DMA_MCBSP1_RX, + .flags = IORESOURCE_DMA, + }, + { + .name = "tx", + .start = OMAP_DMA_MCBSP1_TX, + .flags = IORESOURCE_DMA, + }, + }, + { + { + .start = OMAP7XX_MCBSP2_BASE, + .end = OMAP7XX_MCBSP2_BASE + SZ_256, + .flags = IORESOURCE_MEM, + }, + { + .name = "rx", + .start = INT_7XX_McBSP2RX, + .flags = IORESOURCE_IRQ, + }, + { + .name = "tx", + .start = INT_7XX_McBSP2TX, + .flags = IORESOURCE_IRQ, + }, + { + .name = "rx", + .start = OMAP_DMA_MCBSP3_RX, + .flags = IORESOURCE_DMA, + }, + { + .name = "tx", + .start = OMAP_DMA_MCBSP3_TX, + .flags = IORESOURCE_DMA, + }, + }, +}; + static struct omap_mcbsp_platform_data omap7xx_mcbsp_pdata[] = { { - .phys_base = OMAP7XX_MCBSP1_BASE, - .dma_rx_sync = OMAP_DMA_MCBSP1_RX, - .dma_tx_sync = OMAP_DMA_MCBSP1_TX, - .rx_irq = INT_7XX_McBSP1RX, - .tx_irq = INT_7XX_McBSP1TX, .ops = &omap1_mcbsp_ops, }, { - .phys_base = OMAP7XX_MCBSP2_BASE, - .dma_rx_sync = OMAP_DMA_MCBSP3_RX, - .dma_tx_sync = OMAP_DMA_MCBSP3_TX, - .rx_irq = INT_7XX_McBSP2RX, - .tx_irq = INT_7XX_McBSP2TX, .ops = &omap1_mcbsp_ops, }, }; -#define OMAP7XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap7xx_mcbsp_pdata) -#define OMAP7XX_MCBSP_REG_NUM (OMAP_MCBSP_REG_XCERH / sizeof(u16) + 1) +#define OMAP7XX_MCBSP_RES_SZ ARRAY_SIZE(omap7xx_mcbsp_res[1]) +#define OMAP7XX_MCBSP_COUNT ARRAY_SIZE(omap7xx_mcbsp_res) #else +#define omap7xx_mcbsp_res NULL #define omap7xx_mcbsp_pdata NULL -#define OMAP7XX_MCBSP_PDATA_SZ 0 -#define OMAP7XX_MCBSP_REG_NUM 0 +#define OMAP7XX_MCBSP_RES_SZ 0 +#define OMAP7XX_MCBSP_COUNT 0 #endif #ifdef CONFIG_ARCH_OMAP15XX +struct resource omap15xx_mcbsp_res[][6] = { + { + { + .start = OMAP1510_MCBSP1_BASE, + .end = OMAP1510_MCBSP1_BASE + SZ_256, + .flags = IORESOURCE_MEM, + }, + { + .name = "rx", + .start = INT_McBSP1RX, + .flags = IORESOURCE_IRQ, + }, + { + .name = "tx", + .start = INT_McBSP1TX, + .flags = IORESOURCE_IRQ, + }, + { + .name = "rx", + .start = OMAP_DMA_MCBSP1_RX, + .flags = IORESOURCE_DMA, + }, + { + .name = "tx", + .start = OMAP_DMA_MCBSP1_TX, + .flags = IORESOURCE_DMA, + }, + }, + { + { + .start = OMAP1510_MCBSP2_BASE, + .end = OMAP1510_MCBSP2_BASE + SZ_256, + .flags = IORESOURCE_MEM, + }, + { + .name = "rx", + .start = INT_1510_SPI_RX, + .flags = IORESOURCE_IRQ, + }, + { + .name = "tx", + .start = INT_1510_SPI_TX, + .flags = IORESOURCE_IRQ, + }, + { + .name = "rx", + .start = OMAP_DMA_MCBSP2_RX, + .flags = IORESOURCE_DMA, + }, + { + .name = "tx", + .start = OMAP_DMA_MCBSP2_TX, + .flags = IORESOURCE_DMA, + }, + }, + { + { + .start = OMAP1510_MCBSP3_BASE, + .end = OMAP1510_MCBSP3_BASE + SZ_256, + .flags = IORESOURCE_MEM, + }, + { + .name = "rx", + .start = INT_McBSP3RX, + .flags = IORESOURCE_IRQ, + }, + { + .name = "tx", + .start = INT_McBSP3TX, + .flags = IORESOURCE_IRQ, + }, + { + .name = "rx", + .start = OMAP_DMA_MCBSP3_RX, + .flags = IORESOURCE_DMA, + }, + { + .name = "tx", + .start = OMAP_DMA_MCBSP3_TX, + .flags = IORESOURCE_DMA, + }, + }, +}; + static struct omap_mcbsp_platform_data omap15xx_mcbsp_pdata[] = { { - .phys_base = OMAP1510_MCBSP1_BASE, - .dma_rx_sync = OMAP_DMA_MCBSP1_RX, - .dma_tx_sync = OMAP_DMA_MCBSP1_TX, - .rx_irq = INT_McBSP1RX, - .tx_irq = INT_McBSP1TX, .ops = &omap1_mcbsp_ops, }, { - .phys_base = OMAP1510_MCBSP2_BASE, - .dma_rx_sync = OMAP_DMA_MCBSP2_RX, - .dma_tx_sync = OMAP_DMA_MCBSP2_TX, - .rx_irq = INT_1510_SPI_RX, - .tx_irq = INT_1510_SPI_TX, .ops = &omap1_mcbsp_ops, }, { - .phys_base = OMAP1510_MCBSP3_BASE, - .dma_rx_sync = OMAP_DMA_MCBSP3_RX, - .dma_tx_sync = OMAP_DMA_MCBSP3_TX, - .rx_irq = INT_McBSP3RX, - .tx_irq = INT_McBSP3TX, .ops = &omap1_mcbsp_ops, }, }; -#define OMAP15XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap15xx_mcbsp_pdata) -#define OMAP15XX_MCBSP_REG_NUM (OMAP_MCBSP_REG_XCERH / sizeof(u16) + 1) +#define OMAP15XX_MCBSP_RES_SZ ARRAY_SIZE(omap15xx_mcbsp_res[1]) +#define OMAP15XX_MCBSP_COUNT ARRAY_SIZE(omap15xx_mcbsp_res) #else +#define omap15xx_mcbsp_res NULL #define omap15xx_mcbsp_pdata NULL -#define OMAP15XX_MCBSP_PDATA_SZ 0 -#define OMAP15XX_MCBSP_REG_NUM 0 +#define OMAP15XX_MCBSP_RES_SZ 0 +#define OMAP15XX_MCBSP_COUNT 0 #endif #ifdef CONFIG_ARCH_OMAP16XX +struct resource omap16xx_mcbsp_res[][6] = { + { + { + .start = OMAP1610_MCBSP1_BASE, + .end = OMAP1610_MCBSP1_BASE + SZ_256, + .flags = IORESOURCE_MEM, + }, + { + .name = "rx", + .start = INT_McBSP1RX, + .flags = IORESOURCE_IRQ, + }, + { + .name = "tx", + .start = INT_McBSP1TX, + .flags = IORESOURCE_IRQ, + }, + { + .name = "rx", + .start = OMAP_DMA_MCBSP1_RX, + .flags = IORESOURCE_DMA, + }, + { + .name = "tx", + .start = OMAP_DMA_MCBSP1_TX, + .flags = IORESOURCE_DMA, + }, + }, + { + { + .start = OMAP1610_MCBSP2_BASE, + .end = OMAP1610_MCBSP2_BASE + SZ_256, + .flags = IORESOURCE_MEM, + }, + { + .name = "rx", + .start = INT_1610_McBSP2_RX, + .flags = IORESOURCE_IRQ, + }, + { + .name = "tx", + .start = INT_1610_McBSP2_TX, + .flags = IORESOURCE_IRQ, + }, + { + .name = "rx", + .start = OMAP_DMA_MCBSP2_RX, + .flags = IORESOURCE_DMA, + }, + { + .name = "tx", + .start = OMAP_DMA_MCBSP2_TX, + .flags = IORESOURCE_DMA, + }, + }, + { + { + .start = OMAP1610_MCBSP3_BASE, + .end = OMAP1610_MCBSP3_BASE + SZ_256, + .flags = IORESOURCE_MEM, + }, + { + .name = "rx", + .start = INT_McBSP3RX, + .flags = IORESOURCE_IRQ, + }, + { + .name = "tx", + .start = INT_McBSP3TX, + .flags = IORESOURCE_IRQ, + }, + { + .name = "rx", + .start = OMAP_DMA_MCBSP3_RX, + .flags = IORESOURCE_DMA, + }, + { + .name = "tx", + .start = OMAP_DMA_MCBSP3_TX, + .flags = IORESOURCE_DMA, + }, + }, +}; + static struct omap_mcbsp_platform_data omap16xx_mcbsp_pdata[] = { { - .phys_base = OMAP1610_MCBSP1_BASE, - .dma_rx_sync = OMAP_DMA_MCBSP1_RX, - .dma_tx_sync = OMAP_DMA_MCBSP1_TX, - .rx_irq = INT_McBSP1RX, - .tx_irq = INT_McBSP1TX, .ops = &omap1_mcbsp_ops, }, { - .phys_base = OMAP1610_MCBSP2_BASE, - .dma_rx_sync = OMAP_DMA_MCBSP2_RX, - .dma_tx_sync = OMAP_DMA_MCBSP2_TX, - .rx_irq = INT_1610_McBSP2_RX, - .tx_irq = INT_1610_McBSP2_TX, .ops = &omap1_mcbsp_ops, }, { - .phys_base = OMAP1610_MCBSP3_BASE, - .dma_rx_sync = OMAP_DMA_MCBSP3_RX, - .dma_tx_sync = OMAP_DMA_MCBSP3_TX, - .rx_irq = INT_McBSP3RX, - .tx_irq = INT_McBSP3TX, .ops = &omap1_mcbsp_ops, }, }; -#define OMAP16XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap16xx_mcbsp_pdata) -#define OMAP16XX_MCBSP_REG_NUM (OMAP_MCBSP_REG_XCERH / sizeof(u16) + 1) +#define OMAP16XX_MCBSP_RES_SZ ARRAY_SIZE(omap16xx_mcbsp_res[1]) +#define OMAP16XX_MCBSP_COUNT ARRAY_SIZE(omap16xx_mcbsp_res) #else +#define omap16xx_mcbsp_res NULL #define omap16xx_mcbsp_pdata NULL -#define OMAP16XX_MCBSP_PDATA_SZ 0 -#define OMAP16XX_MCBSP_REG_NUM 0 +#define OMAP16XX_MCBSP_RES_SZ 0 +#define OMAP16XX_MCBSP_COUNT 0 #endif static int __init omap1_mcbsp_init(void) @@ -179,16 +368,12 @@ static int __init omap1_mcbsp_init(void) if (!cpu_class_is_omap1()) return -ENODEV; - if (cpu_is_omap7xx()) { - omap_mcbsp_count = OMAP7XX_MCBSP_PDATA_SZ; - omap_mcbsp_cache_size = OMAP7XX_MCBSP_REG_NUM * sizeof(u16); - } else if (cpu_is_omap15xx()) { - omap_mcbsp_count = OMAP15XX_MCBSP_PDATA_SZ; - omap_mcbsp_cache_size = OMAP15XX_MCBSP_REG_NUM * sizeof(u16); - } else if (cpu_is_omap16xx()) { - omap_mcbsp_count = OMAP16XX_MCBSP_PDATA_SZ; - omap_mcbsp_cache_size = OMAP16XX_MCBSP_REG_NUM * sizeof(u16); - } + if (cpu_is_omap7xx()) + omap_mcbsp_count = OMAP7XX_MCBSP_COUNT; + else if (cpu_is_omap15xx()) + omap_mcbsp_count = OMAP15XX_MCBSP_COUNT; + else if (cpu_is_omap16xx()) + omap_mcbsp_count = OMAP16XX_MCBSP_COUNT; mcbsp_ptr = kzalloc(omap_mcbsp_count * sizeof(struct omap_mcbsp *), GFP_KERNEL); @@ -196,16 +381,22 @@ static int __init omap1_mcbsp_init(void) return -ENOMEM; if (cpu_is_omap7xx()) - omap_mcbsp_register_board_cfg(omap7xx_mcbsp_pdata, - OMAP7XX_MCBSP_PDATA_SZ); + omap_mcbsp_register_board_cfg(omap7xx_mcbsp_res[0], + OMAP7XX_MCBSP_RES_SZ, + omap7xx_mcbsp_pdata, + OMAP7XX_MCBSP_COUNT); if (cpu_is_omap15xx()) - omap_mcbsp_register_board_cfg(omap15xx_mcbsp_pdata, - OMAP15XX_MCBSP_PDATA_SZ); + omap_mcbsp_register_board_cfg(omap15xx_mcbsp_res[0], + OMAP15XX_MCBSP_RES_SZ, + omap15xx_mcbsp_pdata, + OMAP15XX_MCBSP_COUNT); if (cpu_is_omap16xx()) - omap_mcbsp_register_board_cfg(omap16xx_mcbsp_pdata, - OMAP16XX_MCBSP_PDATA_SZ); + omap_mcbsp_register_board_cfg(omap16xx_mcbsp_res[0], + OMAP16XX_MCBSP_RES_SZ, + omap16xx_mcbsp_pdata, + OMAP16XX_MCBSP_COUNT); return omap_mcbsp_init(); } diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c index 0526b758bdc..765ebe7da72 100644 --- a/arch/arm/mach-omap2/mcbsp.c +++ b/arch/arm/mach-omap2/mcbsp.c @@ -105,173 +105,542 @@ EXPORT_SYMBOL(omap2_mcbsp_set_clks_src); /* Platform data */ #ifdef CONFIG_SOC_OMAP2420 -static struct omap_mcbsp_platform_data omap2420_mcbsp_pdata[] = { +struct resource omap2420_mcbsp_res[][6] = { { - .phys_base = OMAP24XX_MCBSP1_BASE, - .dma_rx_sync = OMAP24XX_DMA_MCBSP1_RX, - .dma_tx_sync = OMAP24XX_DMA_MCBSP1_TX, - .rx_irq = INT_24XX_MCBSP1_IRQ_RX, - .tx_irq = INT_24XX_MCBSP1_IRQ_TX, + { + .start = OMAP24XX_MCBSP1_BASE, + .end = OMAP24XX_MCBSP1_BASE + SZ_256, + .flags = IORESOURCE_MEM, + }, + { + .name = "rx", + .start = INT_24XX_MCBSP1_IRQ_RX, + .flags = IORESOURCE_IRQ, + }, + { + .name = "tx", + .start = INT_24XX_MCBSP1_IRQ_TX, + .flags = IORESOURCE_IRQ, + }, + { + .name = "rx", + .start = OMAP24XX_DMA_MCBSP1_RX, + .flags = IORESOURCE_DMA, + }, + { + .name = "tx", + .start = OMAP24XX_DMA_MCBSP1_TX, + .flags = IORESOURCE_DMA, + }, }, { - .phys_base = OMAP24XX_MCBSP2_BASE, - .dma_rx_sync = OMAP24XX_DMA_MCBSP2_RX, - .dma_tx_sync = OMAP24XX_DMA_MCBSP2_TX, - .rx_irq = INT_24XX_MCBSP2_IRQ_RX, - .tx_irq = INT_24XX_MCBSP2_IRQ_TX, + { + .start = OMAP24XX_MCBSP2_BASE, + .end = OMAP24XX_MCBSP2_BASE + SZ_256, + .flags = IORESOURCE_MEM, + }, + { + .name = "rx", + .start = INT_24XX_MCBSP2_IRQ_RX, + .flags = IORESOURCE_IRQ, + }, + { + .name = "tx", + .start = INT_24XX_MCBSP2_IRQ_TX, + .flags = IORESOURCE_IRQ, + }, + { + .name = "rx", + .start = OMAP24XX_DMA_MCBSP2_RX, + .flags = IORESOURCE_DMA, + }, + { + .name = "tx", + .start = OMAP24XX_DMA_MCBSP2_TX, + .flags = IORESOURCE_DMA, + }, }, }; -#define OMAP2420_MCBSP_PDATA_SZ ARRAY_SIZE(omap2420_mcbsp_pdata) -#define OMAP2420_MCBSP_REG_NUM (OMAP_MCBSP_REG_RCCR / sizeof(u32) + 1) +#define OMAP2420_MCBSP_RES_SZ ARRAY_SIZE(omap2420_mcbsp_res[1]) +#define OMAP2420_MCBSP_COUNT ARRAY_SIZE(omap2420_mcbsp_res) #else -#define omap2420_mcbsp_pdata NULL -#define OMAP2420_MCBSP_PDATA_SZ 0 -#define OMAP2420_MCBSP_REG_NUM 0 +#define omap2420_mcbsp_res NULL +#define OMAP2420_MCBSP_RES_SZ 0 +#define OMAP2420_MCBSP_COUNT 0 #endif +#define omap2420_mcbsp_pdata NULL + #ifdef CONFIG_SOC_OMAP2430 -static struct omap_mcbsp_platform_data omap2430_mcbsp_pdata[] = { +struct resource omap2430_mcbsp_res[][6] = { { - .phys_base = OMAP24XX_MCBSP1_BASE, - .dma_rx_sync = OMAP24XX_DMA_MCBSP1_RX, - .dma_tx_sync = OMAP24XX_DMA_MCBSP1_TX, - .rx_irq = INT_24XX_MCBSP1_IRQ_RX, - .tx_irq = INT_24XX_MCBSP1_IRQ_TX, + { + .start = OMAP24XX_MCBSP1_BASE, + .end = OMAP24XX_MCBSP1_BASE + SZ_256, + .flags = IORESOURCE_MEM, + }, + { + .name = "rx", + .start = INT_24XX_MCBSP1_IRQ_RX, + .flags = IORESOURCE_IRQ, + }, + { + .name = "tx", + .start = INT_24XX_MCBSP1_IRQ_TX, + .flags = IORESOURCE_IRQ, + }, + { + .name = "rx", + .start = OMAP24XX_DMA_MCBSP1_RX, + .flags = IORESOURCE_DMA, + }, + { + .name = "tx", + .start = OMAP24XX_DMA_MCBSP1_TX, + .flags = IORESOURCE_DMA, + }, }, { - .phys_base = OMAP24XX_MCBSP2_BASE, - .dma_rx_sync = OMAP24XX_DMA_MCBSP2_RX, - .dma_tx_sync = OMAP24XX_DMA_MCBSP2_TX, - .rx_irq = INT_24XX_MCBSP2_IRQ_RX, - .tx_irq = INT_24XX_MCBSP2_IRQ_TX, + { + .start = OMAP24XX_MCBSP2_BASE, + .end = OMAP24XX_MCBSP2_BASE + SZ_256, + .flags = IORESOURCE_MEM, + }, + { + .name = "rx", + .start = INT_24XX_MCBSP2_IRQ_RX, + .flags = IORESOURCE_IRQ, + }, + { + .name = "tx", + .start = INT_24XX_MCBSP2_IRQ_TX, + .flags = IORESOURCE_IRQ, + }, + { + .name = "rx", + .start = OMAP24XX_DMA_MCBSP2_RX, + .flags = IORESOURCE_DMA, + }, + { + .name = "tx", + .start = OMAP24XX_DMA_MCBSP2_TX, + .flags = IORESOURCE_DMA, + }, }, { - .phys_base = OMAP2430_MCBSP3_BASE, - .dma_rx_sync = OMAP24XX_DMA_MCBSP3_RX, - .dma_tx_sync = OMAP24XX_DMA_MCBSP3_TX, - .rx_irq = INT_24XX_MCBSP3_IRQ_RX, - .tx_irq = INT_24XX_MCBSP3_IRQ_TX, + { + .start = OMAP2430_MCBSP3_BASE, + .end = OMAP2430_MCBSP3_BASE + SZ_256, + .flags = IORESOURCE_MEM, + }, + { + .name = "rx", + .start = INT_24XX_MCBSP3_IRQ_RX, + .flags = IORESOURCE_IRQ, + }, + { + .name = "tx", + .start = INT_24XX_MCBSP3_IRQ_TX, + .flags = IORESOURCE_IRQ, + }, + { + .name = "rx", + .start = OMAP24XX_DMA_MCBSP3_RX, + .flags = IORESOURCE_DMA, + }, + { + .name = "tx", + .start = OMAP24XX_DMA_MCBSP3_TX, + .flags = IORESOURCE_DMA, + }, }, { - .phys_base = OMAP2430_MCBSP4_BASE, - .dma_rx_sync = OMAP24XX_DMA_MCBSP4_RX, - .dma_tx_sync = OMAP24XX_DMA_MCBSP4_TX, - .rx_irq = INT_24XX_MCBSP4_IRQ_RX, - .tx_irq = INT_24XX_MCBSP4_IRQ_TX, + { + .start = OMAP2430_MCBSP4_BASE, + .end = OMAP2430_MCBSP4_BASE + SZ_256, + .flags = IORESOURCE_MEM, + }, + { + .name = "rx", + .start = INT_24XX_MCBSP4_IRQ_RX, + .flags = IORESOURCE_IRQ, + }, + { + .name = "tx", + .start = INT_24XX_MCBSP4_IRQ_TX, + .flags = IORESOURCE_IRQ, + }, + { + .name = "rx", + .start = OMAP24XX_DMA_MCBSP4_RX, + .flags = IORESOURCE_DMA, + }, + { + .name = "tx", + .start = OMAP24XX_DMA_MCBSP4_TX, + .flags = IORESOURCE_DMA, + }, }, { - .phys_base = OMAP2430_MCBSP5_BASE, - .dma_rx_sync = OMAP24XX_DMA_MCBSP5_RX, - .dma_tx_sync = OMAP24XX_DMA_MCBSP5_TX, - .rx_irq = INT_24XX_MCBSP5_IRQ_RX, - .tx_irq = INT_24XX_MCBSP5_IRQ_TX, + { + .start = OMAP2430_MCBSP5_BASE, + .end = OMAP2430_MCBSP5_BASE + SZ_256, + .flags = IORESOURCE_MEM, + }, + { + .name = "rx", + .start = INT_24XX_MCBSP5_IRQ_RX, + .flags = IORESOURCE_IRQ, + }, + { + .name = "tx", + .start = INT_24XX_MCBSP5_IRQ_TX, + .flags = IORESOURCE_IRQ, + }, + { + .name = "rx", + .start = OMAP24XX_DMA_MCBSP5_RX, + .flags = IORESOURCE_DMA, + }, + { + .name = "tx", + .start = OMAP24XX_DMA_MCBSP5_TX, + .flags = IORESOURCE_DMA, + }, }, }; -#define OMAP2430_MCBSP_PDATA_SZ ARRAY_SIZE(omap2430_mcbsp_pdata) -#define OMAP2430_MCBSP_REG_NUM (OMAP_MCBSP_REG_RCCR / sizeof(u32) + 1) +#define OMAP2430_MCBSP_RES_SZ ARRAY_SIZE(omap2430_mcbsp_res[1]) +#define OMAP2430_MCBSP_COUNT ARRAY_SIZE(omap2430_mcbsp_res) #else -#define omap2430_mcbsp_pdata NULL -#define OMAP2430_MCBSP_PDATA_SZ 0 -#define OMAP2430_MCBSP_REG_NUM 0 +#define omap2430_mcbsp_res NULL +#define OMAP2430_MCBSP_RES_SZ 0 +#define OMAP2430_MCBSP_COUNT 0 #endif +#define omap2430_mcbsp_pdata NULL + #ifdef CONFIG_ARCH_OMAP3 +struct resource omap34xx_mcbsp_res[][7] = { + { + { + .start = OMAP34XX_MCBSP1_BASE, + .end = OMAP34XX_MCBSP1_BASE + SZ_256, + .flags = IORESOURCE_MEM, + }, + { + .name = "rx", + .start = INT_24XX_MCBSP1_IRQ_RX, + .flags = IORESOURCE_IRQ, + }, + { + .name = "tx", + .start = INT_24XX_MCBSP1_IRQ_TX, + .flags = IORESOURCE_IRQ, + }, + { + .name = "rx", + .start = OMAP24XX_DMA_MCBSP1_RX, + .flags = IORESOURCE_DMA, + }, + { + .name = "tx", + .start = OMAP24XX_DMA_MCBSP1_TX, + .flags = IORESOURCE_DMA, + }, + }, + { + { + .start = OMAP34XX_MCBSP2_BASE, + .end = OMAP34XX_MCBSP2_BASE + SZ_256, + .flags = IORESOURCE_MEM, + }, + { + .name = "sidetone", + .start = OMAP34XX_MCBSP2_ST_BASE, + .end = OMAP34XX_MCBSP2_ST_BASE + SZ_256, + .flags = IORESOURCE_MEM, + }, + { + .name = "rx", + .start = INT_24XX_MCBSP2_IRQ_RX, + .flags = IORESOURCE_IRQ, + }, + { + .name = "tx", + .start = INT_24XX_MCBSP2_IRQ_TX, + .flags = IORESOURCE_IRQ, + }, + { + .name = "rx", + .start = OMAP24XX_DMA_MCBSP2_RX, + .flags = IORESOURCE_DMA, + }, + { + .name = "tx", + .start = OMAP24XX_DMA_MCBSP2_TX, + .flags = IORESOURCE_DMA, + }, + }, + { + { + .start = OMAP34XX_MCBSP3_BASE, + .end = OMAP34XX_MCBSP3_BASE + SZ_256, + .flags = IORESOURCE_MEM, + }, + { + .name = "sidetone", + .start = OMAP34XX_MCBSP3_ST_BASE, + .end = OMAP34XX_MCBSP3_ST_BASE + SZ_256, + .flags = IORESOURCE_MEM, + }, + { + .name = "rx", + .start = INT_24XX_MCBSP3_IRQ_RX, + .flags = IORESOURCE_IRQ, + }, + { + .name = "tx", + .start = INT_24XX_MCBSP3_IRQ_TX, + .flags = IORESOURCE_IRQ, + }, + { + .name = "rx", + .start = OMAP24XX_DMA_MCBSP3_RX, + .flags = IORESOURCE_DMA, + }, + { + .name = "tx", + .start = OMAP24XX_DMA_MCBSP3_TX, + .flags = IORESOURCE_DMA, + }, + }, + { + { + .start = OMAP34XX_MCBSP4_BASE, + .end = OMAP34XX_MCBSP4_BASE + SZ_256, + .flags = IORESOURCE_MEM, + }, + { + .name = "rx", + .start = INT_24XX_MCBSP4_IRQ_RX, + .flags = IORESOURCE_IRQ, + }, + { + .name = "tx", + .start = INT_24XX_MCBSP4_IRQ_TX, + .flags = IORESOURCE_IRQ, + }, + { + .name = "rx", + .start = OMAP24XX_DMA_MCBSP4_RX, + .flags = IORESOURCE_DMA, + }, + { + .name = "tx", + .start = OMAP24XX_DMA_MCBSP4_TX, + .flags = IORESOURCE_DMA, + }, + }, + { + { + .start = OMAP34XX_MCBSP5_BASE, + .end = OMAP34XX_MCBSP5_BASE + SZ_256, + .flags = IORESOURCE_MEM, + }, + { + .name = "rx", + .start = INT_24XX_MCBSP5_IRQ_RX, + .flags = IORESOURCE_IRQ, + }, + { + .name = "tx", + .start = INT_24XX_MCBSP5_IRQ_TX, + .flags = IORESOURCE_IRQ, + }, + { + .name = "rx", + .start = OMAP24XX_DMA_MCBSP5_RX, + .flags = IORESOURCE_DMA, + }, + { + .name = "tx", + .start = OMAP24XX_DMA_MCBSP5_TX, + .flags = IORESOURCE_DMA, + }, + }, +}; + static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = { { - .phys_base = OMAP34XX_MCBSP1_BASE, - .dma_rx_sync = OMAP24XX_DMA_MCBSP1_RX, - .dma_tx_sync = OMAP24XX_DMA_MCBSP1_TX, - .rx_irq = INT_24XX_MCBSP1_IRQ_RX, - .tx_irq = INT_24XX_MCBSP1_IRQ_TX, .buffer_size = 0x80, /* The FIFO has 128 locations */ }, { - .phys_base = OMAP34XX_MCBSP2_BASE, - .phys_base_st = OMAP34XX_MCBSP2_ST_BASE, - .dma_rx_sync = OMAP24XX_DMA_MCBSP2_RX, - .dma_tx_sync = OMAP24XX_DMA_MCBSP2_TX, - .rx_irq = INT_24XX_MCBSP2_IRQ_RX, - .tx_irq = INT_24XX_MCBSP2_IRQ_TX, .buffer_size = 0x500, /* The FIFO has 1024 + 256 locations */ }, { - .phys_base = OMAP34XX_MCBSP3_BASE, - .phys_base_st = OMAP34XX_MCBSP3_ST_BASE, - .dma_rx_sync = OMAP24XX_DMA_MCBSP3_RX, - .dma_tx_sync = OMAP24XX_DMA_MCBSP3_TX, - .rx_irq = INT_24XX_MCBSP3_IRQ_RX, - .tx_irq = INT_24XX_MCBSP3_IRQ_TX, .buffer_size = 0x80, /* The FIFO has 128 locations */ }, { - .phys_base = OMAP34XX_MCBSP4_BASE, - .dma_rx_sync = OMAP24XX_DMA_MCBSP4_RX, - .dma_tx_sync = OMAP24XX_DMA_MCBSP4_TX, - .rx_irq = INT_24XX_MCBSP4_IRQ_RX, - .tx_irq = INT_24XX_MCBSP4_IRQ_TX, .buffer_size = 0x80, /* The FIFO has 128 locations */ }, { - .phys_base = OMAP34XX_MCBSP5_BASE, - .dma_rx_sync = OMAP24XX_DMA_MCBSP5_RX, - .dma_tx_sync = OMAP24XX_DMA_MCBSP5_TX, - .rx_irq = INT_24XX_MCBSP5_IRQ_RX, - .tx_irq = INT_24XX_MCBSP5_IRQ_TX, .buffer_size = 0x80, /* The FIFO has 128 locations */ }, }; -#define OMAP34XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap34xx_mcbsp_pdata) -#define OMAP34XX_MCBSP_REG_NUM (OMAP_MCBSP_REG_RCCR / sizeof(u32) + 1) +#define OMAP34XX_MCBSP_RES_SZ ARRAY_SIZE(omap34xx_mcbsp_res[1]) +#define OMAP34XX_MCBSP_COUNT ARRAY_SIZE(omap34xx_mcbsp_res) #else #define omap34xx_mcbsp_pdata NULL -#define OMAP34XX_MCBSP_PDATA_SZ 0 -#define OMAP34XX_MCBSP_REG_NUM 0 +#define omap34XX_mcbsp_res NULL +#define OMAP34XX_MCBSP_RES_SZ 0 +#define OMAP34XX_MCBSP_COUNT 0 #endif -static struct omap_mcbsp_platform_data omap44xx_mcbsp_pdata[] = { +struct resource omap44xx_mcbsp_res[][6] = { { - .phys_base = OMAP44XX_MCBSP1_BASE, - .dma_rx_sync = OMAP44XX_DMA_MCBSP1_RX, - .dma_tx_sync = OMAP44XX_DMA_MCBSP1_TX, - .tx_irq = OMAP44XX_IRQ_MCBSP1, + { + .name = "mpu", + .start = OMAP44XX_MCBSP1_BASE, + .end = OMAP44XX_MCBSP1_BASE + SZ_256, + .flags = IORESOURCE_MEM, + }, + { + .name = "dma", + .start = OMAP44XX_MCBSP1_DMA_BASE, + .end = OMAP44XX_MCBSP1_DMA_BASE + SZ_256, + .flags = IORESOURCE_MEM, + }, + { + .name = "rx", + .start = 0, + .flags = IORESOURCE_IRQ, + }, + { + .name = "tx", + .start = OMAP44XX_IRQ_MCBSP1, + .flags = IORESOURCE_IRQ, + }, + { + .name = "rx", + .start = OMAP44XX_DMA_MCBSP1_RX, + .flags = IORESOURCE_DMA, + }, + { + .name = "tx", + .start = OMAP44XX_DMA_MCBSP1_TX, + .flags = IORESOURCE_DMA, + }, }, { - .phys_base = OMAP44XX_MCBSP2_BASE, - .dma_rx_sync = OMAP44XX_DMA_MCBSP2_RX, - .dma_tx_sync = OMAP44XX_DMA_MCBSP2_TX, - .tx_irq = OMAP44XX_IRQ_MCBSP2, + { + .name = "mpu", + .start = OMAP44XX_MCBSP2_BASE, + .end = OMAP44XX_MCBSP2_BASE + SZ_256, + .flags = IORESOURCE_MEM, + }, + { + .name = "dma", + .start = OMAP44XX_MCBSP2_DMA_BASE, + .end = OMAP44XX_MCBSP2_DMA_BASE + SZ_256, + .flags = IORESOURCE_MEM, + }, + { + .name = "rx", + .start = 0, + .flags = IORESOURCE_IRQ, + }, + { + .name = "tx", + .start = OMAP44XX_IRQ_MCBSP2, + .flags = IORESOURCE_IRQ, + }, + { + .name = "rx", + .start = OMAP44XX_DMA_MCBSP2_RX, + .flags = IORESOURCE_DMA, + }, + { + .name = "tx", + .start = OMAP44XX_DMA_MCBSP2_TX, + .flags = IORESOURCE_DMA, + }, }, { - .phys_base = OMAP44XX_MCBSP3_BASE, - .dma_rx_sync = OMAP44XX_DMA_MCBSP3_RX, - .dma_tx_sync = OMAP44XX_DMA_MCBSP3_TX, - .tx_irq = OMAP44XX_IRQ_MCBSP3, + { + .name = "mpu", + .start = OMAP44XX_MCBSP3_BASE, + .end = OMAP44XX_MCBSP3_BASE + SZ_256, + .flags = IORESOURCE_MEM, + }, + { + .name = "dma", + .start = OMAP44XX_MCBSP3_DMA_BASE, + .end = OMAP44XX_MCBSP3_DMA_BASE + SZ_256, + .flags = IORESOURCE_MEM, + }, + { + .name = "rx", + .start = 0, + .flags = IORESOURCE_IRQ, + }, + { + .name = "tx", + .start = OMAP44XX_IRQ_MCBSP3, + .flags = IORESOURCE_IRQ, + }, + { + .name = "rx", + .start = OMAP44XX_DMA_MCBSP3_RX, + .flags = IORESOURCE_DMA, + }, + { + .name = "tx", + .start = OMAP44XX_DMA_MCBSP3_TX, + .flags = IORESOURCE_DMA, + }, }, { - .phys_base = OMAP44XX_MCBSP4_BASE, - .dma_rx_sync = OMAP44XX_DMA_MCBSP4_RX, - .dma_tx_sync = OMAP44XX_DMA_MCBSP4_TX, - .tx_irq = OMAP44XX_IRQ_MCBSP4, + { + .start = OMAP44XX_MCBSP4_BASE, + .end = OMAP44XX_MCBSP4_BASE + SZ_256, + .flags = IORESOURCE_MEM, + }, + { + .name = "rx", + .start = 0, + .flags = IORESOURCE_IRQ, + }, + { + .name = "tx", + .start = OMAP44XX_IRQ_MCBSP4, + .flags = IORESOURCE_IRQ, + }, + { + .name = "rx", + .start = OMAP44XX_DMA_MCBSP4_RX, + .flags = IORESOURCE_DMA, + }, + { + .name = "tx", + .start = OMAP44XX_DMA_MCBSP4_TX, + .flags = IORESOURCE_DMA, + }, }, }; -#define OMAP44XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap44xx_mcbsp_pdata) -#define OMAP44XX_MCBSP_REG_NUM (OMAP_MCBSP_REG_RCCR / sizeof(u32) + 1) +#define omap44xx_mcbsp_pdata NULL +#define OMAP44XX_MCBSP_RES_SZ ARRAY_SIZE(omap44xx_mcbsp_res[1]) +#define OMAP44XX_MCBSP_COUNT ARRAY_SIZE(omap44xx_mcbsp_res) static int __init omap2_mcbsp_init(void) { - if (cpu_is_omap2420()) { - omap_mcbsp_count = OMAP2420_MCBSP_PDATA_SZ; - omap_mcbsp_cache_size = OMAP2420_MCBSP_REG_NUM * sizeof(u16); - } else if (cpu_is_omap2430()) { - omap_mcbsp_count = OMAP2430_MCBSP_PDATA_SZ; - omap_mcbsp_cache_size = OMAP2430_MCBSP_REG_NUM * sizeof(u32); - } else if (cpu_is_omap34xx()) { - omap_mcbsp_count = OMAP34XX_MCBSP_PDATA_SZ; - omap_mcbsp_cache_size = OMAP34XX_MCBSP_REG_NUM * sizeof(u32); - } else if (cpu_is_omap44xx()) { - omap_mcbsp_count = OMAP44XX_MCBSP_PDATA_SZ; - omap_mcbsp_cache_size = OMAP44XX_MCBSP_REG_NUM * sizeof(u32); - } + if (cpu_is_omap2420()) + omap_mcbsp_count = OMAP2420_MCBSP_COUNT; + else if (cpu_is_omap2430()) + omap_mcbsp_count = OMAP2430_MCBSP_COUNT; + else if (cpu_is_omap34xx()) + omap_mcbsp_count = OMAP34XX_MCBSP_COUNT; + else if (cpu_is_omap44xx()) + omap_mcbsp_count = OMAP44XX_MCBSP_COUNT; mcbsp_ptr = kzalloc(omap_mcbsp_count * sizeof(struct omap_mcbsp *), GFP_KERNEL); @@ -279,17 +648,25 @@ static int __init omap2_mcbsp_init(void) return -ENOMEM; if (cpu_is_omap2420()) - omap_mcbsp_register_board_cfg(omap2420_mcbsp_pdata, - OMAP2420_MCBSP_PDATA_SZ); + omap_mcbsp_register_board_cfg(omap2420_mcbsp_res[0], + OMAP2420_MCBSP_RES_SZ, + omap2420_mcbsp_pdata, + OMAP2420_MCBSP_COUNT); if (cpu_is_omap2430()) - omap_mcbsp_register_board_cfg(omap2430_mcbsp_pdata, - OMAP2430_MCBSP_PDATA_SZ); + omap_mcbsp_register_board_cfg(omap2430_mcbsp_res[0], + OMAP2420_MCBSP_RES_SZ, + omap2430_mcbsp_pdata, + OMAP2430_MCBSP_COUNT); if (cpu_is_omap34xx()) - omap_mcbsp_register_board_cfg(omap34xx_mcbsp_pdata, - OMAP34XX_MCBSP_PDATA_SZ); + omap_mcbsp_register_board_cfg(omap34xx_mcbsp_res[0], + OMAP34XX_MCBSP_RES_SZ, + omap34xx_mcbsp_pdata, + OMAP34XX_MCBSP_COUNT); if (cpu_is_omap44xx()) - omap_mcbsp_register_board_cfg(omap44xx_mcbsp_pdata, - OMAP44XX_MCBSP_PDATA_SZ); + omap_mcbsp_register_board_cfg(omap44xx_mcbsp_res[0], + OMAP44XX_MCBSP_RES_SZ, + omap44xx_mcbsp_pdata, + OMAP44XX_MCBSP_COUNT); return omap_mcbsp_init(); } diff --git a/arch/arm/plat-omap/devices.c b/arch/arm/plat-omap/devices.c index 10245b837c1..7d9f815cede 100644 --- a/arch/arm/plat-omap/devices.c +++ b/arch/arm/plat-omap/devices.c @@ -35,8 +35,8 @@ static struct platform_device **omap_mcbsp_devices; -void omap_mcbsp_register_board_cfg(struct omap_mcbsp_platform_data *config, - int size) +void omap_mcbsp_register_board_cfg(struct resource *res, int res_count, + struct omap_mcbsp_platform_data *config, int size) { int i; @@ -54,6 +54,8 @@ void omap_mcbsp_register_board_cfg(struct omap_mcbsp_platform_data *config, new_mcbsp = platform_device_alloc("omap-mcbsp", i + 1); if (!new_mcbsp) continue; + platform_device_add_resources(new_mcbsp, &res[i * res_count], + res_count); new_mcbsp->dev.platform_data = &config[i]; ret = platform_device_add(new_mcbsp); if (ret) { @@ -65,8 +67,8 @@ void omap_mcbsp_register_board_cfg(struct omap_mcbsp_platform_data *config, } #else -void omap_mcbsp_register_board_cfg(struct omap_mcbsp_platform_data *config, - int size) +void omap_mcbsp_register_board_cfg(struct resource *res, int res_count, + struct omap_mcbsp_platform_data *config, int size) { } #endif diff --git a/arch/arm/plat-omap/include/plat/mcbsp.h b/arch/arm/plat-omap/include/plat/mcbsp.h index 6ecf1051e5f..dc1a28299ae 100644 --- a/arch/arm/plat-omap/include/plat/mcbsp.h +++ b/arch/arm/plat-omap/include/plat/mcbsp.h @@ -63,9 +63,12 @@ static struct platform_device omap_mcbsp##port_nr = { \ #define OMAP34XX_MCBSP4_BASE 0x49026000 #define OMAP34XX_MCBSP5_BASE 0x48096000 -#define OMAP44XX_MCBSP1_BASE 0x49022000 -#define OMAP44XX_MCBSP2_BASE 0x49024000 -#define OMAP44XX_MCBSP3_BASE 0x49026000 +#define OMAP44XX_MCBSP1_BASE 0x40122000 +#define OMAP44XX_MCBSP1_DMA_BASE 0x49022000 +#define OMAP44XX_MCBSP2_BASE 0x40124000 +#define OMAP44XX_MCBSP2_DMA_BASE 0x49024000 +#define OMAP44XX_MCBSP3_BASE 0x40126000 +#define OMAP44XX_MCBSP3_DMA_BASE 0x49026000 #define OMAP44XX_MCBSP4_BASE 0x48096000 #if defined(CONFIG_ARCH_OMAP15XX) || defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850) @@ -431,6 +434,7 @@ struct omap_mcbsp_st_data { struct omap_mcbsp { struct device *dev; unsigned long phys_base; + unsigned long phys_dma_base; void __iomem *io_base; u8 id; u8 free; @@ -474,8 +478,8 @@ extern int omap_mcbsp_count, omap_mcbsp_cache_size; #define id_to_mcbsp_ptr(id) mcbsp_ptr[id]; int omap_mcbsp_init(void); -void omap_mcbsp_register_board_cfg(struct omap_mcbsp_platform_data *config, - int size); +void omap_mcbsp_register_board_cfg(struct resource *res, int res_count, + struct omap_mcbsp_platform_data *config, int size); void omap_mcbsp_config(unsigned int id, const struct omap_mcbsp_reg_cfg * config); #ifdef CONFIG_ARCH_OMAP3 void omap_mcbsp_set_tx_threshold(unsigned int id, u16 threshold); diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c index b5a6e178a7f..5f25ae5f9c1 100644 --- a/arch/arm/plat-omap/mcbsp.c +++ b/arch/arm/plat-omap/mcbsp.c @@ -1649,7 +1649,8 @@ static const struct attribute_group sidetone_attr_group = { static int __devinit omap_st_add(struct omap_mcbsp *mcbsp) { - struct omap_mcbsp_platform_data *pdata = mcbsp->pdata; + struct platform_device *pdev; + struct resource *res; struct omap_mcbsp_st_data *st_data; int err; @@ -1659,7 +1660,10 @@ static int __devinit omap_st_add(struct omap_mcbsp *mcbsp) goto err1; } - st_data->io_base_st = ioremap(pdata->phys_base_st, SZ_4K); + pdev = container_of(mcbsp->dev, struct platform_device, dev); + + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "sidetone"); + st_data->io_base_st = ioremap(res->start, resource_size(res)); if (!st_data->io_base_st) { err = -ENOMEM; goto err2; @@ -1748,6 +1752,7 @@ static int __devinit omap_mcbsp_probe(struct platform_device *pdev) struct omap_mcbsp_platform_data *pdata = pdev->dev.platform_data; struct omap_mcbsp *mcbsp; int id = pdev->id - 1; + struct resource *res; int ret = 0; if (!pdata) { @@ -1777,25 +1782,59 @@ static int __devinit omap_mcbsp_probe(struct platform_device *pdev) mcbsp->dma_tx_lch = -1; mcbsp->dma_rx_lch = -1; - mcbsp->phys_base = pdata->phys_base; - mcbsp->io_base = ioremap(pdata->phys_base, SZ_4K); + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mpu"); + if (!res) { + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!res) { + dev_err(&pdev->dev, "%s:mcbsp%d has invalid memory" + "resource\n", __func__, pdev->id); + ret = -ENOMEM; + goto exit; + } + } + mcbsp->phys_base = res->start; + omap_mcbsp_cache_size = resource_size(res); + mcbsp->io_base = ioremap(res->start, resource_size(res)); if (!mcbsp->io_base) { ret = -ENOMEM; goto err_ioremap; } + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dma"); + if (!res) + mcbsp->phys_dma_base = mcbsp->phys_base; + else + mcbsp->phys_dma_base = res->start; + /* Default I/O is IRQ based */ mcbsp->io_type = OMAP_MCBSP_IRQ_IO; - mcbsp->tx_irq = pdata->tx_irq; - mcbsp->rx_irq = pdata->rx_irq; - mcbsp->dma_rx_sync = pdata->dma_rx_sync; - mcbsp->dma_tx_sync = pdata->dma_tx_sync; + + mcbsp->tx_irq = platform_get_irq_byname(pdev, "tx"); + mcbsp->rx_irq = platform_get_irq_byname(pdev, "rx"); + + res = platform_get_resource_byname(pdev, IORESOURCE_DMA, "rx"); + if (!res) { + dev_err(&pdev->dev, "%s:mcbsp%d has invalid rx DMA channel\n", + __func__, pdev->id); + ret = -ENODEV; + goto err_res; + } + mcbsp->dma_rx_sync = res->start; + + res = platform_get_resource_byname(pdev, IORESOURCE_DMA, "tx"); + if (!res) { + dev_err(&pdev->dev, "%s:mcbsp%d has invalid tx DMA channel\n", + __func__, pdev->id); + ret = -ENODEV; + goto err_res; + } + mcbsp->dma_tx_sync = res->start; mcbsp->iclk = clk_get(&pdev->dev, "ick"); if (IS_ERR(mcbsp->iclk)) { ret = PTR_ERR(mcbsp->iclk); dev_err(&pdev->dev, "unable to get ick: %d\n", ret); - goto err_iclk; + goto err_res; } mcbsp->fclk = clk_get(&pdev->dev, "fck"); @@ -1817,7 +1856,7 @@ static int __devinit omap_mcbsp_probe(struct platform_device *pdev) err_fclk: clk_put(mcbsp->iclk); -err_iclk: +err_res: iounmap(mcbsp->io_base); err_ioremap: kfree(mcbsp); -- cgit v1.2.3 From 64bcbd33c7c70d0aea4e614212a2568321a0396b Mon Sep 17 00:00:00 2001 From: Kishon Vijay Abraham I Date: Thu, 24 Feb 2011 15:16:52 +0530 Subject: OMAP2+: McBSP: hwmod adaptation for McBSP Modify OMAP2+ McBSP to use omap hwmod framework APIs Signed-off-by: Kishon Vijay Abraham I Signed-off-by: Charulatha V Signed-off-by: Shubhrajyoti D Acked-by: Peter Ujfalusi Acked-by: Jarkko Nikula Acked-by: Mark Brown Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/mcbsp.c | 595 +++----------------------------- arch/arm/plat-omap/include/plat/mcbsp.h | 2 +- 2 files changed, 46 insertions(+), 551 deletions(-) (limited to 'arch/arm/mach-omap2/mcbsp.c') diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c index 765ebe7da72..275d6cfa0b2 100644 --- a/arch/arm/mach-omap2/mcbsp.c +++ b/arch/arm/mach-omap2/mcbsp.c @@ -22,10 +22,10 @@ #include #include #include +#include #include "control.h" - /* McBSP internal signal muxing functions */ void omap2_mcbsp1_mux_clkr_src(u8 mux) @@ -101,573 +101,68 @@ int omap2_mcbsp_set_clks_src(u8 id, u8 fck_src_id) } EXPORT_SYMBOL(omap2_mcbsp_set_clks_src); - -/* Platform data */ - -#ifdef CONFIG_SOC_OMAP2420 -struct resource omap2420_mcbsp_res[][6] = { +struct omap_device_pm_latency omap2_mcbsp_latency[] = { { - { - .start = OMAP24XX_MCBSP1_BASE, - .end = OMAP24XX_MCBSP1_BASE + SZ_256, - .flags = IORESOURCE_MEM, - }, - { - .name = "rx", - .start = INT_24XX_MCBSP1_IRQ_RX, - .flags = IORESOURCE_IRQ, - }, - { - .name = "tx", - .start = INT_24XX_MCBSP1_IRQ_TX, - .flags = IORESOURCE_IRQ, - }, - { - .name = "rx", - .start = OMAP24XX_DMA_MCBSP1_RX, - .flags = IORESOURCE_DMA, - }, - { - .name = "tx", - .start = OMAP24XX_DMA_MCBSP1_TX, - .flags = IORESOURCE_DMA, - }, - }, - { - { - .start = OMAP24XX_MCBSP2_BASE, - .end = OMAP24XX_MCBSP2_BASE + SZ_256, - .flags = IORESOURCE_MEM, - }, - { - .name = "rx", - .start = INT_24XX_MCBSP2_IRQ_RX, - .flags = IORESOURCE_IRQ, - }, - { - .name = "tx", - .start = INT_24XX_MCBSP2_IRQ_TX, - .flags = IORESOURCE_IRQ, - }, - { - .name = "rx", - .start = OMAP24XX_DMA_MCBSP2_RX, - .flags = IORESOURCE_DMA, - }, - { - .name = "tx", - .start = OMAP24XX_DMA_MCBSP2_TX, - .flags = IORESOURCE_DMA, - }, + .deactivate_func = omap_device_idle_hwmods, + .activate_func = omap_device_enable_hwmods, + .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST, }, }; -#define OMAP2420_MCBSP_RES_SZ ARRAY_SIZE(omap2420_mcbsp_res[1]) -#define OMAP2420_MCBSP_COUNT ARRAY_SIZE(omap2420_mcbsp_res) -#else -#define omap2420_mcbsp_res NULL -#define OMAP2420_MCBSP_RES_SZ 0 -#define OMAP2420_MCBSP_COUNT 0 -#endif -#define omap2420_mcbsp_pdata NULL +static int omap_init_mcbsp(struct omap_hwmod *oh, void *unused) +{ + int id, count = 1; + char *name = "omap-mcbsp"; + struct omap_hwmod *oh_device[2]; + struct omap_mcbsp_platform_data *pdata = NULL; + struct omap_device *od; -#ifdef CONFIG_SOC_OMAP2430 -struct resource omap2430_mcbsp_res[][6] = { - { - { - .start = OMAP24XX_MCBSP1_BASE, - .end = OMAP24XX_MCBSP1_BASE + SZ_256, - .flags = IORESOURCE_MEM, - }, - { - .name = "rx", - .start = INT_24XX_MCBSP1_IRQ_RX, - .flags = IORESOURCE_IRQ, - }, - { - .name = "tx", - .start = INT_24XX_MCBSP1_IRQ_TX, - .flags = IORESOURCE_IRQ, - }, - { - .name = "rx", - .start = OMAP24XX_DMA_MCBSP1_RX, - .flags = IORESOURCE_DMA, - }, - { - .name = "tx", - .start = OMAP24XX_DMA_MCBSP1_TX, - .flags = IORESOURCE_DMA, - }, - }, - { - { - .start = OMAP24XX_MCBSP2_BASE, - .end = OMAP24XX_MCBSP2_BASE + SZ_256, - .flags = IORESOURCE_MEM, - }, - { - .name = "rx", - .start = INT_24XX_MCBSP2_IRQ_RX, - .flags = IORESOURCE_IRQ, - }, - { - .name = "tx", - .start = INT_24XX_MCBSP2_IRQ_TX, - .flags = IORESOURCE_IRQ, - }, - { - .name = "rx", - .start = OMAP24XX_DMA_MCBSP2_RX, - .flags = IORESOURCE_DMA, - }, - { - .name = "tx", - .start = OMAP24XX_DMA_MCBSP2_TX, - .flags = IORESOURCE_DMA, - }, - }, - { - { - .start = OMAP2430_MCBSP3_BASE, - .end = OMAP2430_MCBSP3_BASE + SZ_256, - .flags = IORESOURCE_MEM, - }, - { - .name = "rx", - .start = INT_24XX_MCBSP3_IRQ_RX, - .flags = IORESOURCE_IRQ, - }, - { - .name = "tx", - .start = INT_24XX_MCBSP3_IRQ_TX, - .flags = IORESOURCE_IRQ, - }, - { - .name = "rx", - .start = OMAP24XX_DMA_MCBSP3_RX, - .flags = IORESOURCE_DMA, - }, - { - .name = "tx", - .start = OMAP24XX_DMA_MCBSP3_TX, - .flags = IORESOURCE_DMA, - }, - }, - { - { - .start = OMAP2430_MCBSP4_BASE, - .end = OMAP2430_MCBSP4_BASE + SZ_256, - .flags = IORESOURCE_MEM, - }, - { - .name = "rx", - .start = INT_24XX_MCBSP4_IRQ_RX, - .flags = IORESOURCE_IRQ, - }, - { - .name = "tx", - .start = INT_24XX_MCBSP4_IRQ_TX, - .flags = IORESOURCE_IRQ, - }, - { - .name = "rx", - .start = OMAP24XX_DMA_MCBSP4_RX, - .flags = IORESOURCE_DMA, - }, - { - .name = "tx", - .start = OMAP24XX_DMA_MCBSP4_TX, - .flags = IORESOURCE_DMA, - }, - }, - { - { - .start = OMAP2430_MCBSP5_BASE, - .end = OMAP2430_MCBSP5_BASE + SZ_256, - .flags = IORESOURCE_MEM, - }, - { - .name = "rx", - .start = INT_24XX_MCBSP5_IRQ_RX, - .flags = IORESOURCE_IRQ, - }, - { - .name = "tx", - .start = INT_24XX_MCBSP5_IRQ_TX, - .flags = IORESOURCE_IRQ, - }, - { - .name = "rx", - .start = OMAP24XX_DMA_MCBSP5_RX, - .flags = IORESOURCE_DMA, - }, - { - .name = "tx", - .start = OMAP24XX_DMA_MCBSP5_TX, - .flags = IORESOURCE_DMA, - }, - }, -}; -#define OMAP2430_MCBSP_RES_SZ ARRAY_SIZE(omap2430_mcbsp_res[1]) -#define OMAP2430_MCBSP_COUNT ARRAY_SIZE(omap2430_mcbsp_res) -#else -#define omap2430_mcbsp_res NULL -#define OMAP2430_MCBSP_RES_SZ 0 -#define OMAP2430_MCBSP_COUNT 0 -#endif + sscanf(oh->name, "mcbsp%d", &id); -#define omap2430_mcbsp_pdata NULL + pdata = kzalloc(sizeof(struct omap_mcbsp_platform_data), GFP_KERNEL); + if (!pdata) { + pr_err("%s: No memory for mcbsp\n", __func__); + return -ENOMEM; + } -#ifdef CONFIG_ARCH_OMAP3 -struct resource omap34xx_mcbsp_res[][7] = { - { - { - .start = OMAP34XX_MCBSP1_BASE, - .end = OMAP34XX_MCBSP1_BASE + SZ_256, - .flags = IORESOURCE_MEM, - }, - { - .name = "rx", - .start = INT_24XX_MCBSP1_IRQ_RX, - .flags = IORESOURCE_IRQ, - }, - { - .name = "tx", - .start = INT_24XX_MCBSP1_IRQ_TX, - .flags = IORESOURCE_IRQ, - }, - { - .name = "rx", - .start = OMAP24XX_DMA_MCBSP1_RX, - .flags = IORESOURCE_DMA, - }, - { - .name = "tx", - .start = OMAP24XX_DMA_MCBSP1_TX, - .flags = IORESOURCE_DMA, - }, - }, - { - { - .start = OMAP34XX_MCBSP2_BASE, - .end = OMAP34XX_MCBSP2_BASE + SZ_256, - .flags = IORESOURCE_MEM, - }, - { - .name = "sidetone", - .start = OMAP34XX_MCBSP2_ST_BASE, - .end = OMAP34XX_MCBSP2_ST_BASE + SZ_256, - .flags = IORESOURCE_MEM, - }, - { - .name = "rx", - .start = INT_24XX_MCBSP2_IRQ_RX, - .flags = IORESOURCE_IRQ, - }, - { - .name = "tx", - .start = INT_24XX_MCBSP2_IRQ_TX, - .flags = IORESOURCE_IRQ, - }, - { - .name = "rx", - .start = OMAP24XX_DMA_MCBSP2_RX, - .flags = IORESOURCE_DMA, - }, - { - .name = "tx", - .start = OMAP24XX_DMA_MCBSP2_TX, - .flags = IORESOURCE_DMA, - }, - }, - { - { - .start = OMAP34XX_MCBSP3_BASE, - .end = OMAP34XX_MCBSP3_BASE + SZ_256, - .flags = IORESOURCE_MEM, - }, - { - .name = "sidetone", - .start = OMAP34XX_MCBSP3_ST_BASE, - .end = OMAP34XX_MCBSP3_ST_BASE + SZ_256, - .flags = IORESOURCE_MEM, - }, - { - .name = "rx", - .start = INT_24XX_MCBSP3_IRQ_RX, - .flags = IORESOURCE_IRQ, - }, - { - .name = "tx", - .start = INT_24XX_MCBSP3_IRQ_TX, - .flags = IORESOURCE_IRQ, - }, - { - .name = "rx", - .start = OMAP24XX_DMA_MCBSP3_RX, - .flags = IORESOURCE_DMA, - }, - { - .name = "tx", - .start = OMAP24XX_DMA_MCBSP3_TX, - .flags = IORESOURCE_DMA, - }, - }, - { - { - .start = OMAP34XX_MCBSP4_BASE, - .end = OMAP34XX_MCBSP4_BASE + SZ_256, - .flags = IORESOURCE_MEM, - }, - { - .name = "rx", - .start = INT_24XX_MCBSP4_IRQ_RX, - .flags = IORESOURCE_IRQ, - }, - { - .name = "tx", - .start = INT_24XX_MCBSP4_IRQ_TX, - .flags = IORESOURCE_IRQ, - }, - { - .name = "rx", - .start = OMAP24XX_DMA_MCBSP4_RX, - .flags = IORESOURCE_DMA, - }, - { - .name = "tx", - .start = OMAP24XX_DMA_MCBSP4_TX, - .flags = IORESOURCE_DMA, - }, - }, - { - { - .start = OMAP34XX_MCBSP5_BASE, - .end = OMAP34XX_MCBSP5_BASE + SZ_256, - .flags = IORESOURCE_MEM, - }, - { - .name = "rx", - .start = INT_24XX_MCBSP5_IRQ_RX, - .flags = IORESOURCE_IRQ, - }, - { - .name = "tx", - .start = INT_24XX_MCBSP5_IRQ_TX, - .flags = IORESOURCE_IRQ, - }, - { - .name = "rx", - .start = OMAP24XX_DMA_MCBSP5_RX, - .flags = IORESOURCE_DMA, - }, - { - .name = "tx", - .start = OMAP24XX_DMA_MCBSP5_TX, - .flags = IORESOURCE_DMA, - }, - }, -}; + if (oh->class->rev == MCBSP_CONFIG_TYPE3) { + if (id == 2) + /* The FIFO has 1024 + 256 locations */ + pdata->buffer_size = 0x500; + else + /* The FIFO has 128 locations */ + pdata->buffer_size = 0x80; + } -static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = { - { - .buffer_size = 0x80, /* The FIFO has 128 locations */ - }, - { - .buffer_size = 0x500, /* The FIFO has 1024 + 256 locations */ - }, - { - .buffer_size = 0x80, /* The FIFO has 128 locations */ - }, - { - .buffer_size = 0x80, /* The FIFO has 128 locations */ - }, - { - .buffer_size = 0x80, /* The FIFO has 128 locations */ - }, -}; -#define OMAP34XX_MCBSP_RES_SZ ARRAY_SIZE(omap34xx_mcbsp_res[1]) -#define OMAP34XX_MCBSP_COUNT ARRAY_SIZE(omap34xx_mcbsp_res) -#else -#define omap34xx_mcbsp_pdata NULL -#define omap34XX_mcbsp_res NULL -#define OMAP34XX_MCBSP_RES_SZ 0 -#define OMAP34XX_MCBSP_COUNT 0 -#endif + oh_device[0] = oh; -struct resource omap44xx_mcbsp_res[][6] = { - { - { - .name = "mpu", - .start = OMAP44XX_MCBSP1_BASE, - .end = OMAP44XX_MCBSP1_BASE + SZ_256, - .flags = IORESOURCE_MEM, - }, - { - .name = "dma", - .start = OMAP44XX_MCBSP1_DMA_BASE, - .end = OMAP44XX_MCBSP1_DMA_BASE + SZ_256, - .flags = IORESOURCE_MEM, - }, - { - .name = "rx", - .start = 0, - .flags = IORESOURCE_IRQ, - }, - { - .name = "tx", - .start = OMAP44XX_IRQ_MCBSP1, - .flags = IORESOURCE_IRQ, - }, - { - .name = "rx", - .start = OMAP44XX_DMA_MCBSP1_RX, - .flags = IORESOURCE_DMA, - }, - { - .name = "tx", - .start = OMAP44XX_DMA_MCBSP1_TX, - .flags = IORESOURCE_DMA, - }, - }, - { - { - .name = "mpu", - .start = OMAP44XX_MCBSP2_BASE, - .end = OMAP44XX_MCBSP2_BASE + SZ_256, - .flags = IORESOURCE_MEM, - }, - { - .name = "dma", - .start = OMAP44XX_MCBSP2_DMA_BASE, - .end = OMAP44XX_MCBSP2_DMA_BASE + SZ_256, - .flags = IORESOURCE_MEM, - }, - { - .name = "rx", - .start = 0, - .flags = IORESOURCE_IRQ, - }, - { - .name = "tx", - .start = OMAP44XX_IRQ_MCBSP2, - .flags = IORESOURCE_IRQ, - }, - { - .name = "rx", - .start = OMAP44XX_DMA_MCBSP2_RX, - .flags = IORESOURCE_DMA, - }, - { - .name = "tx", - .start = OMAP44XX_DMA_MCBSP2_TX, - .flags = IORESOURCE_DMA, - }, - }, - { - { - .name = "mpu", - .start = OMAP44XX_MCBSP3_BASE, - .end = OMAP44XX_MCBSP3_BASE + SZ_256, - .flags = IORESOURCE_MEM, - }, - { - .name = "dma", - .start = OMAP44XX_MCBSP3_DMA_BASE, - .end = OMAP44XX_MCBSP3_DMA_BASE + SZ_256, - .flags = IORESOURCE_MEM, - }, - { - .name = "rx", - .start = 0, - .flags = IORESOURCE_IRQ, - }, - { - .name = "tx", - .start = OMAP44XX_IRQ_MCBSP3, - .flags = IORESOURCE_IRQ, - }, - { - .name = "rx", - .start = OMAP44XX_DMA_MCBSP3_RX, - .flags = IORESOURCE_DMA, - }, - { - .name = "tx", - .start = OMAP44XX_DMA_MCBSP3_TX, - .flags = IORESOURCE_DMA, - }, - }, - { - { - .start = OMAP44XX_MCBSP4_BASE, - .end = OMAP44XX_MCBSP4_BASE + SZ_256, - .flags = IORESOURCE_MEM, - }, - { - .name = "rx", - .start = 0, - .flags = IORESOURCE_IRQ, - }, - { - .name = "tx", - .start = OMAP44XX_IRQ_MCBSP4, - .flags = IORESOURCE_IRQ, - }, - { - .name = "rx", - .start = OMAP44XX_DMA_MCBSP4_RX, - .flags = IORESOURCE_DMA, - }, - { - .name = "tx", - .start = OMAP44XX_DMA_MCBSP4_TX, - .flags = IORESOURCE_DMA, - }, - }, -}; -#define omap44xx_mcbsp_pdata NULL -#define OMAP44XX_MCBSP_RES_SZ ARRAY_SIZE(omap44xx_mcbsp_res[1]) -#define OMAP44XX_MCBSP_COUNT ARRAY_SIZE(omap44xx_mcbsp_res) + if (oh->dev_attr) { + oh_device[1] = omap_hwmod_lookup(( + (struct omap_mcbsp_dev_attr *)(oh->dev_attr))->sidetone); + count++; + } + od = omap_device_build_ss(name, id, oh_device, count, pdata, + sizeof(*pdata), omap2_mcbsp_latency, + ARRAY_SIZE(omap2_mcbsp_latency), false); + kfree(pdata); + if (IS_ERR(od)) { + pr_err("%s: Cant build omap_device for %s:%s.\n", __func__, + name, oh->name); + return PTR_ERR(od); + } + omap_mcbsp_count++; + return 0; +} static int __init omap2_mcbsp_init(void) { - if (cpu_is_omap2420()) - omap_mcbsp_count = OMAP2420_MCBSP_COUNT; - else if (cpu_is_omap2430()) - omap_mcbsp_count = OMAP2430_MCBSP_COUNT; - else if (cpu_is_omap34xx()) - omap_mcbsp_count = OMAP34XX_MCBSP_COUNT; - else if (cpu_is_omap44xx()) - omap_mcbsp_count = OMAP44XX_MCBSP_COUNT; + omap_hwmod_for_each_by_class("mcbsp", omap_init_mcbsp, NULL); mcbsp_ptr = kzalloc(omap_mcbsp_count * sizeof(struct omap_mcbsp *), GFP_KERNEL); if (!mcbsp_ptr) return -ENOMEM; - if (cpu_is_omap2420()) - omap_mcbsp_register_board_cfg(omap2420_mcbsp_res[0], - OMAP2420_MCBSP_RES_SZ, - omap2420_mcbsp_pdata, - OMAP2420_MCBSP_COUNT); - if (cpu_is_omap2430()) - omap_mcbsp_register_board_cfg(omap2430_mcbsp_res[0], - OMAP2420_MCBSP_RES_SZ, - omap2430_mcbsp_pdata, - OMAP2430_MCBSP_COUNT); - if (cpu_is_omap34xx()) - omap_mcbsp_register_board_cfg(omap34xx_mcbsp_res[0], - OMAP34XX_MCBSP_RES_SZ, - omap34xx_mcbsp_pdata, - OMAP34XX_MCBSP_COUNT); - if (cpu_is_omap44xx()) - omap_mcbsp_register_board_cfg(omap44xx_mcbsp_res[0], - OMAP44XX_MCBSP_RES_SZ, - omap44xx_mcbsp_pdata, - OMAP44XX_MCBSP_COUNT); - return omap_mcbsp_init(); } arch_initcall(omap2_mcbsp_init); diff --git a/arch/arm/plat-omap/include/plat/mcbsp.h b/arch/arm/plat-omap/include/plat/mcbsp.h index 1fe06372c9c..c6cabfc77a1 100644 --- a/arch/arm/plat-omap/include/plat/mcbsp.h +++ b/arch/arm/plat-omap/include/plat/mcbsp.h @@ -421,8 +421,8 @@ struct omap_mcbsp_platform_data { #ifdef CONFIG_ARCH_OMAP3 /* Sidetone block for McBSP 2 and 3 */ unsigned long phys_base_st; - u16 buffer_size; #endif + u16 buffer_size; }; struct omap_mcbsp_st_data { -- cgit v1.2.3 From e95496d4acadd0b72c4947be61e8d44700fdaae7 Mon Sep 17 00:00:00 2001 From: Kishon Vijay Abraham I Date: Thu, 24 Feb 2011 15:16:54 +0530 Subject: OMAP: McBSP: Add pm runtime support Add pm runtime support for McBSP driver. Reference to fclk is not removed because it is required when the functional clock is switched from one source to another. Signed-off-by: Kishon Vijay Abraham I Cc: Paul Walmsley Acked-by: Peter Ujfalusi Acked-by: Jarkko Nikula Acked-by: Mark Brown Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/mcbsp.c | 5 +++-- arch/arm/plat-omap/include/plat/mcbsp.h | 1 - arch/arm/plat-omap/mcbsp.c | 23 ++++++----------------- 3 files changed, 9 insertions(+), 20 deletions(-) (limited to 'arch/arm/mach-omap2/mcbsp.c') diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c index 275d6cfa0b2..4ada6a9ca4a 100644 --- a/arch/arm/mach-omap2/mcbsp.c +++ b/arch/arm/mach-omap2/mcbsp.c @@ -23,6 +23,7 @@ #include #include #include +#include #include "control.h" @@ -83,7 +84,7 @@ int omap2_mcbsp_set_clks_src(u8 id, u8 fck_src_id) return -EINVAL; } - clk_disable(mcbsp->fclk); + pm_runtime_put_sync(mcbsp->dev); r = clk_set_parent(mcbsp->fclk, fck_src); if (IS_ERR_VALUE(r)) { @@ -93,7 +94,7 @@ int omap2_mcbsp_set_clks_src(u8 id, u8 fck_src_id) return -EINVAL; } - clk_enable(mcbsp->fclk); + pm_runtime_get_sync(mcbsp->dev); clk_put(fck_src); diff --git a/arch/arm/plat-omap/include/plat/mcbsp.h b/arch/arm/plat-omap/include/plat/mcbsp.h index c6cabfc77a1..964a940c475 100644 --- a/arch/arm/plat-omap/include/plat/mcbsp.h +++ b/arch/arm/plat-omap/include/plat/mcbsp.h @@ -465,7 +465,6 @@ struct omap_mcbsp { /* Protect the field .free, while checking if the mcbsp is in use */ spinlock_t lock; struct omap_mcbsp_platform_data *pdata; - struct clk *iclk; struct clk *fclk; #ifdef CONFIG_ARCH_OMAP3 struct omap_mcbsp_st_data *st_data; diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c index 67ec74ea253..6d230164b4f 100644 --- a/arch/arm/plat-omap/mcbsp.c +++ b/arch/arm/plat-omap/mcbsp.c @@ -28,6 +28,7 @@ #include #include #include +#include /* XXX These "sideways" includes are a sign that something is wrong */ #include "../mach-omap2/cm2xxx_3xxx.h" @@ -757,8 +758,7 @@ int omap_mcbsp_request(unsigned int id) if (mcbsp->pdata && mcbsp->pdata->ops && mcbsp->pdata->ops->request) mcbsp->pdata->ops->request(id); - clk_enable(mcbsp->iclk); - clk_enable(mcbsp->fclk); + pm_runtime_get_sync(mcbsp->dev); /* Do procedure specific to omap34xx arch, if applicable */ omap34xx_mcbsp_request(mcbsp); @@ -806,8 +806,7 @@ err_clk_disable: /* Do procedure specific to omap34xx arch, if applicable */ omap34xx_mcbsp_free(mcbsp); - clk_disable(mcbsp->fclk); - clk_disable(mcbsp->iclk); + pm_runtime_put_sync(mcbsp->dev); spin_lock(&mcbsp->lock); mcbsp->free = true; @@ -837,8 +836,7 @@ void omap_mcbsp_free(unsigned int id) /* Do procedure specific to omap34xx arch, if applicable */ omap34xx_mcbsp_free(mcbsp); - clk_disable(mcbsp->fclk); - clk_disable(mcbsp->iclk); + pm_runtime_put_sync(mcbsp->dev); if (mcbsp->io_type == OMAP_MCBSP_IRQ_IO) { /* Free IRQs */ @@ -1827,32 +1825,24 @@ static int __devinit omap_mcbsp_probe(struct platform_device *pdev) } mcbsp->dma_tx_sync = res->start; - mcbsp->iclk = clk_get(&pdev->dev, "ick"); - if (IS_ERR(mcbsp->iclk)) { - ret = PTR_ERR(mcbsp->iclk); - dev_err(&pdev->dev, "unable to get ick: %d\n", ret); - goto err_res; - } - mcbsp->fclk = clk_get(&pdev->dev, "fck"); if (IS_ERR(mcbsp->fclk)) { ret = PTR_ERR(mcbsp->fclk); dev_err(&pdev->dev, "unable to get fck: %d\n", ret); - goto err_fclk; + goto err_res; } mcbsp->pdata = pdata; mcbsp->dev = &pdev->dev; mcbsp_ptr[id] = mcbsp; platform_set_drvdata(pdev, mcbsp); + pm_runtime_enable(mcbsp->dev); /* Initialize mcbsp properties for OMAP34XX if needed / applicable */ omap34xx_device_init(mcbsp); return 0; -err_fclk: - clk_put(mcbsp->iclk); err_res: iounmap(mcbsp->io_base); err_ioremap: @@ -1875,7 +1865,6 @@ static int __devexit omap_mcbsp_remove(struct platform_device *pdev) omap34xx_device_exit(mcbsp); clk_put(mcbsp->fclk); - clk_put(mcbsp->iclk); iounmap(mcbsp->io_base); kfree(mcbsp); -- cgit v1.2.3 From 9504ba64f014cfd50a64106e49c8ba729522db5b Mon Sep 17 00:00:00 2001 From: Kishon Vijay Abraham I Date: Thu, 24 Feb 2011 15:16:55 +0530 Subject: OMAP: McBSP: APIs to pass DMA params from McBSP driver to client drivers After McBSP driver is hwmod adapted, the information about the hw would be obtained from the hwmod database by the mcbsp driver. Since DMA programming is handled by the client driver, APIs are provided to pass the DMA channel number and base address of data register required by the client driver for DMA programming. Signed-off-by: Kishon Vijay Abraham I Signed-off-by: Charulatha V Acked-by: Peter Ujfalusi Acked-by: Jarkko Nikula Acked-by: Mark Brown Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/mcbsp.c | 2 ++ arch/arm/plat-omap/include/plat/mcbsp.h | 7 ++++ arch/arm/plat-omap/mcbsp.c | 64 +++++++++++++++++++++++++++++++++ 3 files changed, 73 insertions(+) (limited to 'arch/arm/mach-omap2/mcbsp.c') diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c index 4ada6a9ca4a..565b9064a32 100644 --- a/arch/arm/mach-omap2/mcbsp.c +++ b/arch/arm/mach-omap2/mcbsp.c @@ -126,6 +126,8 @@ static int omap_init_mcbsp(struct omap_hwmod *oh, void *unused) return -ENOMEM; } + pdata->mcbsp_config_type = oh->class->rev; + if (oh->class->rev == MCBSP_CONFIG_TYPE3) { if (id == 2) /* The FIFO has 1024 + 256 locations */ diff --git a/arch/arm/plat-omap/include/plat/mcbsp.h b/arch/arm/plat-omap/include/plat/mcbsp.h index 964a940c475..21c9b104c61 100644 --- a/arch/arm/plat-omap/include/plat/mcbsp.h +++ b/arch/arm/plat-omap/include/plat/mcbsp.h @@ -81,6 +81,8 @@ static struct platform_device omap_mcbsp##port_nr = { \ #define OMAP_MCBSP_REG_DRR1 0x02 #define OMAP_MCBSP_REG_DXR2 0x04 #define OMAP_MCBSP_REG_DXR1 0x06 +#define OMAP_MCBSP_REG_DRR 0x02 +#define OMAP_MCBSP_REG_DXR 0x06 #define OMAP_MCBSP_REG_SPCR2 0x08 #define OMAP_MCBSP_REG_SPCR1 0x0a #define OMAP_MCBSP_REG_RCR2 0x0c @@ -423,6 +425,7 @@ struct omap_mcbsp_platform_data { unsigned long phys_base_st; #endif u16 buffer_size; + unsigned int mcbsp_config_type; }; struct omap_mcbsp_st_data { @@ -473,6 +476,7 @@ struct omap_mcbsp { u16 max_rx_thres; #endif void *reg_cache; + unsigned int mcbsp_config_type; }; /** @@ -541,6 +545,9 @@ int omap_mcbsp_set_io_type(unsigned int id, omap_mcbsp_io_type_t io_type); void omap2_mcbsp1_mux_clkr_src(u8 mux); void omap2_mcbsp1_mux_fsr_src(u8 mux); +int omap_mcbsp_dma_ch_params(unsigned int id, unsigned int stream); +int omap_mcbsp_dma_reg_params(unsigned int id, unsigned int stream); + #ifdef CONFIG_ARCH_OMAP3 /* Sidetone specific API */ int omap_st_set_chgain(unsigned int id, int channel, s16 chgain); diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c index 6d230164b4f..d598d9fd65a 100644 --- a/arch/arm/plat-omap/mcbsp.c +++ b/arch/arm/plat-omap/mcbsp.c @@ -229,6 +229,69 @@ void omap_mcbsp_config(unsigned int id, const struct omap_mcbsp_reg_cfg *config) } EXPORT_SYMBOL(omap_mcbsp_config); +/** + * omap_mcbsp_dma_params - returns the dma channel number + * @id - mcbsp id + * @stream - indicates the direction of data flow (rx or tx) + * + * Returns the dma channel number for the rx channel or tx channel + * based on the value of @stream for the requested mcbsp given by @id + */ +int omap_mcbsp_dma_ch_params(unsigned int id, unsigned int stream) +{ + struct omap_mcbsp *mcbsp; + + if (!omap_mcbsp_check_valid_id(id)) { + printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); + return -ENODEV; + } + mcbsp = id_to_mcbsp_ptr(id); + + if (stream) + return mcbsp->dma_rx_sync; + else + return mcbsp->dma_tx_sync; +} +EXPORT_SYMBOL(omap_mcbsp_dma_ch_params); + +/** + * omap_mcbsp_dma_reg_params - returns the address of mcbsp data register + * @id - mcbsp id + * @stream - indicates the direction of data flow (rx or tx) + * + * Returns the address of mcbsp data transmit register or data receive register + * to be used by DMA for transferring/receiving data based on the value of + * @stream for the requested mcbsp given by @id + */ +int omap_mcbsp_dma_reg_params(unsigned int id, unsigned int stream) +{ + struct omap_mcbsp *mcbsp; + int data_reg; + + if (!omap_mcbsp_check_valid_id(id)) { + printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); + return -ENODEV; + } + mcbsp = id_to_mcbsp_ptr(id); + + data_reg = mcbsp->phys_dma_base; + + if (mcbsp->mcbsp_config_type < MCBSP_CONFIG_TYPE2) { + if (stream) + data_reg += OMAP_MCBSP_REG_DRR1; + else + data_reg += OMAP_MCBSP_REG_DXR1; + } else { + if (stream) + data_reg += OMAP_MCBSP_REG_DRR; + else + data_reg += OMAP_MCBSP_REG_DXR; + } + + return data_reg; +} +EXPORT_SYMBOL(omap_mcbsp_dma_reg_params); + #ifdef CONFIG_ARCH_OMAP3 static struct omap_device *find_omap_device_by_dev(struct device *dev) { @@ -1835,6 +1898,7 @@ static int __devinit omap_mcbsp_probe(struct platform_device *pdev) mcbsp->pdata = pdata; mcbsp->dev = &pdev->dev; mcbsp_ptr[id] = mcbsp; + mcbsp->mcbsp_config_type = pdata->mcbsp_config_type; platform_set_drvdata(pdev, mcbsp); pm_runtime_enable(mcbsp->dev); -- cgit v1.2.3