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authorWolfgang Denk <wd@pollux.denx.de>2006-03-13 00:50:48 +0100
committerWolfgang Denk <wd@pollux.denx.de>2006-03-13 00:50:48 +0100
commitc15f80eaefa7ece72272e6f441f0ed36eab14411 (patch)
tree6e422368dda72ce81f7ce582e9f664d2b1db3359
parentb38dbd4622a2abeedf9fcb1806958d9afac0bbd4 (diff)
Change the sequence of events in soft_i2c.c:send_ack() to keep from
incorrectly generating start/stop conditions on the bus. Patch by Andrew Dyer, 26 Jul 2005
-rw-r--r--CHANGELOG4
-rw-r--r--common/soft_i2c.c5
2 files changed, 5 insertions, 4 deletions
diff --git a/CHANGELOG b/CHANGELOG
index ac984168d..889cfd5e9 100644
--- a/CHANGELOG
+++ b/CHANGELOG
@@ -2,6 +2,10 @@
Changes since U-Boot 1.1.4:
======================================================================
+* Change the sequence of events in soft_i2c.c:send_ack() to keep from
+ incorrectly generating start/stop conditions on the bus.
+ Patch by Andrew Dyer, 26 Jul 2005
+
* Fix bug in [id]cache_status commands for MPC85xx processors;
should look at LSB of L1CSRn registers to determine if L1 cache is
enabled, not the MSB.
diff --git a/common/soft_i2c.c b/common/soft_i2c.c
index 48e3d3e1c..b3642dafc 100644
--- a/common/soft_i2c.c
+++ b/common/soft_i2c.c
@@ -164,13 +164,10 @@ static void send_ack(int ack)
volatile immap_t *immr = (immap_t *)CFG_IMMR;
#endif
- I2C_ACTIVE;
I2C_SCL(0);
I2C_DELAY;
-
- I2C_SDA(ack);
-
I2C_ACTIVE;
+ I2C_SDA(ack);
I2C_DELAY;
I2C_SCL(1);
I2C_DELAY;