diff options
| author | Yuri Tikhonov <yur@pollux.denx.de> | 2008-02-04 14:10:42 +0100 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2008-03-18 22:24:47 +0100 |
| commit | 8f15d4addd49c956412e1e3bfc764a0c8b1f3184 (patch) | |
| tree | 1afb797e9a9524930805a9e7450ea6d4c00db7ac /board/lwmon5 | |
| parent | c2ed33efbfff5767bca236828e021c55fd547b6c (diff) | |
The patch adds new POST tests for the Lwmon5 board. These are:
* External Watchdog test;
* dsPIC tests;
* FPGA test;
* GDC test;
* Sysmon tests.
Signed-off-by: Dmitry Rakhchev <rda@emcraft.com>
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
Diffstat (limited to 'board/lwmon5')
| -rw-r--r-- | board/lwmon5/lwmon5.c | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/board/lwmon5/lwmon5.c b/board/lwmon5/lwmon5.c index 815c01f4e..73d5de588 100644 --- a/board/lwmon5/lwmon5.c +++ b/board/lwmon5/lwmon5.c @@ -96,6 +96,25 @@ int board_early_init_f(void) gpio_write_bit(CFG_GPIO_FLASH_WP, 1); +#if CONFIG_POST & CFG_POST_BSPEC1 + gpio_write_bit(CFG_GPIO_HIGHSIDE, 1); + + reg = 0; /* reuse as counter */ + out_be32((void *)CFG_DSPIC_TEST_ADDR, + in_be32((void *)CFG_DSPIC_TEST_ADDR) + & ~CFG_DSPIC_TEST_MASK); + while (!gpio_read_in_bit(CFG_GPIO_DSPIC_READY) && reg++ < 1000) { + udelay(1000); + } + gpio_write_bit(CFG_GPIO_HIGHSIDE, 0); + if (gpio_read_in_bit(CFG_GPIO_DSPIC_READY)) { + /* set "boot error" flag */ + out_be32((void *)CFG_DSPIC_TEST_ADDR, + in_be32((void *)CFG_DSPIC_TEST_ADDR) | + CFG_DSPIC_TEST_MASK); + } +#endif + /* * Reset PHY's: * The PHY's need a 2nd reset pulse, since the MDIO address is latched |