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authorTsiChung Liew <Tsi-Chung.Liew@freescale.com>2008-07-23 20:38:53 -0500
committerJohn Rigby <jrigby@freescale.com>2008-08-14 12:31:55 -0600
commit9f751551456828b2d0ff417f10959fb0c7110bd0 (patch)
tree9400ee01bbef8c6d3dde6249bda85e6fc8405c4f /cpu/mcf5445x/cpu_init.c
parenta7323bba229203aae2604afde131ab47bad4eadc (diff)
ColdFire: Implement SBF feature for M5445EVB
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
Diffstat (limited to 'cpu/mcf5445x/cpu_init.c')
-rw-r--r--cpu/mcf5445x/cpu_init.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/cpu/mcf5445x/cpu_init.c b/cpu/mcf5445x/cpu_init.c
index e07748bd8..51a9e9037 100644
--- a/cpu/mcf5445x/cpu_init.c
+++ b/cpu/mcf5445x/cpu_init.c
@@ -61,11 +61,13 @@ void cpu_init_f(void)
GPIO_PAR_FBCTL_OE | GPIO_PAR_FBCTL_TA_TA | GPIO_PAR_FBCTL_RW_RW |
GPIO_PAR_FBCTL_TS_TS;
+#if !defined(CONFIG_CF_SBF)
#if (defined(CFG_CS0_BASE) && defined(CFG_CS0_MASK) && defined(CFG_CS0_CTRL))
fbcs->csar0 = CFG_CS0_BASE;
fbcs->cscr0 = CFG_CS0_CTRL;
fbcs->csmr0 = CFG_CS0_MASK;
#endif
+#endif
#if (defined(CFG_CS1_BASE) && defined(CFG_CS1_MASK) && defined(CFG_CS1_CTRL))
/* Latch chipselect */