Big white-space cleanup.

This commit gets rid of a huge amount of silly white-space issues.
Especially, all sequences of SPACEs followed by TAB characters get
removed (unless they appear in print statements).

Also remove all embedded "vim:" and "vi:" statements which hide
indentation problems.

Signed-off-by: Wolfgang Denk <wd@denx.de>

4 files changed, 136 insertions, 136 deletions

diff --git a/cpu/mips/asc_serial.c b/cpu/mips/asc_serial.c
index d95ec3fd2..3498b61e8 100644
--- a/cpu/mips/asc_serial.c
+++ b/cpu/mips/asc_serial.c
@@ -34,10 +34,10 @@
 
 /* Interrupt status register bits */
 #define FBS_ISR_AT	0x00000040	/* ASC transmit interrupt */
-#define FBS_ISR_AR 	0x00000020	/* ASC receive interrupt */
+#define FBS_ISR_AR	0x00000020	/* ASC receive interrupt */
 #define FBS_ISR_AE	0x00000010	/* ASC error interrupt */
 #define FBS_ISR_AB	0x00000008	/* ASC transmit buffer interrupt */
-#define FBS_ISR_AS      0x00000004 	/* ASC start of autobaud detection interrupt */
+#define FBS_ISR_AS      0x00000004	/* ASC start of autobaud detection interrupt */
 #define FBS_ISR_AF	0x00000002	/* ASC end of autobaud detection interrupt */
 
 #else
diff --git a/cpu/mips/au1x00_usb_ohci.h b/cpu/mips/au1x00_usb_ohci.h
index 4ef06ffde..a606d459c 100644
--- a/cpu/mips/au1x00_usb_ohci.h
+++ b/cpu/mips/au1x00_usb_ohci.h
@@ -11,31 +11,31 @@
 static int cc_to_error[16] = {
 
 /* mapping of the OHCI CC status to error codes */
-	/* No  Error  */               0,
-	/* CRC Error  */               USB_ST_CRC_ERR,
-	/* Bit Stuff  */               USB_ST_BIT_ERR,
-	/* Data Togg  */               USB_ST_CRC_ERR,
-	/* Stall      */               USB_ST_STALLED,
-	/* DevNotResp */               -1,
-	/* PIDCheck   */               USB_ST_BIT_ERR,
-	/* UnExpPID   */               USB_ST_BIT_ERR,
-	/* DataOver   */               USB_ST_BUF_ERR,
-	/* DataUnder  */               USB_ST_BUF_ERR,
-	/* reservd    */               -1,
-	/* reservd    */               -1,
-	/* BufferOver */               USB_ST_BUF_ERR,
-	/* BuffUnder  */               USB_ST_BUF_ERR,
-	/* Not Access */               -1,
-	/* Not Access */               -1
+	/* No  Error  */	0,
+	/* CRC Error  */	USB_ST_CRC_ERR,
+	/* Bit Stuff  */	USB_ST_BIT_ERR,
+	/* Data Togg  */	USB_ST_CRC_ERR,
+	/* Stall      */	USB_ST_STALLED,
+	/* DevNotResp */	-1,
+	/* PIDCheck   */	USB_ST_BIT_ERR,
+	/* UnExpPID   */	USB_ST_BIT_ERR,
+	/* DataOver   */	USB_ST_BUF_ERR,
+	/* DataUnder  */	USB_ST_BUF_ERR,
+	/* reservd    */	-1,
+	/* reservd    */	-1,
+	/* BufferOver */	USB_ST_BUF_ERR,
+	/* BuffUnder  */	USB_ST_BUF_ERR,
+	/* Not Access */	-1,
+	/* Not Access */	-1
 };
 
 /* ED States */
 
-#define ED_NEW 		0x00
-#define ED_UNLINK 	0x01
+#define ED_NEW		0x00
+#define ED_UNLINK	0x01
 #define ED_OPER		0x02
 #define ED_DEL		0x04
-#define ED_URB_DEL  	0x08
+#define ED_URB_DEL	0x08
 
 /* usb_ohci_ed */
 struct ed {
@@ -61,54 +61,54 @@ typedef struct ed ed_t;
 
 
 /* TD info field */
-#define TD_CC       0xf0000000
-#define TD_CC_GET(td_p) ((td_p >>28) & 0x0f)
-#define TD_CC_SET(td_p, cc) (td_p) = ((td_p) & 0x0fffffff) | (((cc) & 0x0f) << 28)
-#define TD_EC       0x0C000000
-#define TD_T        0x03000000
-#define TD_T_DATA0  0x02000000
-#define TD_T_DATA1  0x03000000
-#define TD_T_TOGGLE 0x00000000
-#define TD_R        0x00040000
-#define TD_DI       0x00E00000
-#define TD_DI_SET(X) (((X) & 0x07)<< 21)
-#define TD_DP       0x00180000
-#define TD_DP_SETUP 0x00000000
-#define TD_DP_IN    0x00100000
-#define TD_DP_OUT   0x00080000
-
-#define TD_ISO	    0x00010000
-#define TD_DEL      0x00020000
+#define TD_CC			0xf0000000
+#define TD_CC_GET(td_p)		((td_p >>28) & 0x0f)
+#define TD_CC_SET(td_p, cc)	(td_p) = ((td_p) & 0x0fffffff) | (((cc) & 0x0f) << 28)
+#define TD_EC			0x0C000000
+#define TD_T			0x03000000
+#define TD_T_DATA0		0x02000000
+#define TD_T_DATA1		0x03000000
+#define TD_T_TOGGLE		0x00000000
+#define TD_R			0x00040000
+#define TD_DI			0x00E00000
+#define TD_DI_SET(X)		(((X) & 0x07)<< 21)
+#define TD_DP			0x00180000
+#define TD_DP_SETUP		0x00000000
+#define TD_DP_IN		0x00100000
+#define TD_DP_OUT		0x00080000
+
+#define TD_ISO			0x00010000
+#define TD_DEL			0x00020000
 
 /* CC Codes */
-#define TD_CC_NOERROR      0x00
-#define TD_CC_CRC          0x01
-#define TD_CC_BITSTUFFING  0x02
-#define TD_CC_DATATOGGLEM  0x03
-#define TD_CC_STALL        0x04
-#define TD_DEVNOTRESP      0x05
-#define TD_PIDCHECKFAIL    0x06
-#define TD_UNEXPECTEDPID   0x07
-#define TD_DATAOVERRUN     0x08
-#define TD_DATAUNDERRUN    0x09
-#define TD_BUFFEROVERRUN   0x0C
-#define TD_BUFFERUNDERRUN  0x0D
-#define TD_NOTACCESSED     0x0F
+#define TD_CC_NOERROR		0x00
+#define TD_CC_CRC		0x01
+#define TD_CC_BITSTUFFING	0x02
+#define TD_CC_DATATOGGLEM	0x03
+#define TD_CC_STALL		0x04
+#define TD_DEVNOTRESP		0x05
+#define TD_PIDCHECKFAIL	0x06
+#define TD_UNEXPECTEDPID	0x07
+#define TD_DATAOVERRUN		0x08
+#define TD_DATAUNDERRUN	0x09
+#define TD_BUFFEROVERRUN	0x0C
+#define TD_BUFFERUNDERRUN	0x0D
+#define TD_NOTACCESSED		0x0F
 
 
 #define MAXPSW 1
 
 struct td {
 	__u32 hwINFO;
-  	__u32 hwCBP;		/* Current Buffer Pointer */
-  	__u32 hwNextTD;		/* Next TD Pointer */
-  	__u32 hwBE;		/* Memory Buffer End Pointer */
-
-  	__u16 hwPSW[MAXPSW];
-  	__u8 unused;
-  	__u8 index;
-  	struct ed *ed;
-  	struct td *next_dl_td;
+	__u32 hwCBP;		/* Current Buffer Pointer */
+	__u32 hwNextTD;		/* Next TD Pointer */
+	__u32 hwBE;		/* Memory Buffer End Pointer */
+
+	__u16 hwPSW[MAXPSW];
+	__u8 unused;
+	__u8 index;
+	struct ed *ed;
+	struct td *next_dl_td;
 	struct usb_device *usb_dev;
 	int transfer_len;
 	__u32 data;
@@ -142,7 +142,7 @@ struct ohci_hcca {
 
 /*
  * This is the structure of the OHCI controller's memory mapped I/O
- * region.  This is Memory Mapped I/O.  You must use the readl() and
+ * region.  This is Memory Mapped I/O.	You must use the readl() and
  * writel() macros defined in asm/io.h to access these!!
  */
 struct ohci_regs {
@@ -202,10 +202,10 @@ struct ohci_regs {
  * HcCommandStatus (cmdstatus) register masks
  */
 #define OHCI_HCR	(1 << 0)	/* host controller reset */
-#define OHCI_CLF  	(1 << 1)	/* control list filled */
-#define OHCI_BLF  	(1 << 2)	/* bulk list filled */
-#define OHCI_OCR  	(1 << 3)	/* ownership change request */
-#define OHCI_SOC  	(3 << 16)	/* scheduling overrun count */
+#define OHCI_CLF	(1 << 1)	/* control list filled */
+#define OHCI_BLF	(1 << 2)	/* bulk list filled */
+#define OHCI_OCR	(1 << 3)	/* ownership change request */
+#define OHCI_SOC	(3 << 16)	/* scheduling overrun count */
 
 /*
  * masks used with interrupt registers:
@@ -236,101 +236,101 @@ struct virt_root_hub {
 /* USB HUB CONSTANTS (not OHCI-specific; see hub.h) */
 
 /* destination of request */
-#define RH_INTERFACE               0x01
-#define RH_ENDPOINT                0x02
-#define RH_OTHER                   0x03
+#define RH_INTERFACE		0x01
+#define RH_ENDPOINT		0x02
+#define RH_OTHER		0x03
 
-#define RH_CLASS                   0x20
-#define RH_VENDOR                  0x40
+#define RH_CLASS		0x20
+#define RH_VENDOR		0x40
 
 /* Requests: bRequest << 8 | bmRequestType */
-#define RH_GET_STATUS           0x0080
-#define RH_CLEAR_FEATURE        0x0100
-#define RH_SET_FEATURE          0x0300
+#define RH_GET_STATUS		0x0080
+#define RH_CLEAR_FEATURE	0x0100
+#define RH_SET_FEATURE		0x0300
 #define RH_SET_ADDRESS		0x0500
 #define RH_GET_DESCRIPTOR	0x0680
-#define RH_SET_DESCRIPTOR       0x0700
+#define RH_SET_DESCRIPTOR	0x0700
 #define RH_GET_CONFIGURATION	0x0880
 #define RH_SET_CONFIGURATION	0x0900
-#define RH_GET_STATE            0x0280
-#define RH_GET_INTERFACE        0x0A80
-#define RH_SET_INTERFACE        0x0B00
-#define RH_SYNC_FRAME           0x0C80
+#define RH_GET_STATE		0x0280
+#define RH_GET_INTERFACE	0x0A80
+#define RH_SET_INTERFACE	0x0B00
+#define RH_SYNC_FRAME		0x0C80
 /* Our Vendor Specific Request */
-#define RH_SET_EP               0x2000
+#define RH_SET_EP		0x2000
 
 
 /* Hub port features */
-#define RH_PORT_CONNECTION         0x00
-#define RH_PORT_ENABLE             0x01
-#define RH_PORT_SUSPEND            0x02
-#define RH_PORT_OVER_CURRENT       0x03
-#define RH_PORT_RESET              0x04
-#define RH_PORT_POWER              0x08
-#define RH_PORT_LOW_SPEED          0x09
-
-#define RH_C_PORT_CONNECTION       0x10
-#define RH_C_PORT_ENABLE           0x11
-#define RH_C_PORT_SUSPEND          0x12
-#define RH_C_PORT_OVER_CURRENT     0x13
-#define RH_C_PORT_RESET            0x14
+#define RH_PORT_CONNECTION	0x00
+#define RH_PORT_ENABLE		0x01
+#define RH_PORT_SUSPEND		0x02
+#define RH_PORT_OVER_CURRENT	0x03
+#define RH_PORT_RESET		0x04
+#define RH_PORT_POWER		0x08
+#define RH_PORT_LOW_SPEED	0x09
+
+#define RH_C_PORT_CONNECTION	0x10
+#define RH_C_PORT_ENABLE	0x11
+#define RH_C_PORT_SUSPEND	0x12
+#define RH_C_PORT_OVER_CURRENT	0x13
+#define RH_C_PORT_RESET		0x14
 
 /* Hub features */
-#define RH_C_HUB_LOCAL_POWER       0x00
-#define RH_C_HUB_OVER_CURRENT      0x01
+#define RH_C_HUB_LOCAL_POWER	0x00
+#define RH_C_HUB_OVER_CURRENT	0x01
 
-#define RH_DEVICE_REMOTE_WAKEUP    0x00
-#define RH_ENDPOINT_STALL          0x01
+#define RH_DEVICE_REMOTE_WAKEUP 0x00
+#define RH_ENDPOINT_STALL	0x01
 
-#define RH_ACK                     0x01
-#define RH_REQ_ERR                 -1
-#define RH_NACK                    0x00
+#define RH_ACK			0x01
+#define RH_REQ_ERR		-1
+#define RH_NACK			   0x00
 
 
 /* OHCI ROOT HUB REGISTER MASKS */
 
 /* roothub.portstatus [i] bits */
-#define RH_PS_CCS            0x00000001   	/* current connect status */
-#define RH_PS_PES            0x00000002   	/* port enable status*/
-#define RH_PS_PSS            0x00000004   	/* port suspend status */
-#define RH_PS_POCI           0x00000008   	/* port over current indicator */
-#define RH_PS_PRS            0x00000010  	/* port reset status */
-#define RH_PS_PPS            0x00000100   	/* port power status */
-#define RH_PS_LSDA           0x00000200    	/* low speed device attached */
-#define RH_PS_CSC            0x00010000 	/* connect status change */
-#define RH_PS_PESC           0x00020000   	/* port enable status change */
-#define RH_PS_PSSC           0x00040000    	/* port suspend status change */
-#define RH_PS_OCIC           0x00080000    	/* over current indicator change */
-#define RH_PS_PRSC           0x00100000   	/* port reset status change */
+#define RH_PS_CCS		0x00000001	/* current connect status */
+#define RH_PS_PES		0x00000002	/* port enable status*/
+#define RH_PS_PSS		0x00000004	/* port suspend status */
+#define RH_PS_POCI		0x00000008	/* port over current indicator */
+#define RH_PS_PRS		0x00000010	/* port reset status */
+#define RH_PS_PPS		0x00000100	/* port power status */
+#define RH_PS_LSDA		0x00000200	/* low speed device attached */
+#define RH_PS_CSC		0x00010000	/* connect status change */
+#define RH_PS_PESC		0x00020000	/* port enable status change */
+#define RH_PS_PSSC		0x00040000	/* port suspend status change */
+#define RH_PS_OCIC		0x00080000	/* over current indicator change */
+#define RH_PS_PRSC		0x00100000	/* port reset status change */
 
 /* roothub.status bits */
-#define RH_HS_LPS	     0x00000001		/* local power status */
-#define RH_HS_OCI	     0x00000002		/* over current indicator */
-#define RH_HS_DRWE	     0x00008000		/* device remote wakeup enable */
-#define RH_HS_LPSC	     0x00010000		/* local power status change */
-#define RH_HS_OCIC	     0x00020000		/* over current indicator change */
-#define RH_HS_CRWE	     0x80000000		/* clear remote wakeup enable */
+#define RH_HS_LPS		0x00000001	/* local power status */
+#define RH_HS_OCI		0x00000002	/* over current indicator */
+#define RH_HS_DRWE		0x00008000	/* device remote wakeup enable */
+#define RH_HS_LPSC		0x00010000	/* local power status change */
+#define RH_HS_OCIC		0x00020000	/* over current indicator change */
+#define RH_HS_CRWE		0x80000000	/* clear remote wakeup enable */
 
 /* roothub.b masks */
-#define RH_B_DR		0x0000ffff		/* device removable flags */
-#define RH_B_PPCM	0xffff0000		/* port power control mask */
+#define RH_B_DR			0x0000ffff	/* device removable flags */
+#define RH_B_PPCM		0xffff0000	/* port power control mask */
 
 /* roothub.a masks */
-#define	RH_A_NDP	(0xff << 0)		/* number of downstream ports */
-#define	RH_A_PSM	(1 << 8)		/* power switching mode */
-#define	RH_A_NPS	(1 << 9)		/* no power switching */
-#define	RH_A_DT		(1 << 10)		/* device type (mbz) */
-#define	RH_A_OCPM	(1 << 11)		/* over current protection mode */
-#define	RH_A_NOCP	(1 << 12)		/* no over current protection */
-#define	RH_A_POTPGT	(0xff << 24)		/* power on to power good time */
+#define	RH_A_NDP		(0xff << 0)	/* number of downstream ports */
+#define	RH_A_PSM		(1 << 8)	/* power switching mode */
+#define	RH_A_NPS		(1 << 9)	/* no power switching */
+#define	RH_A_DT			(1 << 10)	/* device type (mbz) */
+#define	RH_A_OCPM		(1 << 11)	/* over current protection mode */
+#define	RH_A_NOCP		(1 << 12)	/* no over current protection */
+#define	RH_A_POTPGT		(0xff << 24)	/* power on to power good time */
 
 /* urb */
 #define N_URB_TD 48
 typedef struct
 {
 	ed_t *ed;
-	__u16 length;	/* number of tds associated with this request */
-	__u16 td_cnt;	/* number of tds already serviced */
+	__u16 length;		/* number of tds associated with this request */
+	__u16 td_cnt;		/* number of tds already serviced */
 	int   state;
 	unsigned long pipe;
 	int actual_length;
@@ -355,11 +355,11 @@ typedef struct ohci {
 	int sleeping;
 	unsigned long flags;		/* for HC bugs */
 
-	struct ohci_regs *regs;	/* OHCI controller's memory */
+	struct ohci_regs *regs;		/* OHCI controller's memory */
 
-	ed_t *ed_rm_list[2];     /* lists of all endpoints to be removed */
-	ed_t *ed_bulktail;       /* last endpoint of bulk list */
-	ed_t *ed_controltail;    /* last endpoint of control list */
+	ed_t *ed_rm_list[2];		/* lists of all endpoints to be removed */
+	ed_t *ed_bulktail;		/* last endpoint of bulk list */
+	ed_t *ed_controltail;		/* last endpoint of control list */
 	int intrstatus;
 	__u32 hc_control;		/* copy of the hc control reg */
 	struct usb_device *dev[32];
@@ -371,7 +371,7 @@ typedef struct ohci {
 #define NUM_EDS 8		/* num of preallocated endpoint descriptors */
 
 struct ohci_device {
-	ed_t 	ed[NUM_EDS];
+	ed_t	ed[NUM_EDS];
 	int ed_cnt;
 };
 
diff --git a/cpu/mips/incaip_wdt.S b/cpu/mips/incaip_wdt.S
index 2ebcc9113..329386bd3 100644
--- a/cpu/mips/incaip_wdt.S
+++ b/cpu/mips/incaip_wdt.S
@@ -51,7 +51,7 @@ disable_incaip_wdt:
 	and	t3, 0xFFFFFF01
 
 	or	t3, t2
-	or 	t3, 0xF0
+	or	t3, 0xF0
 
 	sw	t3, WD_CON0(t0)		/* write password */
 
diff --git a/cpu/mips/start.S b/cpu/mips/start.S
index 947128dd8..d881879d7 100644
--- a/cpu/mips/start.S
+++ b/cpu/mips/start.S
@@ -345,7 +345,7 @@ relocate_code:
 	jr	t0
 	nop
 
-	.word 	_gp
+	.word	_gp
 	.word	_GLOBAL_OFFSET_TABLE_
 	.word	uboot_end_data
 	.word	uboot_end