diff options
| author | Jon Loeliger <jdl@freescale.com> | 2008-03-19 15:02:07 -0500 |
|---|---|---|
| committer | Andrew Fleming-AFLEMING <afleming@freescale.com> | 2008-03-26 11:43:04 -0500 |
| commit | 25eedb2c1958a13110c7de1fc809b624053cc69c (patch) | |
| tree | a1548c4de9a5c5bd50320ec8731a7a174b69149e /include | |
| parent | a5af4b358a7caa9c0aa374d4d894bf762ec37669 (diff) | |
FSL: Clean up board/freescale/common/Makefile
Each file that can be built here now follows some
CONFIG_ option so that they are appropriately built
or not, as needed. And CONFIG_ defines were added
to various board config files to make sure that happens.
The other board/freescale/*/Makefiles no longer need
to reach up and over into ../common to build their
individually needed files any more.
Boards that are CDS specific were renamed with cds_ prefix.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Diffstat (limited to 'include')
| -rw-r--r-- | include/configs/MPC8541CDS.h | 5 | ||||
| -rw-r--r-- | include/configs/MPC8548CDS.h | 5 | ||||
| -rw-r--r-- | include/configs/MPC8555CDS.h | 5 |
3 files changed, 15 insertions, 0 deletions
diff --git a/include/configs/MPC8541CDS.h b/include/configs/MPC8541CDS.h index f1a86e691..3f3f741ad 100644 --- a/include/configs/MPC8541CDS.h +++ b/include/configs/MPC8541CDS.h @@ -49,6 +49,9 @@ #define CONFIG_FSL_LAW 1 /* Use common FSL init code */ +#define CONFIG_FSL_VIA +#define CONFIG_FSL_CDS_EEPROM + /* * When initializing flash, if we cannot find the manufacturer ID, * assume this is the AMD flash associated with the CDS board. @@ -274,6 +277,8 @@ extern unsigned long get_clock_freq(void); * 1111 1111 1111 0000 0000 1111 1111 0111 = fff00ff7 */ +#define CONFIG_FSL_CADMUS + #define CADMUS_BASE_ADDR 0xf8000000 #define CFG_BR3_PRELIM 0xf8000801 #define CFG_OR3_PRELIM 0xfff00ff7 diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h index 2d44df454..fc8ad8813 100644 --- a/include/configs/MPC8548CDS.h +++ b/include/configs/MPC8548CDS.h @@ -57,6 +57,9 @@ #define CONFIG_FSL_LAW 1 /* Use common FSL init code */ +#define CONFIG_FSL_VIA +#define CONFIG_FSL_CDS_EEPROM + /* * When initializing flash, if we cannot find the manufacturer ID, * assume this is the AMD flash associated with the CDS board. @@ -297,6 +300,8 @@ extern unsigned long get_clock_freq(void); * 1111 1111 1111 0000 0000 1111 1111 0111 = fff00ff7 */ +#define CONFIG_FSL_CADMUS + #define CADMUS_BASE_ADDR 0xf8000000 #define CFG_BR3_PRELIM 0xf8000801 #define CFG_OR3_PRELIM 0xfff00ff7 diff --git a/include/configs/MPC8555CDS.h b/include/configs/MPC8555CDS.h index fa0f7b354..500b57cec 100644 --- a/include/configs/MPC8555CDS.h +++ b/include/configs/MPC8555CDS.h @@ -49,6 +49,9 @@ #define CONFIG_FSL_LAW 1 /* Use common FSL init code */ +#define CONFIG_FSL_VIA +#define CONFIG_FSL_CDS_EEPROM + /* * When initializing flash, if we cannot find the manufacturer ID, * assume this is the AMD flash associated with the CDS board. @@ -274,6 +277,8 @@ extern unsigned long get_clock_freq(void); * 1111 1111 1111 0000 0000 1111 1111 0111 = fff00ff7 */ +#define CONFIG_FSL_CADMUS + #define CADMUS_BASE_ADDR 0xf8000000 #define CFG_BR3_PRELIM 0xf8000801 #define CFG_OR3_PRELIM 0xfff00ff7 |