Merge branch 'master' of git://git.denx.de/u-boot-mpc83xx

4 files changed, 46 insertions, 2 deletions

diff --git a/include/configs/MPC8349ITX.h b/include/configs/MPC8349ITX.h
index 14cbc4571..5e1ddaedd 100644
--- a/include/configs/MPC8349ITX.h
+++ b/include/configs/MPC8349ITX.h
@@ -78,6 +78,7 @@
 #ifdef CONFIG_MPC8349ITX
 #define CONFIG_COMPACT_FLASH	/* The CF card interface on the back of the board */
 #define CONFIG_VSC7385_ENET	/* VSC7385 ethernet support */
+#define CONFIG_SATA_SIL3114	/* SIL3114 SATA controller */
 #endif
 
 #define CONFIG_PCI
@@ -141,7 +142,16 @@
 
 #define ATA_RESET_TIME	1	/* If a CF card is not inserted, time out quickly */
 
-#define CONFIG_DOS_PARTITION
+#endif
+
+/*
+ * SATA
+ */
+#ifdef CONFIG_SATA_SIL3114
+
+#define CONFIG_SYS_SATA_MAX_DEVICE      4
+#define CONFIG_LIBATA
+#define CONFIG_LBA48
 
 #endif
 
@@ -449,9 +459,18 @@ boards, we say we have two, but don't display a message if we find only one. */
 #define CONFIG_CMD_PING
 #define CONFIG_CMD_SDRAM
 
+#if defined(CONFIG_COMPACT_FLASH) || defined(CONFIG_SATA_SIL3114)
+    #define CONFIG_DOS_PARTITION
+    #define CONFIG_CMD_FAT
+#endif
+
 #ifdef CONFIG_COMPACT_FLASH
     #define CONFIG_CMD_IDE
-    #define CONFIG_CMD_FAT
+#endif
+
+#ifdef CONFIG_SATA_SIL3114
+    #define CONFIG_CMD_SATA
+    #define CONFIG_CMD_EXT2
 #endif
 
 #ifdef CONFIG_PCI
diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h
index 2e31dd00a..8d0c93b71 100644
--- a/include/configs/MPC837XERDB.h
+++ b/include/configs/MPC837XERDB.h
@@ -49,6 +49,7 @@
 #else
 #define CONFIG_83XX_CLKIN	66666667 /* in Hz */
 #define CONFIG_83XX_GENERIC_PCI	1
+#define CONFIG_83XX_GENERIC_PCIE	1
 #endif
 
 #ifndef CONFIG_SYS_CLK_FREQ
@@ -375,6 +376,26 @@
 #define CONFIG_SYS_PCI_SLV_MEM_BUS	0x00000000
 #define CONFIG_SYS_PCI_SLV_MEM_SIZE	0x80000000
 
+#define CONFIG_SYS_PCIE1_BASE		0xA0000000
+#define CONFIG_SYS_PCIE1_CFG_BASE	0xA0000000
+#define CONFIG_SYS_PCIE1_CFG_SIZE	0x08000000
+#define CONFIG_SYS_PCIE1_MEM_BASE	0xA8000000
+#define CONFIG_SYS_PCIE1_MEM_PHYS	0xA8000000
+#define CONFIG_SYS_PCIE1_MEM_SIZE	0x10000000
+#define CONFIG_SYS_PCIE1_IO_BASE	0x00000000
+#define CONFIG_SYS_PCIE1_IO_PHYS	0xB8000000
+#define CONFIG_SYS_PCIE1_IO_SIZE	0x00800000
+
+#define CONFIG_SYS_PCIE2_BASE		0xC0000000
+#define CONFIG_SYS_PCIE2_CFG_BASE	0xC0000000
+#define CONFIG_SYS_PCIE2_CFG_SIZE	0x08000000
+#define CONFIG_SYS_PCIE2_MEM_BASE	0xC8000000
+#define CONFIG_SYS_PCIE2_MEM_PHYS	0xC8000000
+#define CONFIG_SYS_PCIE2_MEM_SIZE	0x10000000
+#define CONFIG_SYS_PCIE2_IO_BASE	0x00000000
+#define CONFIG_SYS_PCIE2_IO_PHYS	0xD8000000
+#define CONFIG_SYS_PCIE2_IO_SIZE	0x00800000
+
 #ifdef CONFIG_PCI
 #define CONFIG_NET_MULTI
 #define CONFIG_PCI_PNP		/* do pci plug-and-play */
diff --git a/include/mpc83xx.h b/include/mpc83xx.h
index 3554fdd4e..fab37516c 100644
--- a/include/mpc83xx.h
+++ b/include/mpc83xx.h
@@ -890,6 +890,8 @@
 #define TIMING_CFG1_CASLAT_30		0x00050000	/* CAS latency = 3.0 */
 #define TIMING_CFG1_CASLAT_35		0x00060000	/* CAS latency = 3.5 */
 #define TIMING_CFG1_CASLAT_40		0x00070000	/* CAS latency = 4.0 */
+#define TIMING_CFG1_CASLAT_45		0x00080000	/* CAS latency = 4.5 */
+#define TIMING_CFG1_CASLAT_50		0x00090000	/* CAS latency = 5.0 */
 
 /* TIMING_CFG_2 - DDR SDRAM Timing Configuration 2
  */
diff --git a/include/pci.h b/include/pci.h
index d0594e316..aaa455434 100644
--- a/include/pci.h
+++ b/include/pci.h
@@ -535,6 +535,8 @@ extern int pci_hose_config_device(struct pci_controller *hose,
 				  pci_addr_t mem,
 				  unsigned long command);
 
+int pci_last_busno(void);
+
 #ifdef CONFIG_MPC824X
 extern void pci_mpc824x_init (struct pci_controller *hose);
 #endif