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authorStefan Roese <sr@denx.de>2007-06-19 16:42:31 +0200
committerStefan Roese <sr@denx.de>2007-06-19 16:42:31 +0200
commitdf8a24cdd30151505cf57bbee5289e91bf53bd1b (patch)
treeff5305f90f000aead5a0cbf3a8e3501ea6102021 /nand_spl/board/amcc/acadia/config.mk
parent86ba99e34194394052d24c04dc40d1263d29a26f (diff)
[ppc4xx] Fix problem with NAND booting on AMCC Acadia
The latest changes showed a problem with the location of the NAND-SPL image in the OCM and the init-data area (incl. cache). This patch fixes this problem. Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'nand_spl/board/amcc/acadia/config.mk')
-rw-r--r--nand_spl/board/amcc/acadia/config.mk4
1 files changed, 2 insertions, 2 deletions
diff --git a/nand_spl/board/amcc/acadia/config.mk b/nand_spl/board/amcc/acadia/config.mk
index 55069b4df..3b140fa7e 100644
--- a/nand_spl/board/amcc/acadia/config.mk
+++ b/nand_spl/board/amcc/acadia/config.mk
@@ -32,11 +32,11 @@
# We will copy this SPL into internal SRAM in start.S. So we set
# TEXT_BASE to starting address in internal SRAM here.
#
-TEXT_BASE = 0xF8003000
+TEXT_BASE = 0xf8004000
# PAD_TO used to generate a 16kByte binary needed for the combined image
# -> PAD_TO = TEXT_BASE + 0x4000
-PAD_TO = 0xF8007000
+PAD_TO = 0xf8008000
ifeq ($(debug),1)
PLATFORM_CPPFLAGS += -DDEBUG