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Diffstat (limited to 'CHANGELOG')
| -rw-r--r-- | CHANGELOG | 77 |
1 files changed, 77 insertions, 0 deletions
@@ -2,6 +2,83 @@ Changes since U-Boot 1.1.4: ====================================================================== +* Fix JFFS2 support for legacy NAND driver. + +* Remove dependencies between DoC code and old legacy NAND driver. + +* Fix PM828_PCI target, for which PCI was *not* configured in. + +* Fix Lite5200B support: initialize SDelay register + See Freescale's AN3221 "MPC5200B SDRAM Initialization and + Configuration", 3.3.1 SDelay--MBAR + 0x0190 + +* Changes/fixes for drivers/cfi_flash.c: + + - Add Intel legacy lock/unlock support to common CFI driver + + On some Intel flash's (e.g. Intel J3) legacy unlocking is + supported, meaning that unlocking of one sector will unlock + all sectors of this bank. Using this feature, unlocking + of all sectors upon startup (via env var "unlock=yes") will + get much faster. + + - Fixed problem with multiple reads of envronment variable + "unlock" as pointed out by Reinhard Arlt & Anders Larsen. + + - Removed unwanted linefeeds from "protect" command when + CFG_FLASH_PROTECTION is enabled. + + - Changed p3p400 board to use CFG_FLASH_PROTECTION + + Patch by Stefan Roese, 01 Apr 2006 + +* Changes/fixes for drivers/cfi_flash.c: + - Correctly handle the cases where CFG_HZ != 1000 (several + XScale-based boards) + - Fix the timeout calculation of buffered writes (off by a + factor of 1000) + Patch by Anders Larsen, 31 Mar 2006 + +* Updates to common PPC4xx onboard (DDR)SDRAM init code (405 and 440) + + 405 SDRAM: - The SDRAM parameters can now be defined in the board + config file and the 405 SDRAM controller values will + be calculated upon bootup (see PPChameleonEVB). + When those settings are not defined in the board + config file, the register setup will be as it is now, + so this implementation should not break any current + design using this code. + + Thanks to Andrea Marson from DAVE for this patch. + + 440 DDR: - Added function sdram_tr1_set to auto calculate the + TR1 value for the DDR. + - Added ECC support (see p3p440). + + Patch by Stefan Roese, 17 Mar 2006 + +* Fix CONFIG_SKIP_LOWLEVEL_INIT dependency in cpu/arm920t/start.S + Patch by Peter Menzebach, 13 Oct 2005 [DNX#2006040142000473] + +* Add support for ymodem protocol download + Patch by Stefano Babic, 29 Mar 2006 + +* Memory Map Update for Delta board: U-Boot is at 0x80000000-0x84000000 + Merge from Markus Klotzbücher's repo, 01 Apr 2006 + +* GCC-4.x fixes: clean up global data pointer initialization for all + boards + +* Update for Delta board: + - redundant NAND environment + - misc Monahans cleanups (remove dead code etc.) + - DA9030 Initialization; some minimal changes to PXA I2C driver to + make it work with the Monahans. + - Make Monahans clock frequency configurable using + CFG_MONAHANS_RUN_MODE_OSC_RATIO and + CFG_MONAHANS_TURBO_RUN_MODE_RATIO. + Merge from Markus Klotzbücher's repo, 25 Mar 2006 + * Enable Quad UART om MCC200 board. * Cleanup MCC200 board configuration; omit non-existent stuff. |