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-rw-r--r--cpu/mpc85xx/cpu_init.c4
-rw-r--r--cpu/mpc85xx/ddr-gen1.c2
-rw-r--r--cpu/mpc86xx/cpu_init.c3
3 files changed, 6 insertions, 3 deletions
diff --git a/cpu/mpc85xx/cpu_init.c b/cpu/mpc85xx/cpu_init.c
index c98dd8da5..41de6942a 100644
--- a/cpu/mpc85xx/cpu_init.c
+++ b/cpu/mpc85xx/cpu_init.c
@@ -261,7 +261,9 @@ void cpu_init_f (void)
#if defined(CONFIG_MPC8536)
fsl_serdes_init();
#endif
-
+#if defined(CONFIG_FSL_DMA)
+ dma_init();
+#endif
}
diff --git a/cpu/mpc85xx/ddr-gen1.c b/cpu/mpc85xx/ddr-gen1.c
index 9fc498ed4..3bf872b6f 100644
--- a/cpu/mpc85xx/ddr-gen1.c
+++ b/cpu/mpc85xx/ddr-gen1.c
@@ -77,8 +77,6 @@ ddr_enable_ecc(unsigned int dram_size)
uint i = 0;
volatile ccsr_ddr_t *ddr= (void *)(CONFIG_SYS_MPC85xx_DDR_ADDR);
- dma_init();
-
for (*p = 0; p < (uint *)(8 * 1024); p++) {
if (((unsigned int)p & 0x1f) == 0) {
ppcDcbz((unsigned long) p);
diff --git a/cpu/mpc86xx/cpu_init.c b/cpu/mpc86xx/cpu_init.c
index 49528aae7..341e81596 100644
--- a/cpu/mpc86xx/cpu_init.c
+++ b/cpu/mpc86xx/cpu_init.c
@@ -113,6 +113,9 @@ void cpu_init_f(void)
memctl->or7 = CONFIG_SYS_OR7_PRELIM;
memctl->br7 = CONFIG_SYS_BR7_PRELIM;
#endif
+#if defined(CONFIG_FSL_DMA)
+ dma_init();
+#endif
/* enable the timebase bit in HID0 */
set_hid0(get_hid0() | 0x4000000);