diff options
Diffstat (limited to 'include/configs/sequoia.h')
| -rw-r--r-- | include/configs/sequoia.h | 40 |
1 files changed, 27 insertions, 13 deletions
diff --git a/include/configs/sequoia.h b/include/configs/sequoia.h index 1a460cde0..29f3b408d 100644 --- a/include/configs/sequoia.h +++ b/include/configs/sequoia.h @@ -1,5 +1,5 @@ /* - * (C) Copyright 2006 + * (C) Copyright 2006-2007 * Stefan Roese, DENX Software Engineering, sr@denx.de. * * (C) Copyright 2006 @@ -23,7 +23,7 @@ */ /************************************************************************ - * sequoia.h - configuration for Sequoia board (PowerPC440EPx) + * sequoia.h - configuration for Sequoia & Rainier boards ***********************************************************************/ #ifndef __CONFIG_H #define __CONFIG_H @@ -31,7 +31,7 @@ /*----------------------------------------------------------------------- * High Level Configuration Options *----------------------------------------------------------------------*/ -/* This config file is used for Sequoia (440EPx) and Rainier (440GRx) */ +/* This config file is used for Sequoia (440EPx) and Rainier (440GRx) */ #ifndef CONFIG_RAINIER #define CONFIG_SEQUOIA 1 /* Board is Sequoia */ #define CONFIG_440EPX 1 /* Specific PPC440EPx */ @@ -39,7 +39,7 @@ #define CONFIG_440GRX 1 /* Specific PPC440GRx */ #endif #define CONFIG_4xx 1 /* ... PPC4xx family */ -#define CONFIG_SYS_CLK_FREQ 33333333 /* external freq to pll */ +#define CONFIG_SYS_CLK_FREQ 33000000 /* external freq to pll */ #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */ #define CONFIG_MISC_INIT_R 1 /* Call misc_init_r */ @@ -102,6 +102,7 @@ #define CFG_ENV_IS_IN_FLASH 1 /* use FLASH for environment vars */ #else #define CFG_ENV_IS_IN_NAND 1 /* use NAND for environment vars */ +#define CFG_ENV_IS_EMBEDDED 1 /* use embedded environment */ #endif /*----------------------------------------------------------------------- @@ -187,7 +188,10 @@ /*----------------------------------------------------------------------- * DDR SDRAM *----------------------------------------------------------------------*/ -#define CFG_MBYTES_SDRAM (256) /* 256MB */ +#define CFG_MBYTES_SDRAM (256) /* 256MB */ +#if !defined(CONFIG_NAND_U_BOOT) && !defined(CONFIG_NAND_SPL) +#define CONFIG_DDR_DATA_EYE /* use DDR2 optimization */ +#endif /*----------------------------------------------------------------------- * I2C @@ -218,9 +222,21 @@ #undef CONFIG_BOOTARGS +/* Setup some board specific values for the default environment variables */ +#ifndef CONFIG_RAINIER +#define CONFIG_HOSTNAME sequoia +#define CFG_BOOTFILE "bootfile=/tftpboot/sequoia/uImage\0" +#define CFG_ROOTPATH "rootpath=/opt/eldk/ppc_4xxFP\0" +#else +#define CONFIG_HOSTNAME rainier +#define CFG_BOOTFILE "bootfile=/tftpboot/rainier/uImage\0" +#define CFG_ROOTPATH "rootpath=/opt/eldk/ppc_4xx\0" +#endif + #define CONFIG_EXTRA_ENV_SETTINGS \ + CFG_BOOTFILE \ + CFG_ROOTPATH \ "netdev=eth0\0" \ - "hostname=sequoia\0" \ "nfsargs=setenv bootargs root=/dev/nfs rw " \ "nfsroot=${serverip}:${rootpath}\0" \ "ramargs=setenv bootargs root=/dev/ram rw\0" \ @@ -234,13 +250,11 @@ "bootm ${kernel_addr} ${ramdisk_addr}\0" \ "net_nfs=tftp 200000 ${bootfile};run nfsargs addip addtty;" \ "bootm\0" \ - "rootpath=/opt/eldk/ppc_4xxFP\0" \ - "bootfile=/tftpboot/sequoia/uImage\0" \ "kernel_addr=FC000000\0" \ "ramdisk_addr=FC180000\0" \ - "load=tftp 100000 /tftpboot/sequoia/u-boot.bin\0" \ + "load=tftp 200000 /tftpboot/${hostname}/u-boot.bin\0" \ "update=protect off FFFA0000 FFFFFFFF;era FFFA0000 FFFFFFFF;" \ - "cp.b 100000 FFFA0000 60000\0" \ + "cp.b 200000 FFFA0000 60000\0" \ "upd=run load;run update\0" \ "" #define CONFIG_BOOTCOMMAND "run flash_self" @@ -345,7 +359,7 @@ *----------------------------------------------------------------------*/ /* General PCI */ #define CONFIG_PCI /* include pci support */ -#define CONFIG_PCI_PNP /* do (not) pci plug-and-play */ +#undef CONFIG_PCI_PNP /* do (not) pci plug-and-play */ #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ #define CFG_PCI_TARGBASE 0x80000000 /* PCIaddr mapped to CFG_PCI_MEMBASE*/ @@ -377,7 +391,7 @@ #if !defined(CONFIG_NAND_U_BOOT) && !defined(CONFIG_NAND_SPL) #define CFG_NAND_CS 3 /* NAND chip connected to CSx */ /* Memory Bank 0 (NOR-FLASH) initialization */ -#define CFG_EBC_PB0AP 0x03017300 +#define CFG_EBC_PB0AP 0x03017200 #define CFG_EBC_PB0CR (CFG_FLASH | 0xda000) /* Memory Bank 3 (NAND-FLASH) initialization */ @@ -386,7 +400,7 @@ #else #define CFG_NAND_CS 0 /* NAND chip connected to CSx */ /* Memory Bank 3 (NOR-FLASH) initialization */ -#define CFG_EBC_PB3AP 0x03017300 +#define CFG_EBC_PB3AP 0x03017200 #define CFG_EBC_PB3CR (CFG_FLASH | 0xda000) /* Memory Bank 0 (NAND-FLASH) initialization */ |